48 Commits

Author	SHA1	Message	Date
Thijs Havinga	f6dab9cd3b	Update addr2 read-back register	2023-09-12 12:13:50 +02:00
Xianjun Jiao	98d83bb1cb	Add ack rx control into the doc	2023-01-17 14:48:17 +01:00
Xianjun Jiao	6aaa11651b	Improve the link style in README/doc	2022-05-13 16:45:25 +02:00
Xianjun Jiao	90a9618231	doc and app notes update	2022-04-01 10:04:21 +02:00
Xianjun Jiao	b49db4c59a	csi fuzzer document and publication (former paper) section udpate	2021-05-16 16:14:26 +02:00
Xianjun Jiao	7cf9ba6e31	Add dmesg printing option for broadcasting packet	2021-05-10 14:04:34 +02:00
Xianjun Jiao	6035432b1d	Update project document to include the rx_intf tx_intf I/Q loopback register	2021-05-06 18:55:39 +02:00
Xianjun Jiao	b5a0a70cb6	doc/README.md udpate	2021-04-06 10:06:49 +02:00
Xianjun Jiao	c8b47d083e	more comprehensive/rich info about registers and newer info reflecting newer code/design are added to the project document	2021-04-05 21:59:00 +02:00
luz paz	b1dd94e387	Fix various typos ... Found via codespell v2.1.dev0 `codespell -q 3 -L ans,filp,fils,hsi`	2021-02-04 20:41:51 +01:00
Jiao Xianjun	55c2866f7c	Merge pull request #54 from lnceballosz/master ... NGI0 - Updating licensing aspects according REUSE	2021-02-03 16:14:49 +01:00
Jiao Xianjun	91398b9834	Update README.md	2021-02-03 15:29:16 +01:00
Jiao Xianjun	b9dde98951	Update README.md	2021-02-03 15:26:42 +01:00
weiliu	2238b42bb8	improve csma state machine, force ch_idle high after decode, log cw and num_slot_random in the last attempt	2021-01-28 14:15:29 +01:00
Lina Ceballos	a6085186d9	adding license and copyright headers	2021-01-20 13:30:12 +01:00
Jiao Xianjun	e8237378f8	Update README.md	2020-10-30 20:29:12 +01:00
Xianjun Jiao	f71252c537	iq capture feature	2020-10-19 10:13:51 +02:00
Jiao Xianjun	646b46af59	Update README.md	2020-10-12 17:12:34 +02:00
Jiao Xianjun	bf6ebc2812	Update README.md	2020-09-06 20:27:11 +02:00
Jiao Xianjun	e1d42e155b	Update README.md	2020-09-04 17:14:54 +02:00
Jiao Xianjun	e240bea2c8	Update README.md	2020-09-04 17:14:11 +02:00
Jiao Xianjun	95d09ab9f2	Update README.md	2020-08-18 10:31:44 +02:00
Jiao Xianjun	4160411d33	Update README.md	2020-08-18 10:31:01 +02:00
Jiao Xianjun	4ecf49bb3e	4 fpga queues and better driver/fpga flow control to avoid crash. improved slice cfg and printing (#23)	2020-06-12 11:11:47 +02:00
Jiao Xianjun	459c61501f	Update README.md	2020-05-21 14:16:10 +02:00
Xianjun Jiao	e63d1ec300	Jetmir: add tsf set command to sdrctl	2020-03-05 08:50:41 +01:00
Xianjun Jiao	b73660ad79	prepare for release	2020-03-04 19:39:12 +01:00
Jiao Xianjun	404ff4e063	Update README.md	2020-01-28 09:04:58 +01:00
Jiao Xianjun	5ea63bede1	Update README.md	2020-01-20 08:53:33 +01:00
Jiao Xianjun	4f2d13c77e	Update README.md	2020-01-19 22:42:49 +01:00
Jiao Xianjun	0168c125b2	Update README.md	2020-01-19 22:40:06 +01:00
Jiao Xianjun	da2a8350be	Update README.md	2020-01-19 22:35:12 +01:00
Jiao Xianjun	88c09b72fd	Update README.md	2020-01-19 17:21:34 +01:00
Jiao Xianjun	9d96e69257	add more reminder of channel list change	2020-01-05 14:24:04 +01:00
Jiao Xianjun	0273d86243	change monitor mode description and add regulation and frequency config	2020-01-05 14:20:36 +01:00
Jiao Xianjun	365a7066be	Update README.md	2020-01-03 15:58:59 +01:00
Jiao Xianjun	0669334ca5	Update README.md	2019-12-23 09:55:20 +01:00
Jiao Xianjun	7750643c45	Update README.md	2019-12-20 17:34:57 +01:00
Jiao Xianjun	1bbbbdc7f1	Update README.md	2019-12-20 17:31:07 +01:00
Jiao Xianjun	d288774fd4	Merge pull request #3 from weiliu1011/patch-4 ... Update README.md	2019-12-20 17:23:45 +01:00
weiliu1011	62591d266a	Update README.md	2019-12-20 11:25:22 +01:00
weiliu1011	6a6fa9b48f	minor fix	2019-12-20 10:50:59 +01:00
Jiao Xianjun	4f977aa976	Update README.md	2019-12-18 20:36:15 +01:00
Jiao Xianjun	c3d9cd01f2	Update README.md	2019-12-17 16:51:19 +01:00
Jiao Xianjun	2309afd47c	add debug section	2019-12-13 09:51:51 +01:00
Jiao Xianjun	10d539bee3	update document	2019-12-12 12:16:06 +01:00
Jiao Xianjun	5f436b3c82	update document	2019-12-12 10:10:10 +01:00
Xianjun Jiao	2ee6717882	initial commit	2019-12-10 14:03:47 +01:00