ExternalVendorCode/openwifi
1
0
Fork 0
mirror of https://github.com/open-sdr/openwifi.git synced 2025-04-01 00:00:36 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

Merge branch 'master' into antsdr to update to the latest openwifi

Browse Source
This commit is contained in:
Wei Chaochen 2023-04-12 10:32:19 +08:00
commit db449faf16
90 changed files with 11528 additions and 15758 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
CONTRIBUTING.md
View File

@ -4,6 +4,6 @@ SPDX-FileCopyrightText: 2019 UGent
SPDX-License-Identifier: AGPL-3.0-or-later
-->
CLA([Individual](https://users.ugent.be/~xjiao/openwifi-Individual.pdf), [Entity](https://users.ugent.be/~xjiao/openwifi-Entity.pdf)) needs to be signed and sent to Filip.Louagie@UGent.be before you contributing.
CLA([Individual](https://github.com/open-sdr/openwifi-hw-img/raw/master/doc_repo/openwifi-Individual.pdf), [Entity](https://github.com/open-sdr/openwifi-hw-img/raw/master/doc_repo/openwifi-Entity.pdf)) needs to be signed and sent to Filip.Louagie@UGent.be before you contributing.
CLA is generated by the [Project Harmony](http://www.harmonyagreements.org/index.html).

143
README.md
View File

@ -43,23 +43,25 @@ Openwifi code has dual licenses. [AGPLv3](https://github.com/open-sdr/openwifi/b
**Performance (best case: aggregation/AMPDU on):**
- iperf: TCP 40~50Mbps; UDP 50Mbps
- EVM -38dB; MCS0 sensitivity -87dBm; MCS7 -72dBm. (FMCOMMS2 2.4GHz; cable and OTA test)
- EVM -38dB; MCS0 sensitivity -92dBm; MCS7 -73dBm. (FMCOMMS2 2.4GHz; cable and OTA test)
**Supported SDR platforms:** (Check [Porting guide](#Porting-guide) for your new board if it isn't in the list)
**Supported SDR platforms:**
board_name|board combination|status|SD card img|Vivado license
-------|-------|----|----|-----
zc706_fmcs2|[Xilinx ZC706 board](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc706-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|Need
zed_fmcs2|[Xilinx zed board](https://www.xilinx.com/products/boards-and-kits/1-8dyf-11.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
adrv9364z7020|[ADRV9364-Z7020 + ADRV1CRR-BOB](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/adrv9364-z7020.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
adrv9361z7035|[ADRV9361-Z7035 + ADRV1CRR-BOB/FMC](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/ADRV9361-Z7035.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|Need
zc702_fmcs2|[Xilinx ZC702 board](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
antsdr|[MicroPhase](https://github.com/MicroPhase/) enhanced ADALM-PLUTO [Notes](kernel_boot/boards/antsdr/notes.md)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
sdrpi|[HexSDR](https://github.com/HexSDR/) Powerful SDR in Raspberry Pi size [Notes](kernel_boot/boards/sdrpi/notes.md)|Done|[32bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-1-32bit.img.xz)|**NO** need
zcu102_fmcs2|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Done|[64bit img](https://users.ugent.be/~xjiao/openwifi-1.3.1-wilsele-64bit.img.xz)|Need
zcu102_9371|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [ADRV9371](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-adrv9371.html)|Future|Future|Need
board_name|Description|Vivado license
----------|-----------|--------------
zc706_fmcs2|[Xilinx ZC706 board](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc706-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Need
zed_fmcs2|[Xilinx zed board](https://www.xilinx.com/products/boards-and-kits/1-8dyf-11.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|**NO** need
adrv9364z7020|[ADRV9364-Z7020 + ADRV1CRR-BOB](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/adrv9364-z7020.html)|**NO** need
adrv9361z7035|[ADRV9361-Z7035 + ADRV1CRR-BOB/FMC](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/ADRV9361-Z7035.html)|Need
zc702_fmcs2|[Xilinx ZC702 board](https://www.xilinx.com/products/boards-and-kits/ek-z7-zc702-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|**NO** need
antsdr|[MicroPhase](https://github.com/MicroPhase/) enhanced ADALM-PLUTO [Notes](kernel_boot/boards/antsdr/notes.md)|**NO** need
antsdr_e200|[MicroPhase](https://github.com/MicroPhase/) enhanced ADALM-PLUTO (smaller/cheaper) [Notes](kernel_boot/boards/antsdr_e200/README.md)|**NO** need
sdrpi|[HexSDR](https://github.com/HexSDR/) SDR in Raspberry Pi size [Notes](kernel_boot/boards/sdrpi/notes.md)|**NO** need
zcu102_fmcs2|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kits/ek-u1-zcu102-g.html) + [FMCOMMS2/3/4](https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/eval-ad-fmcomms2.html)|Need
neptunesdr|Low cost Zynq 7020 + AD9361 board|**NO** need
- board_name is used to identify FPGA design in openwifi-hw/boards/
- Check [Porting guide](#Porting-guide) for your new board if it isn't in the list.
- board_name is used to identify FPGA design in openwifi-hw/boards/ and FPGA image in openwifi-hw-img/boards
- Don't have any boards? Or you like JTAG boot instead of SD card? Check our test bed [w-iLab.t](https://doc.ilabt.imec.be/ilabt/wilab/tutorials/openwifi.html) tutorial.
[[Quick start](#Quick-start)]
@ -76,16 +78,25 @@ zcu102_9371|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kit
[[Application notes](doc/app_notes/README.md)]
## Quick start
- Restore openwifi board specific img file (from the table) into a SD card. To do this, program "Disks" in Ubuntu can be used (Install: "sudo apt install gnome-disk-utility"). After restoring, the SD card should have two partitions: BOOT and rootfs. You need to config the **correct files in the BOOT partition** according to the **board you have** by operation on your computer:
- Copy files in **openwifi/board_name** to the base directory of BOOT partition.
- Copy **openwifi/zynqmp-common/Image** (zcu102 board) or **openwifi/zynq-common/uImage** (other boards) to the base directory of BOOT partition
- Connect two antennas to RXA/TXA ports. Config the board to SD card boot mode (check the board manual). Insert the SD card to the board. Power on.
- Download [openwifi img](https://drive.google.com/file/d/12egFLT9TclmY8m3vCMHmUuSne3qK0SWc/view?usp=sharing), unzip and burn it into a SD card (>=16GB). After this operation, the SD card should have two partitions: BOOT and rootfs. To flash the SD card, SD card tool software (such as Startup Disk Creator in Ubuntu) or dd command can be used:
```
sudo dd bs=512 count=31116288 if=openwifi-xyz.img of=/dev/your_sdcard_dev
(To have correct count value, better to check the .img file actual situation by "fdisk -l img_filename")
```
- Config the **correct files in the BOOT partition** according to the **board you have** by operation on your computer:
- Copy files in **BOOT/openwifi/board_name** to the base directory of BOOT partition.
- Delete the **rootfs/root/kernel_modules** directory (if exist).
- Delete the **rootfs/root/etc/network/interfaces.new** directory (if exist).
- Insert the SD card to the board. Configure the board in SD booting mode. Connect antennas. Power on.
- Login to the board from your PC (PC Ethernet should have IP 192.168.10.1) with password **openwifi**.
```
ssh root@192.168.10.122
```
- If not successful, check [known issue](doc/known_issue/notter.md)
- Then, run openwifi AP and the on board webserver
```
raspi-config --expand-rootfs (Only needed when your SD card > 16GB. Run and reboot)
./openwifi/setup_once.sh (Reboot the board. Only need to run once for new board)
cd openwifi
./wgd.sh
./fosdem.sh
@ -93,9 +104,9 @@ zcu102_9371|[Xilinx ZCU102 board](https://www.xilinx.com/products/boards-and-kit
(Use "./fosdem-11ag.sh" to force 11a/g mode)
```
**NOTE** adrv9361z7035 has ultra low TX power in 5GHz. Move **CLOSER** when you use that board in 5GHz!!!
- After you see the "openwifi" SSID on your device (Phone/Laptop/etc), connect it. Browser to 192.168.13.1 on your device, you should see the webpage hosted by the webserver on board.
- After you see the "openwifi" SSID on your device (Phone/Laptop/etc), connect it (password: openwifi). If not get 192.168.13.* IP automatically, check [known issue](doc/known_issue/notter.md). Browser to 192.168.13.1 on your device, you should see the webpage hosted by the webserver on board.
- Note 1: If your device doesn't support 5GHz (ch44), please change the **hostapd-openwifi.conf** on board and re-run fosdem.sh.
- Note 2: After ~2 hours, the Viterbi decoder will halt (Xilinx Evaluation License). Just power cycle the board if it happens. (If output of "./sdrctl dev sdr0 get reg rx 20" is always the same, it means the decoder halts)
- Note 2: After ~2 hours, the Viterbi decoder will halt (Xilinx Evaluation License). Just reload FPGA ([method](doc/app_notes/drv_fpga_dynamic_loading.md)) or simply power cycle the board if it happens. (If output of "./sdrctl dev sdr0 get reg rx 20" is always the same, it means the decoder halts)
- To give the Wi-Fi client internet access, configure routing/NAT **on the PC**:
```
sudo sysctl -w net.ipv4.ip_forward=1
@ -127,55 +138,39 @@ The board actually is an Linux/Ubuntu computer which is running **hostapd** to o
## Update FPGA
(Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files)
(Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files without rebooting/power-cycle)
Since the pre-built SD card image might not have the latest bug-fixes/updates, it is recommended to always copy the latest files in the [user_space](./user_space) directory on to the board. Then update the fpga bitstream and driver (see next section) on to the board.
- Install Vivado/SDK 2018.3 (Vivado Design Suite - HLx Editions - 2018.3 Full Product Installation. If you don't need to generate new FPGA bitstream, WebPack version without license is enough)
- Install Vivado 2021.1. Make sure install Vitis as well. You should have this directory: your_Xilinx_install_directory/Vitis (NOT Vitis_HLS!)
- If the Vitis is not installed, you can add it by running "Xilinx Design Tools --> Add Design Tools for Devices 2021.1" from Xilinx program group/menu in your OS start menu.
- Setup environment variables (use absolute path):
```
export XILINX_DIR=your_Xilinx_install_directory
(Example: export XILINX_DIR=/opt/Xilinx. The Xilinx directory should include sth like: Downloads, SDK, Vivado, xic)
export OPENWIFI_HW_DIR=your_openwifi-hw_directory
(The directory where you store the open-sdr/openwifi-hw repo via git clone)
(Example: export XILINX_DIR=/opt/Xilinx. The Xilinx directory should include sth like: Downloads, Vitis, etc.)
export OPENWIFI_HW_IMG_DIR=your_openwifi-hw-img_directory
(The directory where you get the open-sdr/openwifi-hw-img repo via git clone)
export BOARD_NAME=your_board_name
```
- Pick the FPGA bitstream from openwifi-hw, and generate BOOT.BIN and transfer it on board via ssh channel:
- Pick the FPGA bitstream from openwifi-hw-img, generate system_top.bit.bin and transfer it on board via ssh channel:
```
For Zynq 7000:
cd openwifi/user_space; ./boot_bin_gen.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME
For Zynq MPSoC (like zcu102 board):
cd openwifi/user_space; ./boot_bin_gen_zynqmp.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME
cd openwifi/kernel_boot/boards/$BOARD_NAME/output_boot_bin; scp ./BOOT.BIN root@192.168.10.122:
cd openwifi/user_space; ./boot_bin_gen.sh $XILINX_DIR $BOARD_NAME $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/system_top.xsa
scp ./system_top.bit.bin root@192.168.10.122:openwifi/
```
- On board: Put the BOOT.BIN into the BOOT partition.
```
mount /dev/mmcblk0p1 /mnt
cp ~/BOOT.BIN /mnt
cd /mnt
sync
cd ~
umount /mnt
```
**Power cycle** the board to load new FPGA bitstream.
To load FPGA dynamically without rebooting/power-cycle, check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md).
- Now the system_top.bit.bin is onboard in /root/openwifi/ directory. When wgd.sh runs onboard from that directory, it will discover the FPGA img file system_top.bit.bin and load it before loading driver .ko files.
## Update Driver
(Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files)
(Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files without rebooting/power-cycle)
Since the pre-built SD card image might not have the latest bug-fixes/updates, it is recommended to always copy the latest files in the [user_space](./user_space) directory on to the board. Then update the fpga bitstream (see previous section) and driver on to the board.
- Prepare Analog Devices Linux kernel source code (only need to run once):
```
cd openwifi/user_space; ./prepare_kernel.sh $XILINX_DIR ARCH_BIT build
sudo apt install flex bison libssl-dev device-tree-compiler u-boot-tools -y
cd openwifi/user_space; ./prepare_kernel.sh $XILINX_DIR ARCH_BIT
(For Zynq 7000, ARCH_BIT should be 32, for Zynq MPSoC, ARCH_BIT should be 64)
```
**Note**: In Ubuntu, gcc-10 might have issue ('yylloc' error), so use gcc-9 if you encounter error.
- Compile the latest openwifi driver
```
cd openwifi/driver; ./make_all.sh $XILINX_DIR ARCH_BIT
@ -189,7 +184,7 @@ Since the pre-built SD card image might not have the latest bug-fixes/updates, i
Now you can use **wgd.sh** on board to load the new openwifi driver. **wgd.sh** also tries to reload FPGA img if system_top.bit.bin presents in the same directory.
Find more information in [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md).
**Note**: If you have symbol or version error while loadng the driver, it could be because the kernel in the SD card image is too old. In this case, you need to follow [[Build openwifi Linux img from scratch](#Build-openwifi-Linux-img-from-scratch)] to generate your new SD card image.
**Note**: If you have symbol or version error while loadng the driver, it could be because the kernel in the SD card image is too old. In this case, you need put the linux kernel image generated by prepare_kernel.sh (check [[Update Driver](#Update-Driver)]) to the BOOT partition of SD card. The kernel image file name: adi-linux/arch/arm/boot/uImage (32bit); adi-linux-64/arch/arm64/boot/Image (64bit).
## Update sdrctl
- Copy the sdrctl source files to the board via ssh channel
@ -198,11 +193,11 @@ Since the pre-built SD card image might not have the latest bug-fixes/updates, i
```
- Compile the sdrctl **on board**:
```
cd ~/openwifi/sdrctl_src/ && make && cp sdrctl ../ && cd ..
cd ~/openwifi/sdrctl_src/ && make clean && make && cp sdrctl ../ && cd ..
```
## Easy Access and etc
- Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files.
- Check [Driver and FPGA dynamic reloading app note](./doc/app_notes/drv_fpga_dynamic_loading.md) for more convenient way of updating FPGA and driver files without rebooting/power-cycle.
- FPGA and driver on board update scripts
- Setup [ftp server](https://ubuntu.com/server/docs/service-ftp) on PC, allow anonymous and change ftp root directory to the openwifi directory.
- On board:
@ -217,45 +212,7 @@ Since the pre-built SD card image might not have the latest bug-fixes/updates, i
- Input password "openwifi"
## Build openwifi Linux img from scratch
- Install the devicetree compiler -- dtc. (For Ubuntu: sudo apt install device-tree-compiler)
- Install the mkimage tool. (For Ubuntu: sudo apt install u-boot-tools)
- Download [2019_R1-2020_06_22.img.xz](http://swdownloads.analog.com/cse/2019_R1-2020_06_22.img.xz) from [Analog Devices Wiki](https://wiki.analog.com/resources/tools-software/linux-software/zynq_images). Burn it to a SD card.
- Insert the SD card to your Linux PC. Find out the mount point (that has two sub directories BOOT and rootfs), and setup environment variables (use absolute path):
```
export SDCARD_DIR=sdcard_mount_point
export XILINX_DIR=your_Xilinx_install_directory
export OPENWIFI_HW_DIR=your_openwifi-hw_directory
export BOARD_NAME=your_board_name
```
- Run script to update SD card:
```
cd openwifi/user_space; ./update_sdcard.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME $SDCARD_DIR
```
- Config your board to SD card boot mode (check the board manual). Insert the SD card to the board. Power on.
- Login to the board from your PC (PC Ethernet should have IP 192.168.10.1) with one time password **analog**.
```
ssh root@192.168.10.122
```
- Setup routing/NAT **on the PC** for your board -- this internet connection is **important** for post installation/config.
```
sudo sysctl -w net.ipv4.ip_forward=1
sudo iptables -t nat -A POSTROUTING -o NICY -j MASQUERADE
sudo ip route add 192.168.13.0/24 via 192.168.10.122 dev ethX
```
**ethX** is the PC NIC name connecting the board ethernet. **NICY** is the PC NIC name connecting internet (WiFi or another ethernet).
If you want, uncommenting "net.ipv4.ip_forward=1" in /etc/sysctl.conf to make IP forwarding persistent on PC.
- Test the connectivity. Run on board (in the ssh session):
```
route add default gw 192.168.10.1
ping IP_YOU_KNOW_ON_YOUR_NETWORK
```
If there is issue with the connectivity (ping can not reach the target), it needs to be solved before going to the next step.
- Run **one time** script on board to complete post installation/config (After this, password becomes **openwifi**)
```
cd ~/openwifi && ./post_config.sh
```
- Now you can start from [Quick start](#Quick-start) (Skip the image download and burn step)
- For the latest ADI Kuiper image, please check [kuiper.md](./doc/img_build_instruction/kuiper.md)
## Special note for 11b
@ -272,13 +229,13 @@ cd openwifi/user_space; ./build_wpa_supplicant_wo11b.sh
```
## Porting guide
This section explains the porting work by showing the differences between openwifi and Analog Devices reference design. openwifi is based on 2019_R1 of [HDL Reference Designs](https://github.com/analogdevicesinc/hdl).
This section explains the porting work by showing the differences between openwifi and Analog Devices reference design. openwifi is based on 2021_r1 of [HDL Reference Designs](https://github.com/analogdevicesinc/hdl).
- Open the fmcomms2 + zc706 reference design at hdl/projects/fmcomms2/zc706 (Please read Analog Devices help)
- Open the openwifi design zc706_fmcs2 at openwifi-hw/boards/zc706_fmcs2 (Please read openwifi-hw repository)
- "Open Block Design", you will see the differences between openwifi and the reference design. Both in "diagram" and in "Address Editor".
- The address/interrupts of FPGA blocks hooked to the ARM bus should be put/aligned to the devicetree file openwifi/kernel_boot/boards/zc706_fmcs2/devicetree.dts. Linux will parse the devicetree.dtb when booting to know information of attached device (FPGA blocks in our case).
- We use dtc command to get devicetree.dts converted from devicetree.dtb in [Analog Devices Linux image](https://wiki.analog.com/resources/tools-software/linux-software/zynq_images), then do modification according to what we have added/modified to the reference design.
- Please learn the script in [[Build openwifi Linux img from scratch](#Build-openwifi-Linux-img-from-scratch)] to understand how we generate devicetree.dtb, BOOT.BIN and Linux kernel uImage and put them together to build the full SD card image.
- Please learn the script in [[Build openwifi Linux img from scratch](#Build-openwifi-Linux-img-from-scratch)] to understand how we generate devicetree.dtb, BOOT.BIN, Linux kernel and put them together to build the full SD card image.
## License

2
doc/README.md
View File

@ -204,7 +204,7 @@ reg_idx|meaning|comment
8|RSSI threshold for CCA (channel idle/busy)|set by ad9361_rf_set_channel automatically. the unit is rssi_half_db, check rssi_half_db_to_rssi_dbm()/rssi_dbm_to_rssi_half_db() in sdr.c to see the relation to rssi dBm
9|some low MAC time setting|bit31 0:auto, 1:manual. When manual, bit6-0: PHY rx delay, bit13-7: SIFS, bit18-14: slot time, bit23-19: ofdm symbol time, bit30-24: preamble+SIG time. unit us. check xpu.v (search slv_reg9)
10|BB RF delay setting|unit 0.1us. bit7-0: BB RF delay, bit14-8: RF end extended time on top of the delay. bit22-16: delay between bb tx start to RF tx on (lo or port control via spi). bit30-24: delay between bb tx end to RF tx off. check xpu.v (search slv_reg10)
11|ACK control and max num retransmission|bit4: 0:normal ACK, 1:disable auto ACK reply in FPGA. bit3-0: if bit3==0, the number of retransmission is decided by Linux. if bit3==1, the max num retransmission is taken from bit2-0
11|ACK control and max num retransmission|bit4: 0:normal ACK tx/reply, 1:disable auto ACK tx/reply in FPGA. bit5: 0:normal ACK rx from peer, 1:not expecting ACK rx from peer. bit3-0: if bit3==0, the number of retransmission is decided by Linux. if bit3==1, the max num retransmission is taken from bit2-0
12|AMPDU control|bit0: indicate low MAC start to receive AMPDU. bit4-1: tid. bit31: tid enable (by default, tid is not enabled and we decode AMPDU of all tid)
13|spi controller config|1: disable spi control and Tx RF is always on; 0: enable spi control and Tx RF only on (lo/port) when pkt sending
16|setting when wait for ACK in 2.4GHz|unit 0.1us. bit14-0: OFDM decoding timeout (after detect PHY header), bit30-16: timeout for PHY header detection, bit31: 0: FCS valid is not needed for ACK packet, 1: FCS valid is needed for ACK packet

2
doc/app_notes/README.md
View File

@ -13,7 +13,7 @@ Application notes collect many small topics about using openwifi in different sc
- [WiFi CSI radar via self CSI capturing](radar-self-csi.md)
- [Capture IQ sample, AGC gain, RSSI with many types of trigger condition](iq.md)
- [Capture dual antenna TX/RX IQ for multi-purpose (capture collision)](iq_2ant.md)
- [WiFi packet and IQ sample self loopback test (over-the-air and FPGA internal)](packet-iq-self-loopback-test.md)
- [WiFi packet, CSI and IQ sample self loopback test (over-the-air and FPGA internal)](packet-iq-self-loopback-test.md)
- [IEEE 802.11n (Wi-Fi 4)](ieee80211n.md)
- [802.11 packet injection and fuzzing](inject_80211.md)
- [CSI fuzzer](csi_fuzzer.md)

2
doc/app_notes/drv_fpga_dynamic_loading.md
View File

@ -20,7 +20,7 @@ present in the directory. If wgd.sh can not find the FPGA image, it will skip re
- Generate the reloadable FPGA file **system_top.bit.bin**. In the Linux host computer:
```
cd openwifi/user_space
./drv_and_fpga_package_gen.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME
./drv_and_fpga_package_gen.sh $OPENWIFI_HW_IMG_DIR $XILINX_DIR $BOARD_NAME
```
Then **system_top.bit.bin** will be generated in openwifi/user_space.

14
doc/app_notes/frequent_trick.md
View File

@ -1,7 +1,7 @@
Some usual/frequent control trick over the openwifi FPGA. You need to do these controls on board in the openwifi directory.
[[CCA LBT threshold and disable](#CCA-LBT-threshold-and-disable)]
[[Retransmission and ACK tx control](#Retransmission-and-ACK-tx-control)]
[[Retransmission and ACK control](#Retransmission-and-ACK-control)]
[[NAV DIFS EIFS CW disable and enable](#NAV-DIFS-EIFS-CW-disable-and-enable)]
[[CW max and min config](#CW-max-and-min-config)]
@ -20,26 +20,30 @@ Some usual/frequent control trick over the openwifi FPGA. You need to do these c
In normal operation, different threshold is set to FPGA according to the different calibration of different frequency/channel by driver automatically. Show the current LBT threshold in FPGA:
```
./set_lbt_th.sh
dmesg
```
"reg val: 00000086" means the current threshold is 134 (86 in Hex). Its unit is rssi_half_db. Check rssi_half_db_to_rssi_dbm()/rssi_dbm_to_rssi_half_db() in sdr.c to see the relation to rssi dBm.
It shows: "sdr,sdr FPGA LBT threshold 166(-62dBm). The last_auto_fpga_lbt_th 166(-62dBm). rssi corr 145". Check rssi_half_db_to_rssi_dbm()/rssi_dbm_to_rssi_half_db() in sdr.c to see the relation to rssi dBm.
Override a new threshold -NNdBm to FPGA, for example -70dBm:
```
./set_lbt_th.sh 70
dmesg
```
Above will disable the automatic CCA threshold setting from the openwifi driver.
Recover the driver automatic control on the threshold:
```
./set_lbt_th.sh 0
dmesg
```
Disable the CCA by setting a very strong level as threshold, for example -1dBm:
```
./set_lbt_th.sh 1
dmesg
```
After above command, the CCA engine will always believe the channel is idle, because the rx signal strength not likely could exceed -1dBm.
## Retransmission and ACK tx control
## Retransmission and ACK control
The best way of override the maximum number of re-transmission for a Tx packet is doing it in the driver openwifi_tx() function.
```
@ -60,7 +64,7 @@ To override the maximum number of re-transmission, set bit3 to 1, and set the va
9 in binary form is 01001.
To disable the ACK TX after receive a packet, set bit4 to 1. (Assume we want to preserve the above re-transmission overriding setting)
To disable the ACK TX after receiving a packet, set bit4 to 1. (Assume we want to preserve the above re-transmission overriding setting)
```
./sdrctl dev sdr0 set reg xpu 11 25
```
@ -68,6 +72,8 @@ To disable the ACK TX after receive a packet, set bit4 to 1. (Assume we want to
25 in binary form is 11001. the 1001 of bit3 to 1 is untouched.
Disabling ACK TX might be useful for monitor mode and packet injection.
To disable the ACK RX after sending a packet, set bit5 to 1.
## NAV DIFS EIFS CW disable and enable

2
doc/app_notes/iq.md
View File

@ -84,7 +84,7 @@ We implement the **IQ sample capture** with interesting extensions: many **trigg
0 |receiver gives FCS checksum result. no matter pass/fail
1 |receiver gives FCS checksum result. pass
2 |receiver gives FCS checksum result. fail
3 |receiver gives SIGNAL field checksum result. no matter pass/fail
3 |the tx_intf_iq0 becomes non zero (the 1st I/Q out)
4 |receiver gives SIGNAL field checksum result. pass
5 |receiver gives SIGNAL field checksum result. fail
6 |receiver gives SIGNAL field checksum result. no matter pass/fail. HT packet

BIN
doc/app_notes/openwifi-csi-fpga-loopback.jpg Normal file
View File

Binary file not shown.
Side by Side

After

Width:  |  Height:  |  Size: 292 KiB

39
doc/app_notes/packet-iq-self-loopback-test.md
View File

@ -5,13 +5,13 @@ SPDX-License-Identifier: AGPL-3.0-or-later
-->
One super power of the openwifi platform is "**Full Duplex**" which means that openwifi baseband can receive its own TX signal.
This makes the IQ sample and WiFi packet self loopback test possible. Reading the normal IQ sample capture [app note](iq.md) will help if you have issue or
want to understand openwifi side channel (for IQ and CSI) deeper.
This makes the IQ sample, WiFi packet and CSI self loopback test possible. Reading the normal [IQ sample capture app note](iq.md) and [CSI radar app note](radar-self-csi.md) will help if you have issue or want to understand openwifi side channel (for IQ and CSI) deeper.
![](./openwifi-loopback-principle.jpg)
[[IQ self loopback quick start](#IQ-self-loopback-quick-start)]
[[Check the packet loopback on board](#Check-the-packet-loopback-on-board)]
[[Self loopback config](#Self-loopback-config)]
[[IQ self loopback config](#IQ-self-loopback-config)]
[[CSI FPGA self loopback quick start](#CSI-FPGA-self-loopback-quick-start)]
## IQ self loopback quick start
(Please replace the IQ length **8187** by **4095** if you use low end FPGA board: zedboard/adrv9464z7020/antsdr/zc702/sdrpi)
@ -112,7 +112,7 @@ to do further offline analysis, or feed the IQ sample to the openwifi receiver s
```
You should see the printk message of packet Tx and Rx from the openwifi driver (sdr.c).
## Self loopback config
## IQ self loopback config
- By default, the loopback is via the air (from Tx antenna to Rx antenna). FPGA inernal loopback option is offered to have IQ sample and packet without
any interference. To have FPGA internal loopback, replace the "./side_ch_ctl wh5h0" during setup (the very 1st ssh session) by:
@ -128,3 +128,34 @@ to do further offline analysis, or feed the IQ sample to the openwifi receiver s
- To understand deeper of all above commands/settings, please refer to [Capture IQ sample, AGC gain, RSSI with many types of trigger condition](iq.md) and
[Capture dual antenna TX/RX IQ for multi-purpose (capture collision)](iq_2ant.md)
## CSI FPGA self loopback quick start
This section will show how to connect the WiFi OFDM transmitter to the receiver directly inside FPGA, and show the ideal CSI/constellation/frequency-offset. (For CSI over the air loopback, please refer to [CSI radar app note](radar-self-csi.md))
Command sequence on board:
```
cd openwifi
./wgd.sh
./monitor_ch.sh sdr0 6
insmod side_ch.ko
./side_ch_ctl g
```
Open another ssh session on board, then:
```
cd openwifi
./sdrctl dev sdr0 set reg rx_intf 3 256
(Above command let the FPGA Tx IQ come to receiver directly. Set 256 back to 0 to let receiver back connect to AD9361 RF frontend)
./sdrctl dev sdr0 set reg rx 5 768
(Disable the receiver FFT window shift. By default it is 1 (768+1) -- good for multipath, overfitting for direct loopback)
./inject_80211/inject_80211 -m n -r 7 -n 99999 -s 1400 -d 1000000 sdr0
(Transmit 802.11n MCS7 1400Byte packet every second)
```
Command on computer:
```
cd openwifi/user_space/side_ch_ctl_src
python3 side_info_display.py
```
Now you should see the following screenshot that shows the CSI/constellation/frequency-offset over this in-FPGA ideal channel.
![](./openwifi-csi-fpga-loopback.jpg)

1
doc/app_notes/radar-self-csi.md
View File

@ -14,6 +14,7 @@ One super power of the openwifi platform is "**Full Duplex**" which means that o
ssh root@192.168.10.122
(password: openwifi)
cd openwifi
./wgd.sh
./fosdem.sh
(After the AP started by above command, you can connect a WiFi client to this openwifi AP)
(Or setup other scenario according to your requirement)

159
doc/img_build_instruction/kuiper.md Normal file
View File

@ -0,0 +1,159 @@
**IMPORTANT pre-conditions**:
- Install Vivado 2021.1. Make sure install Vitis as well. You should have this directory: your_Xilinx_install_directory/Vitis (NOT Vitis_HLS!)
- If the Vitis is not installed, you can add it by running "Xilinx Design Tools --> Add Design Tools for Devices 2021.1" from Xilinx program group/menu in your OS start menu, or Help menu of Vivado.
- SD card at least with 16GB
- Install packages: `sudo apt install flex bison libssl-dev device-tree-compiler u-boot-tools -y`
[[Use openwifi prebuilt img](#Use-openwifi-prebuilt-img)]
[[Build SD card from scratch](#Build-SD-card-from-scratch)]
[[Use existing SD card on new board](#Use-existing-SD-card-on-new-board)]
## Use openwifi prebuilt img
Download openwifi pre-built img (see [Quick start](../../README.md#quick-start)), and extract it to .img file.
Use dd command to flash the SD card. (Or other software like Startup Disk Creator in Ubuntu)
```
sudo dd bs=512 count=31116288 if=openwifi-xyz.img of=/dev/your_sdcard_dev
```
To have correct count value, better to check the .img file actual situation by "fdisk -l img_filename".
Then start from the 2nd step of the [Quick start](../../README.md#quick-start) in README.
## Build SD card from scratch
Download image_2022-08-04-ADI-Kuiper-full.zip from https://wiki.analog.com/resources/tools-software/linux-software/kuiper-linux?redirect=1
Extract it to .img file.
Use dd command to flash the SD card. (Or other software like Startup Disk Creator in Ubuntu)
```
sudo dd bs=512 count=24018944 if=2022-08-04-ADI-Kuiper-full.img of=/dev/your_sdcard_dev
```
(To have correct count value, better to check the .img file actual situation by "fdisk -l img_filename". While making .img from SD card, check the SD card dev instead)
Mount the BOOT and rootfs partition of SD card to your computer.
Change the SD card file: Add following into rootfs/etc/network/interfaces
```
# The loopback interface
auto lo
iface lo inet loopback
auto eth0
iface eth0 inet static
#your static IP
address 192.168.10.122
#your gateway IP
gateway 192.168.10.1
netmask 255.255.255.0
#your network address "family"
network 192.168.10.0
broadcast 192.168.10.255
```
Change the SD card file: Add following into rootfs/etc/sysctl.conf
```
net.ipv4.ip_forward=1
```
Change the SD card file: Add following into rootfs/etc/systemd/system.conf
```
DefaultTimeoutStopSec=2s
```
Put the openwifi/kernel_boot/10-network-device.rules into rootfs/etc/udev/rules.d/
Run **update_sdcard.sh** from openwifi/user_space directory to further prepare the SD card. The last argument $SDCARD_DIR of the script is the directory (mounting point) on your computer that has BOOT and rootfs directories/partitions.
The script will build and put following things into the SD card:
- Linux kernel image file ([Update Driver](../../README.md#Update-Driver)):
- adi-linux-64/arch/arm64/boot/Image (64bit)
- adi-linux/arch/arm/boot/uImage (32bit)
- devicetree file:
- openwifi/kernel_boot/boards/zcu102_fmcs2/system.dtb (64bit)
- openwifi/kernel_boot/boards/$BOARD_NAME/devicetree.dtb (32bit)
- BOOT.BIN ([Update FPGA](../../README.md#Update-FPGA)):
- openwifi/kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN
- openwifi driver ([Update Driver](../../README.md#Update-Driver)).
- openwifi/user_space files and openwifi/webserver files
After **update_sdcard.sh** finishes, please do the 2nd step "Config the correct files ..." in [Quick start](../../README.md#quick-start). Then power on the board with the SD card, connect the board to your host PC (static IP 192.168.10.1) via ethernet, and ssh to the board with password **"analog"**
```
ssh root@192.168.10.122
```
Then change password to "openwifi" via "passwd" command onbard.
Enlarge the onboard SD disk space, and reboot (https://github.com/analogdevicesinc/adi-kuiper-gen/releases)
```
raspi-config --expand-rootfs
reboot now
```
Setup routing/NAT **on the PC** for your board -- this internet connection is **important** for post installation/config.
```
sudo sysctl -w net.ipv4.ip_forward=1
sudo iptables -t nat -A POSTROUTING -o NICY -j MASQUERADE
sudo ip route add 192.168.13.0/24 via 192.168.10.122 dev ethX
```
**ethX** is the PC NIC name connecting the board ethernet. **NICY** is the PC NIC name connecting internet (WiFi or another ethernet).
If you want, uncommenting "net.ipv4.ip_forward=1" in /etc/sysctl.conf to make IP forwarding persistent on PC.
Test the connectivity. Run on board (in the ssh session):
```
route add default gw 192.168.10.1
ping IP_YOU_KNOW_ON_YOUR_NETWORK
```
If there is issue with the connectivity (ping can not reach the target), it needs to be solved before going to the next step.
Do misc configurations/installations in the ssh session onboard:
```
sudo apt update
chmod +x /root/openwifi/*.sh
# install and setup dhcp server
sudo apt-get -y install isc-dhcp-server
cp /root/openwifi/dhcpd.conf /etc/dhcp/dhcpd.conf
# install hostapd and other useful tools
sudo apt-get -y install hostapd
sudo apt-get -y install tcpdump
sudo apt-get -y install webfs
sudo apt-get -y install iperf
sudo apt-get -y install iperf3
sudo apt-get -y install libpcap-dev
sudo apt-get -y install bridge-utils
# build on board tools
sudo apt-get -y install libnl-3-dev
sudo apt-get -y install libnl-genl-3-dev
cd /root/openwifi/sdrctl_src
make clean
make
cp sdrctl ../
cd /root/openwifi/side_ch_ctl_src/
gcc -o side_ch_ctl side_ch_ctl.c
cp side_ch_ctl ../
cd /root/openwifi/inject_80211/
make clean
make
cd ..
```
Run openwifi in the ssh session onboard:
```
/root/openwifi/setup_once.sh (Only need to run once for new board)
cd /root/openwifi
./wgd.sh
ifconfig sdr0 up
iwlist sdr0 scan
./fosdem.sh
```
## Use existing SD card on new board
Just operate the existing/working SD card of the old board on your computer starting from the 2nd step of the [Quick start](../../README.md#quick-start) in README. Then start using the SD card on the new board.

30
doc/known_issue/notter.md Normal file
View File

@ -0,0 +1,30 @@
# Known issue
- [Network issue in quick start](#Network-issue-in-quick-start)
- [EXT4 fs error rootfs issue](#EXT4-fs-error-rootfs-issue)
- [antsdr e200 UART console](#antsdr-e200-UART-console)
- [Client can not get IP](#Client-can-not-get-IP)
## Network issue in quick star
- OS: Ubuntu 22 LTS
- image: [openwifi img](https://drive.google.com/file/d/1fb8eJGJAntOciCiGFVLfQs7m7ucRtSWD/view?usp=share_link)
If can't ssh to the board via Ethernet for the 1st time, you might need to delete /etc/network/interfaces.new on SD card (on your computer).
If still can't ssh the board via Ethernet, you should use UART console (/dev/ttyUSBx, /dev/ttyCH341USBx, etc.) to monitor what happened during booting.
## EXT4 fs error rootfs issue
Sometimes, the 1st booting after flashing SD card might encounter "EXT4-fs error (device mmcblk0p2): ..." error on neptunesdr, changing SD card flashing tool might solve this issue. Some tool candidates:
- gnome-disks
- Startup Disk Creator
- win32diskimager
## antsdr e200 UART console
If can't see the UART console in Linux (/dev/ttyUSB0 or /dev/ttyCH341USB0), according to https://github.com/juliagoda/CH341SER, you might need to do `sudo apt remove brltty`
## Client can not get IP
If the client can not get IP from the openwifi AP, just re-run "service isc-dhcp-server restart" on board and do re-connect from the client.

17
doc/publications.md
View File

@ -15,33 +15,38 @@ Publications in category:
## Feature Functionality and System
- [Xianjun Jiao, et al. openwifi: a free and open-source IEEE802.11 SDR implementation on SoC. VTC2020 spring Antwerp](https://www.orca-project.eu/wp-content/uploads/sites/4/2020/03/openwifi-vtc-antwerp-PID1249076.pdf)
- [Cedric Den Haese, The initial 802.11n 2*2 MIMO and diversity (CSD/Combining) work. UGent master thesis 2021](https://users.ugent.be/~xjiao/Cedric_Den_Haese_masterproef.pdf)
- [Cedric Den Haese, The initial 802.11n 2*2 MIMO and diversity (CSD/Combining) work. UGent master thesis 2021](https://github.com/open-sdr/openwifi-hw-img/raw/master/doc_repo/Cedric_Den_Haese_masterproef.pdf)
- [Paul Zanna, et al. A novel method for utilizing RF information from IEEE 802.11 frames in Software Defined Networks. MethodsX 2021](https://www.sciencedirect.com/science/article/pii/S2215016121003368)
- [Luca Baldesi, et al. ChARM: NextG Spectrum Sharing Through Data-Driven Real-Time O-RAN Dynamic Control. INFOCOM 2022](https://ece.northeastern.edu/wineslab/papers/BaldesiInfocom22.pdf)
- [Thijs Havinga, et al. WIP: Achieving Self-Interference-Free Operation on SDR Platform with Critical TDD Turnaround Time. accepted WoWMoM2022 paper](https://arxiv.org/abs/2204.07354)
- [Yingshuo Xi, Baiming Zhang. High-Throughput Open Source Viterbi Decoder for OpenWiFi. 2022 KU Leuven master thesis](https://github.com/BaimingZhang26213/viterbi_decoder)
- [Merkebu Girmay, et al. Technology recognition and traffic characterization for wireless technologies in ITS band. Vehicular Communications Volume 39, February 2023, 100563](https://doi.org/10.1016/j.vehcom.2022.100563)
## TSN Time Sensitive Network and RT Real Time
- [Jetmir Haxhibeqiri, et al. Enabling TSN over IEEE 802.11: Low-overhead Time Synchronization for Wi-Fi Clients. ICIT2021](https://biblio.ugent.be/publication/8700714/file/8700715.pdf)
- [Ingrid Moerman, et al. Wireless Time-Sensitive Networks: When Every Microsecond Counts. Microwaves&RF, 2021](https://www.mwrf.com/technologies/systems/article/21164984/wireless-timesensitive-networks-when-every-microsecond-counts)
- [Muhammad Aslam, et al. High precision time synchronization on Wi-Fi based multi-hop network. CNERT2021](https://biblio.ugent.be/publication/8709058/file/8709060.pdf)
- [Ingrid Moerman, et al. Interoperable Time-Sensitive Networking Towards 6G (invited presentation)](https://biblio.ugent.be/publication/8719532/file/8719533.pdf)
- [Lihao Zhang, et al. A Just-In-Time Networking Framework for Minimizing Request-Response Latency of Wireless Time-Sensitive Applications. Arxiv 2021](https://arxiv.org/abs/2109.03032)
- [Lihao Zhang, et al. A Just-In-Time Networking Framework for Minimizing Request-Response Latency of Wireless Time-Sensitive Applications. Arxiv 2021. Accepted by IEEE IoT journal 2022.](https://arxiv.org/abs/2109.03032)
- [Jetmir Haxhibeqiri, et al. Bringing Time-Sensitive Networking to Wireless Professional Private Networks. Wireless Personal Communications 2021](https://link.springer.com/article/10.1007/s11277-021-09056-0)
- [Muhammad Aslam, et al. Hardware Efficient Clock Synchronization across Wi-Fi and Ethernet Based Network Using PTP. IEEE Transactions on Industrial Informatics 2021](https://ieeexplore.ieee.org/document/9573364)
- [Zelin Yun, et al. RT-WiFi on Software-Defined Radio: Design and Implementation. accepted RTAS2022 paper and demo](https://arxiv.org/abs/2203.10390)
- [Pablo Avila-Campos, et al. Beacon-Based Wireless TSN Association. 2022 IEEE INFOCOM](https://imec-publications.be/bitstream/handle/20.500.12860/40111/8126_acc.pdf?sequence=2)
- [Pablo Avila-Campos, et al. Impactless Beacon-Based Wireless TSN Association Procedure. 2022 IEEE 18th International Conference on Factory Communication Systems (WFCS)](https://ieeexplore.ieee.org/abstract/document/9779186)
- [Jetmir Haxhibeqiri, et al. Safety-related Applications over Wireless Time-Sensitive Networks. IEEE ETFA 2022](https://biblio.ugent.be/publication/8770625/file/8770627.pdf)
- [Pablo Avila-Campos, et al. Removing the Wires in Time-Sensitive Networks. 2022 61st FITCE International Congress Future Telecommunications: Infrastructure and Sustainability (FITCE)](https://ieeexplore.ieee.org/abstract/document/9934268)
- [Pablo Avila-Campos, et al. Periodic Control Traffic Support in a Wireless Time-Sensitive Network. 2022 13th International Conference on Network of the Future (NoF)](https://ieeexplore.ieee.org/document/9942586)
- [Gilson Miranda, et al. The Quality-Aware and Vertical-Tailored Management of Wireless Time-Sensitive Networks. IEEE Internet of Things Magazine ( Volume: 5, Issue: 4, December 2022)](https://ieeexplore.ieee.org/abstract/document/10012491)
## CSI Channel State Information and Security
- [Marco Cominelli, et al. CSI MURDER. ORCA project opencall 2019](https://ans.unibs.it/projects/csi-murder/)
- [Marco Cominelli, et al. IEEE 802.11 CSI randomization to preserve location privacy: An empirical evaluation in different scenarios. ELSEVIER Computer Networks, 2021](https://www.sciencedirect.com/science/article/abs/pii/S138912862100102X)
- [Xianjun Jiao, et al. Openwifi CSI fuzzer for authorized sensing and covert channels. ACM WiSec 2021](https://dl.acm.org/doi/pdf/10.1145/3448300.3468255)
- [Hongjian Cao, et al. OWFuzz: WiFi Protocol Fuzzing Tool Based on OpenWiFi. Blackhat asia 2021](https://www.blackhat.com/asia-21/arsenal/schedule/#owfuzz-wifi-protocol-fuzzing-tool-based-on-openwifi-22569), [[**code**]](https://github.com/alipay/Owfuzz)
- [Steven Heijse, IEEE 802.11 Physical Layer Fuzzing Using OpenWifi. UGent master thesis 2021](https://users.ugent.be/~xjiao/Steven_Heijse_masterproef.pdf)
- [Jasper Devreker, Developing IEEE 802.11 PHY fuzzing capabilities using the open source Openwifi project. UGent master thesis 2022](https://users.ugent.be/~xjiao/Jasper_Devreker_masterproef.pdf)
- [Thomas Schuddinck, Cybersecurity: Breaking IEEE 802.11 Devices at the Physical Layer. UGent master thesis 2022](https://users.ugent.be/~xjiao/Thomas_Schuddinck_masterproef.pdf)
- [Seppe Dejonckheere, The design of a CSI sensing authorisation mechanism using the open source Openwifi project. UGnet master thesis 2022](https://users.ugent.be/~xjiao/Seppe_Dejonckheere_masterproef.pdf)
- [Steven Heijse, IEEE 802.11 Physical Layer Fuzzing Using OpenWifi. UGent master thesis 2021](https://github.com/open-sdr/openwifi-hw-img/raw/master/doc_repo/Steven_Heijse_masterproef.pdf)
- [Jasper Devreker, Developing IEEE 802.11 PHY fuzzing capabilities using the open source Openwifi project. UGent master thesis 2022](https://github.com/open-sdr/openwifi-hw-img/raw/master/doc_repo/Jasper_Devreker_masterproef.pdf)
- [Thomas Schuddinck, Cybersecurity: Breaking IEEE 802.11 Devices at the Physical Layer. UGent master thesis 2022](https://github.com/open-sdr/openwifi-hw-img/raw/master/doc_repo/Thomas_Schuddinck_masterproef.pdf)
- [Seppe Dejonckheere, The design of a CSI sensing authorisation mechanism using the open source Openwifi project. UGnet master thesis 2022](https://github.com/open-sdr/openwifi-hw-img/raw/master/doc_repo/Seppe_Dejonckheere_masterproef.pdf)
- [Mathy Vanhoef, et al. Testing and Improving the Correctness of Wi-Fi Frame Injection. ACM WiSec 2023](https://papers.mathyvanhoef.com/wisec2023-wifi-injection.pdf)
**Openwifi was born in ORCA project (EU's Horizon2020 programme under agreement number 732174).**

2
driver/Makefile
View File

@ -1,6 +1,6 @@
# Xianjun jiao. putaoshu@msn.com; xianjun.jiao@imec.be
obj-m += sdr.o
obj-m += sdr.o openofdm_rx/openofdm_rx.o openofdm_tx/openofdm_tx.o tx_intf/tx_intf.o rx_intf/rx_intf.o xpu/xpu.o
all:
make -C $(KDIR) M=$(PWD) modules

6
driver/ad9361/README.md
View File

@ -1,6 +0,0 @@
<!--
Author: Xianjun Jiao
SPDX-FileCopyrightText: 2021 UGent
SPDX-License-Identifier: AGPL-3.0-or-later
-->
We don't maintain our own (modified) ad9361 driver anymore! The original ad9361 driver in the Linux kernel tree can be used with some extra EXPORT_SYMBOL.

9541
driver/ad9361/ad9361.c
View File

File diff suppressed because it is too large Load Diff

821
driver/ad9361/ad9361_conv.c
View File

@ -1,821 +0,0 @@
/*
* AD9361 Agile RF Transceiver
*
* Copyright 2013-2017 Analog Devices Inc.
*
* Licensed under the GPL-2.
*/
#include <linux/module.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/spi/spi.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/string.h>
#include <linux/uaccess.h>
#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clk-provider.h>
#include "ad9361.h"
#if IS_ENABLED(CONFIG_CF_AXI_ADC)
#include "cf_axi_adc.h"
static void ad9361_set_intf_delay(struct ad9361_rf_phy *phy, bool tx,
unsigned int clock_delay,
unsigned int data_delay, bool clock_changed)
{
if (clock_changed)
ad9361_ensm_force_state(phy, ENSM_STATE_ALERT);
ad9361_spi_write(phy->spi,
REG_RX_CLOCK_DATA_DELAY + (tx ? 1 : 0),
RX_DATA_DELAY(data_delay) |
DATA_CLK_DELAY(clock_delay));
if (clock_changed)
ad9361_ensm_force_state(phy, ENSM_STATE_FDD);
}
static unsigned int ad9361_num_phy_chan(struct axiadc_converter *conv)
{
if (conv->chip_info->num_channels > 4)
return 4;
return conv->chip_info->num_channels;
}
static int ad9361_check_pn(struct axiadc_converter *conv, bool tx,
unsigned int delay)
{
struct axiadc_state *st = iio_priv(conv->indio_dev);
unsigned int num_chan = ad9361_num_phy_chan(conv);
unsigned int chan;
for (chan = 0; chan < num_chan; chan++)
axiadc_write(st, ADI_REG_CHAN_STATUS(chan),
ADI_PN_ERR | ADI_PN_OOS);
mdelay(delay);
if (!tx && !(axiadc_read(st, ADI_REG_STATUS) & ADI_STATUS))
return 1;
for (chan = 0; chan < num_chan; chan++) {
if (axiadc_read(st, ADI_REG_CHAN_STATUS(chan)))
return 1;
}
return 0;
}
ssize_t ad9361_dig_interface_timing_analysis(struct ad9361_rf_phy *phy,
char *buf, unsigned buflen)
{
struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
struct ad9361_dig_tune_data data;
int i, j, len = 0;
int ret;
u8 field[16][16];
u8 rx;
if (!conv)
return -ENODEV;
ret = ad9361_get_dig_tune_data(phy, &data);
if (ret < 0)
return ret;
dev_dbg(&phy->spi->dev, "%s:\n", __func__);
rx = ad9361_spi_read(phy->spi, REG_RX_CLOCK_DATA_DELAY);
/* Mute TX, we don't want to transmit the PRBS */
ad9361_tx_mute(phy, 1);
ad9361_ensm_mode_disable_pinctrl(phy);
ad9361_bist_loopback(phy, 0);
ad9361_bist_prbs(phy, BIST_INJ_RX);
for (i = 0; i < 16; i++) {
for (j = 0; j < 16; j++) {
ad9361_set_intf_delay(phy, false, i, j, j == 0);
field[j][i] = ad9361_check_pn(conv, false, 1);
}
}
ad9361_ensm_force_state(phy, ENSM_STATE_ALERT);
ad9361_spi_write(phy->spi, REG_RX_CLOCK_DATA_DELAY, rx);
ad9361_bist_loopback(phy, data.bist_loopback_mode);
ad9361_write_bist_reg(phy, data.bist_config);
ad9361_ensm_mode_restore_pinctrl(phy);
ad9361_ensm_restore_state(phy, data.ensm_state);
ad9361_tx_mute(phy, 0);
len += snprintf(buf + len, buflen, "CLK: %lu Hz 'o' = PASS\n",
clk_get_rate(phy->clks[RX_SAMPL_CLK]));
len += snprintf(buf + len, buflen, "DC");
for (i = 0; i < 16; i++)
len += snprintf(buf + len, buflen, "%x:", i);
len += snprintf(buf + len, buflen, "\n");
for (i = 0; i < 16; i++) {
len += snprintf(buf + len, buflen, "%x:", i);
for (j = 0; j < 16; j++) {
len += snprintf(buf + len, buflen, "%c ",
(field[i][j] ? '.' : 'o'));
}
len += snprintf(buf + len, buflen, "\n");
}
len += snprintf(buf + len, buflen, "\n");
return len;
}
EXPORT_SYMBOL(ad9361_dig_interface_timing_analysis);
static ssize_t samples_pps_read(struct iio_dev *indio_dev,
uintptr_t private,
const struct iio_chan_spec *chan, char *buf)
{
struct axiadc_converter *conv = iio_device_get_drvdata(indio_dev);
struct axiadc_state *st = iio_priv(conv->indio_dev);
u32 config, val, mode;
config = axiadc_read(st, ADI_REG_CONFIG);
if (!(config & ADI_PPS_RECEIVER_ENABLE))
return -ENODEV;
val = axiadc_read(st, ADI_REG_CLOCKS_PER_PPS_STATUS);
if (val & ADI_CLOCKS_PER_PPS_STAT_INVAL)
return -ETIMEDOUT;
mode = axiadc_read(st, ADI_REG_CNTRL);
/*
* Counts DATA_CLK cycles therefore needs to be corrected
* for 2rx2tx mode or for LVDS vs. CMOS mode.
*/
val = axiadc_read(st, ADI_REG_CLOCKS_PER_PPS);
if (!(mode & ADI_R1_MODE))
val /= 2;
if (!(config & ADI_CMOS_OR_LVDS_N))
val /= 2;
return sprintf(buf, "%u\n", val);
}
/*
* Returns the number of samples during a 1PPS (Pulse Per Second) interval.
*/
static struct iio_chan_spec_ext_info axiadc_ext_info[] = {
{
.name = "samples_pps",
.read = samples_pps_read,
.shared = IIO_SHARED_BY_TYPE,
},
{},
};
#define AIM_CHAN(_chan, _si, _bits, _sign) \
{ .type = IIO_VOLTAGE, \
.indexed = 1, \
.channel = _chan, \
.info_mask_separate = BIT(IIO_CHAN_INFO_CALIBSCALE) | \
BIT(IIO_CHAN_INFO_CALIBBIAS) | \
BIT(IIO_CHAN_INFO_CALIBPHASE), \
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
.ext_info = axiadc_ext_info, \
.scan_index = _si, \
.scan_type = { \
.sign = _sign, \
.realbits = _bits, \
.storagebits = 16, \
.shift = 0, \
}, \
}
#define AIM_MC_CHAN(_chan, _si, _bits, _sign) \
{ .type = IIO_VOLTAGE, \
.indexed = 1, \
.channel = _chan, \
.scan_index = _si, \
.scan_type = { \
.sign = _sign, \
.realbits = _bits, \
.storagebits = 16, \
.shift = 0, \
}, \
}
static const unsigned long ad9361_2x2_available_scan_masks[] = {
0x01, 0x02, 0x04, 0x08, 0x03, 0x0C, /* 1 & 2 chan */
0x10, 0x20, 0x40, 0x80, 0x30, 0xC0, /* 1 & 2 chan */
0x33, 0xCC, 0xC3, 0x3C, 0x0F, 0xF0, /* 4 chan */
0xFF, /* 8 chan */
0x00,
};
static const unsigned long ad9361_available_scan_masks[] = {
0x01, 0x02, 0x04, 0x08, 0x03, 0x0C, 0x0F,
0x00,
};
static const struct axiadc_chip_info axiadc_chip_info_tbl[] = {
[ID_AD9361] = {
.name = "AD9361",
.max_rate = 61440000UL,
.max_testmode = 0,
.num_channels = 4,
.scan_masks = ad9361_available_scan_masks,
.channel[0] = AIM_CHAN(0, 0, 12, 'S'),
.channel[1] = AIM_CHAN(1, 1, 12, 'S'),
.channel[2] = AIM_CHAN(2, 2, 12, 'S'),
.channel[3] = AIM_CHAN(3, 3, 12, 'S'),
},
[ID_AD9361_2] = { /* MCS/MIMO 2x AD9361 */
.name = "AD9361-2",
.max_rate = 61440000UL,
.max_testmode = 0,
.num_channels = 8,
.num_shadow_slave_channels = 4,
.scan_masks = ad9361_2x2_available_scan_masks,
.channel[0] = AIM_CHAN(0, 0, 12, 'S'),
.channel[1] = AIM_CHAN(1, 1, 12, 'S'),
.channel[2] = AIM_CHAN(2, 2, 12, 'S'),
.channel[3] = AIM_CHAN(3, 3, 12, 'S'),
.channel[4] = AIM_MC_CHAN(4, 4, 12, 'S'),
.channel[5] = AIM_MC_CHAN(5, 5, 12, 'S'),
.channel[6] = AIM_MC_CHAN(6, 6, 12, 'S'),
.channel[7] = AIM_MC_CHAN(7, 7, 12, 'S'),
},
[ID_AD9364] = {
.name = "AD9364",
.max_rate = 61440000UL,
.max_testmode = 0,
.num_channels = 2,
.channel[0] = AIM_CHAN(0, 0, 12, 'S'),
.channel[1] = AIM_CHAN(1, 1, 12, 'S'),
},
};
static int ad9361_read_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int *val,
int *val2,
long m)
{
struct axiadc_converter *conv = iio_device_get_drvdata(indio_dev);
switch (m) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (!conv->clk)
return -ENODEV;
*val = conv->adc_clk = clk_get_rate(conv->clk);
return IIO_VAL_INT;
}
return -EINVAL;
}
static int ad9361_write_raw(struct iio_dev *indio_dev,
struct iio_chan_spec const *chan,
int val,
int val2,
long mask)
{
struct axiadc_converter *conv = iio_device_get_drvdata(indio_dev);
unsigned long r_clk;
int ret;
switch (mask) {
case IIO_CHAN_INFO_SAMP_FREQ:
if (!conv->clk)
return -ENODEV;
if (chan->extend_name)
return -ENODEV;
r_clk = clk_round_rate(conv->clk, val);
if (r_clk < 0 || r_clk > conv->chip_info->max_rate) {
dev_warn(&conv->spi->dev,
"Error setting ADC sample rate %ld", r_clk);
return -EINVAL;
}
ret = clk_set_rate(conv->clk, r_clk);
if (ret < 0)
return ret;
return 0;
break;
default:
return -EINVAL;
}
return 0;
}
int ad9361_hdl_loopback(struct ad9361_rf_phy *phy, bool enable)
{
struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
struct axiadc_state *st;
unsigned reg, addr, chan, version;
if (!conv)
return -ENODEV;
st = iio_priv(conv->indio_dev);
version = axiadc_read(st, 0x4000);
/* Still there but implemented a bit different */
if (ADI_AXI_PCORE_VER_MAJOR(version) > 7)
addr = 0x4418;
else
addr = 0x4414;
for (chan = 0; chan < conv->chip_info->num_channels; chan++) {
reg = axiadc_read(st, addr + (chan) * 0x40);
if (ADI_AXI_PCORE_VER_MAJOR(version) > 7) {
if (enable) {
if (reg != 0x8) {
conv->scratch_reg[chan] = reg;
reg = 0x8;
}
} else if (reg == 0x8) {
reg = conv->scratch_reg[chan];
}
} else {
/* DAC_LB_ENB If set enables loopback of receive data */
if (enable)
reg |= BIT(1);
else
reg &= ~BIT(1);
}
axiadc_write(st, addr + (chan) * 0x40, reg);
}
return 0;
}
EXPORT_SYMBOL(ad9361_hdl_loopback);
static int ad9361_iodelay_set(struct axiadc_state *st, unsigned lane,
unsigned val, bool tx)
{
if (tx) {
if (ADI_AXI_PCORE_VER_MAJOR(st->pcore_version) > 8)
axiadc_write(st, 0x4000 + ADI_REG_DELAY(lane), val);
else
return -ENODEV;
} else {
axiadc_idelay_set(st, lane, val);
}
return 0;
}
static int ad9361_midscale_iodelay(struct ad9361_rf_phy *phy, bool tx)
{
struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
struct axiadc_state *st = iio_priv(conv->indio_dev);
int ret = 0, i;
for (i = 0; i < 7; i++)
ret |= ad9361_iodelay_set(st, i, 15, tx);
return 0;
}
static int ad9361_dig_tune_iodelay(struct ad9361_rf_phy *phy, bool tx)
{
struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
struct axiadc_state *st = iio_priv(conv->indio_dev);
int i, j;
u32 s0, c0;
u8 field[32];
for (i = 0; i < 7; i++) {
for (j = 0; j < 32; j++) {
ad9361_iodelay_set(st, i, j, tx);
mdelay(1);
field[j] = ad9361_check_pn(conv, tx, 10);
}
c0 = ad9361_find_opt(&field[0], 32, &s0);
ad9361_iodelay_set(st, i, s0 + c0 / 2, tx);
dev_info(&phy->spi->dev,
"%s Lane %d, window cnt %d , start %d, IODELAY set to %d\n",
tx ? "TX" :"RX", i , c0, s0, s0 + c0 / 2);
}
return 0;
}
static void ad9361_dig_tune_verbose_print(struct ad9361_rf_phy *phy,
u8 field[][16], bool tx,
int sel_clk, int sel_data)
{
int i, j;
char c;
pr_info("SAMPL CLK: %lu tuning: %s\n",
clk_get_rate(phy->clks[RX_SAMPL_CLK]), tx ? "TX" : "RX");
pr_info(" ");
for (i = 0; i < 16; i++)
pr_cont("%x:", i);
pr_cont("\n");
for (i = 0; i < 2; i++) {
pr_info("%x:", i);
for (j = 0; j < 16; j++) {
if (field[i][j])
c = '#';
else if ((i == 0 && j == sel_data) ||
(i == 1 && j == sel_clk))
c = 'O';
else
c = 'o';
pr_cont("%c ", c);
}
pr_cont("\n");
}
}
static int ad9361_dig_tune_delay(struct ad9361_rf_phy *phy,
unsigned long max_freq,
enum dig_tune_flags flags, bool tx)
{
// static const unsigned int rates[3] = {25000000U, 40000000U, 61440000U};
static const unsigned int rates[3] = {25000000U, 40000000U, 40000000U};
struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
unsigned int s0, s1, c0, c1;
unsigned int i, j, r;
bool half_data_rate;
u8 field[2][16];
if (ad9361_uses_lvds_mode(phy) || !ad9361_uses_rx2tx2(phy))
half_data_rate = false;
else
half_data_rate = true;
memset(field, 0, 32);
for (r = 0; r < (max_freq ? ARRAY_SIZE(rates) : 1); r++) {
if (max_freq)
ad9361_set_trx_clock_chain_freq(phy,
half_data_rate ? rates[r] / 2 : rates[r]);
for (i = 0; i < 2; i++) {
for (j = 0; j < 16; j++) {
/*
* i == 0: clock delay = 0, data delay from 0 to 15
* i == 1: clock delay = 15, data delay from 15 to 0
*/
ad9361_set_intf_delay(phy, tx, i ? 15 : 0,
i ? 15 - j : j, j == 0);
field[i][j] |= ad9361_check_pn(conv, tx, 4);
}
}
if ((flags & BE_MOREVERBOSE) && max_freq) {
ad9361_dig_tune_verbose_print(phy, field, tx, -1, -1);
}
}
c0 = ad9361_find_opt(&field[0][0], 16, &s0);
c1 = ad9361_find_opt(&field[1][0], 16, &s1);
if (!c0 && !c1) {
ad9361_dig_tune_verbose_print(phy, field, tx, -1, -1);
dev_err(&phy->spi->dev, "%s: Tuning %s FAILED!", __func__,
tx ? "TX" : "RX");
return -EIO;
} else if (flags & BE_VERBOSE) {
ad9361_dig_tune_verbose_print(phy, field, tx,
c1 > c0 ? (s1 + c1 / 2) : -1,
c1 > c0 ? -1 : (s0 + c0 / 2));
}
if (c1 > c0)
ad9361_set_intf_delay(phy, tx, s1 + c1 / 2, 0, true);
else
ad9361_set_intf_delay(phy, tx, 0, s0 + c0 / 2, true);
return 0;
}
static int ad9361_dig_tune_rx(struct ad9361_rf_phy *phy, unsigned long max_freq,
enum dig_tune_flags flags)
{
struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
struct axiadc_state *st = iio_priv(conv->indio_dev);
int ret;
ad9361_bist_loopback(phy, 0);
ad9361_bist_prbs(phy, BIST_INJ_RX);
ret = ad9361_dig_tune_delay(phy, max_freq, flags, false);
if (flags & DO_IDELAY)
ad9361_dig_tune_iodelay(phy, false);
axiadc_write(st, ADI_REG_RSTN, ADI_MMCM_RSTN);
axiadc_write(st, ADI_REG_RSTN, ADI_RSTN | ADI_MMCM_RSTN);
return ret;
}
static int ad9361_dig_tune_tx(struct ad9361_rf_phy *phy, unsigned long max_freq,
enum dig_tune_flags flags)
{
struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
struct axiadc_state *st = iio_priv(conv->indio_dev);
u32 saved_dsel[4], saved_chan_ctrl6[4], saved_chan_ctrl0[4];
unsigned int chan, num_chan;
unsigned int hdl_dac_version;
u32 tmp, saved = 0;
int ret;
num_chan = ad9361_num_phy_chan(conv);
hdl_dac_version = axiadc_read(st, 0x4000);
ad9361_bist_prbs(phy, BIST_DISABLE);
ad9361_bist_loopback(phy, 1);
axiadc_write(st, 0x4000 + ADI_REG_RSTN, ADI_RSTN | ADI_MMCM_RSTN);
for (chan = 0; chan < num_chan; chan++) {
saved_chan_ctrl0[chan] = axiadc_read(st, ADI_REG_CHAN_CNTRL(chan));
axiadc_write(st, ADI_REG_CHAN_CNTRL(chan),
ADI_FORMAT_SIGNEXT | ADI_FORMAT_ENABLE |
ADI_ENABLE | ADI_IQCOR_ENB);
axiadc_set_pnsel(st, chan, ADC_PN_CUSTOM);
saved_chan_ctrl6[chan] = axiadc_read(st, 0x4414 + (chan) * 0x40);
if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) > 7) {
saved_dsel[chan] = axiadc_read(st, 0x4418 + (chan) * 0x40);
axiadc_write(st, 0x4418 + (chan) * 0x40, 9);
axiadc_write(st, 0x4414 + (chan) * 0x40, 0); /* !IQCOR_ENB */
axiadc_write(st, 0x4044, 1);
} else {
axiadc_write(st, 0x4414 + (chan) * 0x40, 1); /* DAC_PN_ENB */
}
}
if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) < 8) {
saved = tmp = axiadc_read(st, 0x4048);
tmp &= ~0xF;
tmp |= 1;
axiadc_write(st, 0x4048, tmp);
}
ret = ad9361_dig_tune_delay(phy, max_freq, flags, true);
if (flags & DO_ODELAY)
ad9361_dig_tune_iodelay(phy, true);
if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) < 8)
axiadc_write(st, 0x4048, saved);
for (chan = 0; chan < num_chan; chan++) {
axiadc_write(st, ADI_REG_CHAN_CNTRL(chan),
saved_chan_ctrl0[chan]);
axiadc_set_pnsel(st, chan, ADC_PN9);
if (ADI_AXI_PCORE_VER_MAJOR(hdl_dac_version) > 7) {
axiadc_write(st, 0x4418 + chan * 0x40,
saved_dsel[chan]);
axiadc_write(st, 0x4044, 1);
}
axiadc_write(st, 0x4414 + chan * 0x40, saved_chan_ctrl6[chan]);
}
return ret;
}
int ad9361_dig_tune(struct ad9361_rf_phy *phy, unsigned long max_freq,
enum dig_tune_flags flags)
{
struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
struct ad9361_dig_tune_data data;
struct axiadc_state *st;
bool restore = false;
int ret = 0;
if (!conv)
return -ENODEV;
ret = ad9361_get_dig_tune_data(phy, &data);
if (ret < 0)
return ret;
dev_dbg(&phy->spi->dev, "%s: freq %lu flags 0x%X\n", __func__,
max_freq, flags);
st = iio_priv(conv->indio_dev);
if ((data.skip_mode == SKIP_ALL) ||
(flags & RESTORE_DEFAULT)) {
/* skip completely and use defaults */
restore = true;
} else {
/* Mute TX, we don't want to transmit the PRBS */
ad9361_tx_mute(phy, 1);
ad9361_ensm_mode_disable_pinctrl(phy);
if (flags & DO_IDELAY)
ad9361_midscale_iodelay(phy, false);
if (flags & DO_ODELAY)
ad9361_midscale_iodelay(phy, true);
ret = ad9361_dig_tune_rx(phy, max_freq, flags);
if (ret == 0 && (data.skip_mode == TUNE_RX_TX))
ret = ad9361_dig_tune_tx(phy, max_freq, flags);
ad9361_bist_loopback(phy, data.bist_loopback_mode);
ad9361_write_bist_reg(phy, data.bist_config);
if (ret == -EIO)
restore = true;
if (!max_freq)
ret = 0;
}
if (restore) {
ad9361_ensm_force_state(phy, ENSM_STATE_ALERT);
ad9361_write_clock_data_delays(phy);
} else if (!(flags & SKIP_STORE_RESULT)) {
ad9361_read_clock_data_delays(phy);
}
ad9361_ensm_mode_restore_pinctrl(phy);
ad9361_ensm_restore_state(phy, data.ensm_state);
axiadc_write(st, ADI_REG_RSTN, ADI_MMCM_RSTN);
axiadc_write(st, ADI_REG_RSTN, ADI_RSTN | ADI_MMCM_RSTN);
ad9361_tx_mute(phy, 0);
return ret;
}
EXPORT_SYMBOL(ad9361_dig_tune);
static int ad9361_post_setup(struct iio_dev *indio_dev)
{
struct axiadc_state *st = iio_priv(indio_dev);
struct axiadc_converter *conv = iio_device_get_drvdata(indio_dev);
struct ad9361_rf_phy *phy = conv->phy;
bool rx2tx2 = ad9361_uses_rx2tx2(phy);
unsigned tmp, num_chan, flags;
int i, ret;
num_chan = ad9361_num_phy_chan(conv);
conv->indio_dev = indio_dev;
axiadc_write(st, ADI_REG_CNTRL, rx2tx2 ? 0 : ADI_R1_MODE);
tmp = axiadc_read(st, 0x4048);
if (!rx2tx2) {
axiadc_write(st, 0x4048, tmp | BIT(5)); /* R1_MODE */
axiadc_write(st, 0x404c,
ad9361_uses_lvds_mode(phy) ? 1 : 0); /* RATE */
} else {
tmp &= ~BIT(5);
axiadc_write(st, 0x4048, tmp);
axiadc_write(st, 0x404c,
ad9361_uses_lvds_mode(phy) ? 3 : 1); /* RATE */
}
for (i = 0; i < num_chan; i++) {
axiadc_write(st, ADI_REG_CHAN_CNTRL_1(i),
ADI_DCFILT_OFFSET(0));
axiadc_write(st, ADI_REG_CHAN_CNTRL_2(i),
(i & 1) ? 0x00004000 : 0x40000000);
axiadc_write(st, ADI_REG_CHAN_CNTRL(i),
ADI_FORMAT_SIGNEXT | ADI_FORMAT_ENABLE |
ADI_ENABLE | ADI_IQCOR_ENB);
}
flags = 0;
ret = ad9361_dig_tune(phy, (axiadc_read(st, ADI_AXI_REG_ID)) ?
0 : 61440000, flags);
if (ret < 0)
goto error;
if (flags & (DO_IDELAY | DO_ODELAY)) {
ret = ad9361_dig_tune(phy, (axiadc_read(st, ADI_AXI_REG_ID)) ?
0 : 61440000, flags & BE_VERBOSE);
if (ret < 0)
goto error;
}
ret = ad9361_set_trx_clock_chain_default(phy);
ad9361_ensm_force_state(phy, ENSM_STATE_ALERT);
ad9361_ensm_restore_prev_state(phy);
return 0;
error:
spi_set_drvdata(phy->spi, NULL);
return ret;
}
int ad9361_register_axi_converter(struct ad9361_rf_phy *phy)
{
struct axiadc_converter *conv;
struct spi_device *spi = phy->spi;
int ret;
conv = devm_kzalloc(&spi->dev, sizeof(*conv), GFP_KERNEL);
if (conv == NULL)
return -ENOMEM;
conv->id = ad9361_spi_read(spi, REG_PRODUCT_ID) & PRODUCT_ID_MASK;
if (conv->id != PRODUCT_ID_9361) {
dev_err(&spi->dev, "Unrecognized CHIP_ID 0x%X\n", conv->id);
ret = -ENODEV;
goto out;
}
conv->chip_info = &axiadc_chip_info_tbl[
(spi_get_device_id(spi)->driver_data == ID_AD9361_2) ?
ID_AD9361_2 : ad9361_uses_rx2tx2(phy) ? ID_AD9361 : ID_AD9364];
conv->write_raw = ad9361_write_raw;
conv->read_raw = ad9361_read_raw;
conv->post_setup = ad9361_post_setup;
conv->spi = spi;
conv->phy = phy;
conv->clk = phy->clks[RX_SAMPL_CLK];
conv->adc_clk = clk_get_rate(conv->clk);
spi_set_drvdata(spi, conv); /* Take care here */
return 0;
out:
spi_set_drvdata(spi, NULL);
return ret;
}
EXPORT_SYMBOL(ad9361_register_axi_converter);
struct ad9361_rf_phy* ad9361_spi_to_phy(struct spi_device *spi)
{
struct axiadc_converter *conv = spi_get_drvdata(spi);
return conv->phy;
}
EXPORT_SYMBOL(ad9361_spi_to_phy);
#else /* CONFIG_CF_AXI_ADC */
int ad9361_dig_tune(struct ad9361_rf_phy *phy, unsigned long max_freq,
enum dig_tune_flags flags)
{
return -ENODEV;
}
EXPORT_SYMBOL(ad9361_dig_tune);
ssize_t ad9361_dig_interface_timing_analysis(struct ad9361_rf_phy *phy,
char *buf, unsigned buflen)
{
return 0;
}
EXPORT_SYMBOL(ad9361_dig_interface_timing_analysis);
int ad9361_hdl_loopback(struct ad9361_rf_phy *phy, bool enable)
{
return -ENODEV;
}
EXPORT_SYMBOL(ad9361_hdl_loopback);
int ad9361_register_axi_converter(struct ad9361_rf_phy *phy)
{
struct spi_device *spi = phy->spi;
spi_set_drvdata(spi, phy); /* Take care here */
return 0;
}
EXPORT_SYMBOL(ad9361_register_axi_converter);
struct ad9361_rf_phy* ad9361_spi_to_phy(struct spi_device *spi)
{
return spi_get_drvdata(spi);
}
EXPORT_SYMBOL(ad9361_spi_to_phy);
#endif /* CONFIG_CF_AXI_ADC */

36
driver/hw_def.h
View File

@ -205,6 +205,7 @@ const char *openofdm_rx_compatible_str = "sdr,openofdm_rx";
#define OPENOFDM_RX_REG_POWER_THRES_ADDR (2*4)
#define OPENOFDM_RX_REG_MIN_PLATEAU_ADDR (3*4)
#define OPENOFDM_RX_REG_SOFT_DECODING_ADDR (4*4)
#define OPENOFDM_RX_REG_FFT_WIN_SHIFT_ADDR (5*4)
#define OPENOFDM_RX_REG_STATE_HISTORY_ADDR (20*4)
enum openofdm_rx_mode {
@ -236,11 +237,16 @@ enum openofdm_rx_mode {
// 11a/g BPSK 6m, Rx sensitivity level dmesg report -86dBm
// priv->rssi_correction = 148; rssi_half_db/2 = 148-86=62; rssi_half_db = 124
#define OPENOFDM_RX_RSSI_DBM_TH_DEFAULT (-84)
#define OPENOFDM_RX_RSSI_DBM_TH_DEFAULT (-85) //-85 will remove lots of false alarm. the best openwifi reported sensitivity is like -90/-92 (set it manually if conductive test with wifi tester)
#define OPENOFDM_RX_DC_RUNNING_SUM_TH_INIT 64
#define OPENOFDM_RX_MIN_PLATEAU_INIT 100
#define OPENOFDM_RX_FFT_WIN_SHIFT_INIT 1
#define OPENOFDM_RX_SMALL_EQ_OUT_COUNTER_TH 48
#define OPENWIFI_MAX_SIGNAL_LEN_TH 1700 //Packet longer than this threshold will result in receiver early termination. It goes to openofdm_rx/xpu/rx_intf
#define OPENWIFI_MAX_SIGNAL_LEN_TH 1700 //Packet longer than this threshold will result in receiver early termination. It goes to openofdm_rx/xpu/rx_intf
#define OPENWIFI_MIN_SIGNAL_LEN_TH 14 //Packet shorter than this threshold will result in receiver early termination. It goes to openofdm_rx/xpu/rx_intf
//due to CRC32, at least 4 bytes needed to push out expected CRC result
struct openofdm_rx_driver_api {
u32 (*hw_init)(enum openofdm_rx_mode mode);
@ -255,6 +261,7 @@ struct openofdm_rx_driver_api {
void (*OPENOFDM_RX_REG_POWER_THRES_write)(u32 value);
void (*OPENOFDM_RX_REG_MIN_PLATEAU_write)(u32 value);
void (*OPENOFDM_RX_REG_SOFT_DECODING_write)(u32 value);
void (*OPENOFDM_RX_REG_FFT_WIN_SHIFT_write)(u32 value);
};
// ---------------------------------------openofdm tx-------------------------------
@ -310,9 +317,9 @@ const char *xpu_compatible_str = "sdr,xpu";
#define XPU_REG_SEND_ACK_WAIT_TOP_ADDR (18*4)
#define XPU_REG_CSMA_CFG_ADDR (19*4)
#define XPU_REG_SLICE_COUNT_TOTAL_ADDR (20*4)
#define XPU_REG_SLICE_COUNT_START_ADDR (21*4)
#define XPU_REG_SLICE_COUNT_END_ADDR (22*4)
#define XPU_REG_SLICE_COUNT_TOTAL_ADDR (20*4)
#define XPU_REG_SLICE_COUNT_START_ADDR (21*4)
#define XPU_REG_SLICE_COUNT_END_ADDR (22*4)
#define XPU_REG_CTS_TO_RTS_CONFIG_ADDR (26*4)
#define XPU_REG_FILTER_FLAG_ADDR (27*4)
@ -321,26 +328,11 @@ const char *xpu_compatible_str = "sdr,xpu";
#define XPU_REG_MAC_ADDR_LOW_ADDR (30*4)
#define XPU_REG_MAC_ADDR_HIGH_ADDR (31*4)
#define XPU_REG_FC_DI_ADDR (34*4)
#define XPU_REG_ADDR1_LOW_ADDR (35*4)
#define XPU_REG_ADDR1_HIGH_ADDR (36*4)
#define XPU_REG_ADDR2_LOW_ADDR (37*4)
#define XPU_REG_ADDR2_HIGH_ADDR (38*4)
#define XPU_REG_ADDR3_LOW_ADDR (39*4)
#define XPU_REG_ADDR3_HIGH_ADDR (40*4)
#define XPU_REG_SC_LOW_ADDR (41*4)
#define XPU_REG_ADDR4_HIGH_ADDR (42*4)
#define XPU_REG_ADDR4_LOW_ADDR (43*4)
#define XPU_REG_TRX_STATUS_ADDR (50*4)
#define XPU_REG_TX_RESULT_ADDR (51*4)
#define XPU_REG_TSF_RUNTIME_VAL_LOW_ADDR (58*4)
#define XPU_REG_TSF_RUNTIME_VAL_HIGH_ADDR (59*4)
#define XPU_REG_RSSI_HALF_DB_ADDR (60*4)
#define XPU_REG_IQ_RSSI_HALF_DB_ADDR (61*4)
#define XPU_REG_MAC_ADDR_READ_BACK_ADDR (62*4)
#define XPU_REG_FPGA_GIT_REV_ADDR (63*4)
enum xpu_mode {
XPU_TEST = 0,

13
driver/make_all.sh
View File

@ -31,7 +31,7 @@ else
exit 1
fi
if [ -d "$XILINX_DIR/SDK" ]; then
if [ -d "$XILINX_DIR/Vitis" ]; then
echo "\$XILINX_DIR is found!"
else
echo "\$XILINX_DIR is not correct. Please check!"
@ -72,7 +72,7 @@ if [[ -n $7 ]]; then
echo "#define $DEFINE5" >> pre_def.h
fi
source $XILINX_DIR/SDK/2018.3/settings64.sh
source $XILINX_DIR/Vitis/2021.1/settings64.sh
if [ "$ARCH_OPTION" == "64" ]; then
LINUX_KERNEL_SRC_DIR=$OPENWIFI_DIR/adi-linux-64/
ARCH="arm64"
@ -85,7 +85,7 @@ fi
# check if user entered the right path to analog device linux
if [ -d "$LINUX_KERNEL_SRC_DIR" ]; then
echo " setup linux kernel path ${LINUX_KERNEL_SRC_DIR}"
echo "setup linux kernel path ${LINUX_KERNEL_SRC_DIR}"
else
echo "Error: path to adi linux: ${LINUX_KERNEL_SRC_DIR} not found. Can not continue."
exit 1
@ -101,7 +101,6 @@ if git log -1; then
else
echo "#define GIT_REV 0xFFFFFFFF" > git_rev.h
fi
make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE
cd $OPENWIFI_DIR/driver/openofdm_tx
make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE
cd $OPENWIFI_DIR/driver/openofdm_rx
@ -115,4 +114,10 @@ make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE
# cd $OPENWIFI_DIR/driver/ad9361
# make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE
cd $OPENWIFI_DIR/driver/side_ch
./make_driver.sh $XILINX_DIR $ARCH_OPTION
cd $OPENWIFI_DIR/driver/
make KDIR=$LINUX_KERNEL_SRC_DIR ARCH=$ARCH CROSS_COMPILE=$CROSS_COMPILE
cd $home_dir

7
driver/openofdm_rx/openofdm_rx.c
View File

@ -55,6 +55,9 @@ static inline void OPENOFDM_RX_REG_MIN_PLATEAU_write(u32 Data) {
static inline void OPENOFDM_RX_REG_SOFT_DECODING_write(u32 Data) {
reg_write(OPENOFDM_RX_REG_SOFT_DECODING_ADDR, Data);
}
static inline void OPENOFDM_RX_REG_FFT_WIN_SHIFT_write(u32 Data) {
reg_write(OPENOFDM_RX_REG_FFT_WIN_SHIFT_ADDR, Data);
}
static const struct of_device_id dev_of_ids[] = {
{ .compatible = "sdr,openofdm_rx", },
{}
@ -93,7 +96,8 @@ static inline u32 hw_init(enum openofdm_rx_mode mode){
// 1) power threshold configuration and reset
openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write((OPENOFDM_RX_DC_RUNNING_SUM_TH_INIT<<16)|OPENOFDM_RX_POWER_THRES_INIT); // turn on signal watchdog by default
openofdm_rx_api->OPENOFDM_RX_REG_MIN_PLATEAU_write(OPENOFDM_RX_MIN_PLATEAU_INIT);
openofdm_rx_api->OPENOFDM_RX_REG_SOFT_DECODING_write((OPENWIFI_MAX_SIGNAL_LEN_TH<<16)|1); //bit1 enable soft decoding; bit31~16 max pkt length threshold
openofdm_rx_api->OPENOFDM_RX_REG_SOFT_DECODING_write((OPENWIFI_MAX_SIGNAL_LEN_TH<<16)|(OPENWIFI_MIN_SIGNAL_LEN_TH<<12)|1); //bit1 enable soft decoding; bit15~12 min pkt length threshold; bit31~16 max pkt length threshold
openofdm_rx_api->OPENOFDM_RX_REG_FFT_WIN_SHIFT_write((OPENOFDM_RX_SMALL_EQ_OUT_COUNTER_TH<<4)|OPENOFDM_RX_FFT_WIN_SHIFT_INIT);
//rst
for (i=0;i<8;i++)
@ -139,6 +143,7 @@ static int dev_probe(struct platform_device *pdev)
openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write=OPENOFDM_RX_REG_POWER_THRES_write;
openofdm_rx_api->OPENOFDM_RX_REG_MIN_PLATEAU_write=OPENOFDM_RX_REG_MIN_PLATEAU_write;
openofdm_rx_api->OPENOFDM_RX_REG_SOFT_DECODING_write=OPENOFDM_RX_REG_SOFT_DECODING_write;
openofdm_rx_api->OPENOFDM_RX_REG_FFT_WIN_SHIFT_write=OPENOFDM_RX_REG_FFT_WIN_SHIFT_write;
/* Request and map I/O memory */
io = platform_get_resource(pdev, IORESOURCE_MEM, 0);

52
driver/sdr.c
View File

@ -44,6 +44,8 @@
#include <linux/gpio.h>
#include <linux/leds.h>
// #include <linux/time.h>
#define IIO_AD9361_USE_PRIVATE_H_
#include <../../drivers/iio/adc/ad9361_regs.h>
#include <../../drivers/iio/adc/ad9361.h>
@ -174,22 +176,23 @@ inline int rssi_correction_lookup_table(u32 freq_MHz)
inline void ad9361_tx_calibration(struct openwifi_priv *priv, u32 actual_tx_lo)
{
struct timeval tv;
unsigned long time_before = 0;
unsigned long time_after = 0;
// struct timespec64 tv;
// unsigned long time_before = 0;
// unsigned long time_after = 0;
u32 spi_disable;
priv->last_tx_quad_cal_lo = actual_tx_lo;
do_gettimeofday(&tv);
time_before = tv.tv_usec + ((u64)1000000ull)*((u64)tv.tv_sec );
// do_gettimeofday(&tv);
// time_before = tv.tv_usec + ((u64)1000000ull)*((u64)tv.tv_sec );
spi_disable = xpu_api->XPU_REG_SPI_DISABLE_read(); // backup current fpga spi disable state
xpu_api->XPU_REG_SPI_DISABLE_write(1); // disable FPGA SPI module
ad9361_do_calib_run(priv->ad9361_phy, TX_QUAD_CAL, (int)priv->ad9361_phy->state->last_tx_quad_cal_phase);
xpu_api->XPU_REG_SPI_DISABLE_write(spi_disable); // restore original SPI disable state
do_gettimeofday(&tv);
time_after = tv.tv_usec + ((u64)1000000ull)*((u64)tv.tv_sec );
// do_gettimeofday(&tv);
// time_after = tv.tv_usec + ((u64)1000000ull)*((u64)tv.tv_sec );
printk("%s ad9361_tx_calibration %dMHz tx_quad_cal duration %lu us\n", sdr_compatible_str, actual_tx_lo, time_after-time_before);
// printk("%s ad9361_tx_calibration %dMHz tx_quad_cal duration %lu us\n", sdr_compatible_str, actual_tx_lo, time_after-time_before);
printk("%s ad9361_tx_calibration %dMHz tx_quad_cal duration unknown us\n", sdr_compatible_str, actual_tx_lo);
}
inline void openwifi_rf_rx_update_after_tuning(struct openwifi_priv *priv, u32 actual_rx_lo)
@ -200,10 +203,7 @@ inline void openwifi_rf_rx_update_after_tuning(struct openwifi_priv *priv, u32 a
priv->rssi_correction = rssi_correction_lookup_table(actual_rx_lo);
// set appropriate lbt threshold
// xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62)<<1); // -62dBm
// xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62-16)<<1); // wei's magic value is 135, here is 134 @ ch 44
// auto_lbt_th = ((priv->rssi_correction-62-16)<<1);
auto_lbt_th = rssi_dbm_to_rssi_half_db(-78, priv->rssi_correction); // -78dBm, the same as above ((priv->rssi_correction-62-16)<<1)
auto_lbt_th = rssi_dbm_to_rssi_half_db(-62, priv->rssi_correction); // -62dBm
static_lbt_th = rssi_dbm_to_rssi_half_db(-(priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_LBT_TH]), priv->rssi_correction);
fpga_lbt_th = (priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_LBT_TH]==0?auto_lbt_th:static_lbt_th);
xpu_api->XPU_REG_LBT_TH_write(fpga_lbt_th);
@ -1097,7 +1097,8 @@ static void openwifi_tx(struct ieee80211_hw *dev,
if (use_ht_aggr && rate_hw_value==0)
rate_hw_value = 1;
sifs = (priv->actual_rx_lo<2500?10:16);
// sifs = (priv->actual_rx_lo<2500?10:16);
sifs = 16; // for ofdm, sifs is always 16
if (use_ht_rate) {
// printk("%s openwifi_tx: rate_hw_value %d aggr %d sifs %d\n", sdr_compatible_str, rate_hw_value, use_ht_aggr, sifs);
@ -1569,18 +1570,24 @@ static int openwifi_start(struct ieee80211_hw *dev)
rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable rx interrupt by interrupt test mode
rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status
priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm");
// priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm");
priv->rx_chan = dma_request_chan(&(priv->pdev->dev), "rx_dma_s2mm");
if (IS_ERR(priv->rx_chan) || priv->rx_chan==NULL) {
ret = PTR_ERR(priv->rx_chan);
pr_err("%s openwifi_start: No Rx channel ret %d priv->rx_chan 0x%p\n",sdr_compatible_str, ret, priv->rx_chan);
goto err_dma;
if (ret != -EPROBE_DEFER) {
pr_err("%s openwifi_start: No Rx channel ret %d priv->rx_chan 0x%p\n",sdr_compatible_str, ret, priv->rx_chan);
goto err_dma;
}
}
priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s");
// priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s");
priv->tx_chan = dma_request_chan(&(priv->pdev->dev), "tx_dma_mm2s");
if (IS_ERR(priv->tx_chan) || priv->tx_chan==NULL) {
ret = PTR_ERR(priv->tx_chan);
pr_err("%s openwifi_start: No Tx channel ret %d priv->tx_chan 0x%p\n",sdr_compatible_str, ret, priv->tx_chan);
goto err_dma;
if (ret != -EPROBE_DEFER) {
pr_err("%s openwifi_start: No Tx channel ret %d priv->tx_chan 0x%p\n",sdr_compatible_str, ret, priv->tx_chan);
goto err_dma;
}
}
printk("%s openwifi_start: DMA channel setup successfully. priv->rx_chan 0x%p priv->tx_chan 0x%p\n",sdr_compatible_str, priv->rx_chan, priv->tx_chan);
@ -2085,16 +2092,16 @@ static const struct of_device_id openwifi_dev_of_ids[] = {
};
MODULE_DEVICE_TABLE(of, openwifi_dev_of_ids);
static int custom_match_spi_dev(struct device *dev, void *data)
static int custom_match_spi_dev(struct device *dev, const void *data)
{
const char *name = data;
const char *name = data;
bool ret = sysfs_streq(name, dev->of_node->name);
printk("%s custom_match_spi_dev %s %s %d\n", sdr_compatible_str,name, dev->of_node->name, ret);
return ret;
}
static int custom_match_platform_dev(struct device *dev, void *data)
static int custom_match_platform_dev(struct device *dev, const void *data)
{
struct platform_device *plat_dev = to_platform_device(dev);
const char *name = data;
@ -2440,7 +2447,6 @@ static int openwifi_dev_probe(struct platform_device *pdev)
* is mapped on the highst tx ring IDX.
*/
dev->queues = MAX_NUM_HW_QUEUE;
//dev->queues = 1;
ieee80211_hw_set(dev, SIGNAL_DBM);

111
driver/sdr.h
View File

@ -129,7 +129,10 @@ enum sdrctl_reg_cat {
#define LEN_PHY_CRC 4
#define LEN_MPDU_DELIM 4
#define RING_ROOM_THRESHOLD 2
#define MAX_NUM_HW_QUEUE 4 // number of queue in FPGA
#define MAX_NUM_SW_QUEUE 4 // number of queue in Linux, depends on the number we report by dev->queues in openwifi_dev_probe
#define RING_ROOM_THRESHOLD (2+MAX_NUM_SW_QUEUE) // MAX_NUM_SW_QUEUE is for the room of MAX_NUM_SW_QUEUE last packets from MAX_NUM_SW_QUEUE queue before stop
#define NUM_BIT_NUM_TX_BD 6
#define NUM_TX_BD (1<<NUM_BIT_NUM_TX_BD) // !!! should align to the fifo size in tx_bit_intf.v
@ -143,8 +146,6 @@ enum sdrctl_reg_cat {
#define RX_BD_BUF_SIZE (2048)
#define NUM_BIT_MAX_NUM_HW_QUEUE 2
#define MAX_NUM_HW_QUEUE 4 // number of queue in FPGA
#define MAX_NUM_SW_QUEUE 4 // number of queue in Linux, depends on the number we report by dev->queues in openwifi_dev_probe
#define NUM_BIT_MAX_PHY_TX_SN 10 // decrease 12 to 10 to reserve 2 bits storing related linux prio idx
#define MAX_PHY_TX_SN ((1<<NUM_BIT_MAX_PHY_TX_SN)-1)
@ -350,30 +351,30 @@ static const u16 wifi_n_dbps_ht_table[16] = {26, 26, 26, 26, 26, 52, 78
// ===== copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c =====
struct cf_axi_dds_state {
struct device *dev_spi;
struct clk *clk;
struct device *dev_spi;
struct clk *clk;
struct cf_axi_dds_chip_info *chip_info;
struct gpio_desc *plddrbypass_gpio;
struct gpio_desc *interpolation_gpio;
struct gpio_desc *plddrbypass_gpio;
struct gpio_desc *interpolation_gpio;
bool standalone;
bool dp_disable;
bool enable;
bool pl_dma_fifo_en;
enum fifo_ctrl gpio_dma_fifo_ctrl;
bool standalone;
bool dp_disable;
bool enable;
bool pl_dma_fifo_en;
enum fifo_ctrl gpio_dma_fifo_ctrl;
struct iio_info iio_info;
size_t regs_size;
void __iomem *regs;
void __iomem *slave_regs;
void __iomem *master_regs;
u64 dac_clk;
unsigned int ddr_dds_interp_en;
unsigned int cached_freq[16];
unsigned int version;
unsigned int have_slave_channels;
unsigned int interpolation_factor;
struct notifier_block clk_nb;
struct iio_info iio_info;
size_t regs_size;
void __iomem *regs;
void __iomem *slave_regs;
void __iomem *master_regs;
u64 dac_clk;
unsigned int ddr_dds_interp_en;
unsigned int cached_freq[16];
unsigned int version;
unsigned int have_slave_channels;
unsigned int interpolation_factor;
struct notifier_block clk_nb;
};
// ===== end of copy from adi-linux/drivers/iio/frequency/cf_axi_dds.c =====
@ -445,16 +446,16 @@ struct openwifi_stat {
#define RX_DMA_CYCLIC_MODE
struct openwifi_priv {
struct platform_device *pdev;
struct ieee80211_vif *vif[MAX_NUM_VIF];
struct platform_device *pdev;
struct ieee80211_vif *vif[MAX_NUM_VIF];
const struct openwifi_rf_ops *rf;
enum openwifi_fpga_type fpga_type;
enum openwifi_fpga_type fpga_type;
struct cf_axi_dds_state *dds_st; //axi_ad9361 hdl ref design module, dac channel
struct axiadc_state *adc_st; //axi_ad9361 hdl ref design module, adc channel
struct ad9361_rf_phy *ad9361_phy; //ad9361 chip
struct ctrl_outs_control ctrl_out;
struct cf_axi_dds_state *dds_st; //axi_ad9361 hdl ref design module, dac channel
struct axiadc_state *adc_st; //axi_ad9361 hdl ref design module, adc channel
struct ad9361_rf_phy *ad9361_phy; //ad9361 chip
struct ctrl_outs_control ctrl_out;
int rx_freq_offset_to_lo_MHz;
int tx_freq_offset_to_lo_MHz;
@ -463,51 +464,51 @@ struct openwifi_priv {
u32 actual_tx_lo;
u32 last_tx_quad_cal_lo;
struct ieee80211_rate rates_2GHz[12];
struct ieee80211_rate rates_5GHz[12];
struct ieee80211_channel channels_2GHz[13];
struct ieee80211_channel channels_5GHz[11];
struct ieee80211_rate rates_2GHz[12];
struct ieee80211_rate rates_5GHz[12];
struct ieee80211_channel channels_2GHz[13];
struct ieee80211_channel channels_5GHz[11];
struct ieee80211_supported_band band_2GHz;
struct ieee80211_supported_band band_5GHz;
bool rfkill_off;
u8 runtime_tx_ant_cfg;
u8 runtime_rx_ant_cfg;
u8 runtime_tx_ant_cfg;
u8 runtime_rx_ant_cfg;
int rssi_correction; // dynamic RSSI correction according to current channel in _rf_set_channel()
int rssi_correction; // dynamic RSSI correction according to current channel in _rf_set_channel()
enum rx_intf_mode rx_intf_cfg;
enum tx_intf_mode tx_intf_cfg;
enum rx_intf_mode rx_intf_cfg;
enum tx_intf_mode tx_intf_cfg;
enum openofdm_rx_mode openofdm_rx_cfg;
enum openofdm_tx_mode openofdm_tx_cfg;
enum xpu_mode xpu_cfg;
enum xpu_mode xpu_cfg;
int irq_rx;
int irq_tx;
// u32 call_counter;
u8 *rx_cyclic_buf;
dma_addr_t rx_cyclic_buf_dma_mapping_addr;
struct dma_chan *rx_chan;
u8 *rx_cyclic_buf;
dma_addr_t rx_cyclic_buf_dma_mapping_addr;
struct dma_chan *rx_chan;
struct dma_async_tx_descriptor *rxd;
dma_cookie_t rx_cookie;
dma_cookie_t rx_cookie;
struct openwifi_ring tx_ring[MAX_NUM_SW_QUEUE];
struct scatterlist tx_sg;
struct dma_chan *tx_chan;
struct openwifi_ring tx_ring[MAX_NUM_SW_QUEUE];
struct scatterlist tx_sg;
struct dma_chan *tx_chan;
struct dma_async_tx_descriptor *txd;
dma_cookie_t tx_cookie;
dma_cookie_t tx_cookie;
// struct completion tx_dma_complete;
// bool openwifi_tx_first_time_run;
// int phy_tx_sn;
u32 slice_idx;
u32 dest_mac_addr_queue_map[MAX_NUM_HW_QUEUE];
u8 mac_addr[ETH_ALEN];
u8 mac_addr[ETH_ALEN];
u16 seqno;
bool use_short_slot;
u8 band;
u16 channel;
u8 band;
u16 channel;
u32 ampdu_reference;
@ -518,9 +519,9 @@ struct openwifi_priv {
int last_auto_fpga_lbt_th;
struct bin_attribute bin_iq;
u32 tx_intf_arbitrary_iq[512];
u16 tx_intf_arbitrary_iq_num;
u8 tx_intf_iq_ctl;
u32 tx_intf_arbitrary_iq[512];
u16 tx_intf_arbitrary_iq_num;
u8 tx_intf_iq_ctl;
struct openwifi_stat stat;
// u8 num_led;

6
driver/sdrctl_intf.c
View File

@ -340,10 +340,10 @@ static int openwifi_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *
tmp_int = (-reg_val); // rssi_dbm
tmp = rssi_dbm_to_rssi_half_db(tmp_int, priv->rssi_correction);
xpu_api->XPU_REG_LBT_TH_write( tmp );
printk("%s override FPGA LBT threshold to %d(%ddBm). The last_auto_fpga_lbt_th %d(%ddBm)\n", sdr_compatible_str, tmp, tmp_int, priv->last_auto_fpga_lbt_th, rssi_half_db_to_rssi_dbm(priv->last_auto_fpga_lbt_th, priv->rssi_correction));
printk("%s override FPGA LBT threshold to %d(%ddBm). The last_auto_fpga_lbt_th %d(%ddBm). rssi corr %d (%d/%dMHz)\n", sdr_compatible_str, tmp, tmp_int, priv->last_auto_fpga_lbt_th, rssi_half_db_to_rssi_dbm(priv->last_auto_fpga_lbt_th, priv->rssi_correction), priv->rssi_correction, priv->actual_tx_lo, priv->actual_rx_lo);
} else {
xpu_api->XPU_REG_LBT_TH_write(priv->last_auto_fpga_lbt_th);
printk("%s Restore last_auto_fpga_lbt_th %d(%ddBm) to FPGA. ad9361_rf_set_channel will take control\n", sdr_compatible_str, priv->last_auto_fpga_lbt_th, rssi_half_db_to_rssi_dbm(priv->last_auto_fpga_lbt_th, priv->rssi_correction));
printk("%s Restore last_auto_fpga_lbt_th %d(%ddBm) to FPGA. ad9361_rf_set_channel will take control. rssi corr %d (%d/%dMHz)\n", sdr_compatible_str, priv->last_auto_fpga_lbt_th, rssi_half_db_to_rssi_dbm(priv->last_auto_fpga_lbt_th, priv->rssi_correction), priv->rssi_correction, priv->actual_tx_lo, priv->actual_rx_lo);
}
}
} else {
@ -412,7 +412,7 @@ static int openwifi_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *
if (reg_addr_idx==DRV_XPU_REG_IDX_LBT_TH) {
tmp = xpu_api->XPU_REG_LBT_TH_read();//rssi_half_db
tmp_int = rssi_half_db_to_rssi_dbm(tmp, priv->rssi_correction); //rssi_dbm
printk("%s FPGA LBT threshold %d(%ddBm). The last_auto_fpga_lbt_th %d(%ddBm)\n", sdr_compatible_str, tmp, tmp_int, priv->last_auto_fpga_lbt_th, rssi_half_db_to_rssi_dbm(priv->last_auto_fpga_lbt_th, priv->rssi_correction));
printk("%s FPGA LBT threshold %d(%ddBm). The last_auto_fpga_lbt_th %d(%ddBm). rssi corr %d (%d/%dMHz)\n", sdr_compatible_str, tmp, tmp_int, priv->last_auto_fpga_lbt_th, rssi_half_db_to_rssi_dbm(priv->last_auto_fpga_lbt_th, priv->rssi_correction), priv->rssi_correction, priv->actual_tx_lo, priv->actual_rx_lo);
}
tmp = priv->drv_xpu_reg_val[reg_addr_idx];
} else {

4
driver/side_ch/make_driver.sh
View File

@ -20,7 +20,7 @@ else
exit 1
fi
if [ -d "$XILINX_DIR/SDK" ]; then
if [ -d "$XILINX_DIR/Vitis" ]; then
echo "\$XILINX_DIR is found!"
else
echo "\$XILINX_DIR is not correct. Please check!"
@ -34,7 +34,7 @@ else
echo "\$ARCH_OPTION is valid!"
fi
source $XILINX_DIR/SDK/2018.3/settings64.sh
source $XILINX_DIR/Vitis/2021.1/settings64.sh
if [ "$ARCH_OPTION" == "64" ]; then
LINUX_KERNEL_SRC_DIR=$OPENWIFI_DIR/adi-linux-64/
ARCH="arm64"

10
driver/side_ch/side_ch.c
View File

@ -599,11 +599,13 @@ static int dev_probe(struct platform_device *pdev) {
// goto free_chan_to_pl;
// }
chan_to_ps = dma_request_slave_channel(&(pdev->dev), "tx_dma_s2mm");
if (IS_ERR(chan_to_ps)) {
chan_to_ps = dma_request_chan(&(pdev->dev), "tx_dma_s2mm");
if (IS_ERR(chan_to_ps) || chan_to_ps==NULL) {
err = PTR_ERR(chan_to_ps);
pr_err("%s dev_probe: No channel to PS. %d\n",side_ch_compatible_str,err);
goto free_chan_to_ps;
if (err != -EPROBE_DEFER) {
pr_err("%s dev_probe: No chan_to_ps ret %d chan_to_ps 0x%p\n",side_ch_compatible_str, err, chan_to_ps);
goto free_chan_to_ps;
}
}
printk("%s dev_probe: DMA channel setup successfully. chan_to_pl 0x%p chan_to_ps 0x%p\n",side_ch_compatible_str, chan_to_pl, chan_to_ps);

4
driver/sysfs_intf.c
View File

@ -990,10 +990,12 @@ static ssize_t csma_cfg0_show(struct device *input_dev, struct device_attribute
reg_val = xpu_api->XPU_REG_FORCE_IDLE_MISC_read();
priv->stat.csma_cfg0 = reg_val;
return sprintf(buf, "nav_disable %d difs_disable %d eifs_disable %d cw_override %d cw override val %d wait_after_decode_top %d\n",
return sprintf(buf, "nav_disable %d difs_disable %d eifs_disable %d eifs_by_rx_fail_disable %d eifs_by_tx_fail_disable %d cw_override %d cw override val %d wait_after_decode_top %d\n",
(reg_val>>31)&1,
(reg_val>>30)&1,
(reg_val>>29)&1,
(reg_val>>27)&1,
(reg_val>>26)&1,
(reg_val>>28)&1,
(reg_val>>16)&0xf,
(reg_val>>0)&0xff);

8
driver/tx_intf/tx_intf.c
View File

@ -311,7 +311,7 @@ static inline u32 hw_init(enum tx_intf_mode mode, u32 tx_config, u32 num_dma_sym
if (mode!=TX_INTF_AXIS_LOOP_BACK) {
tx_intf_api->TX_INTF_REG_MULTI_RST_write(0);
tx_intf_api->TX_INTF_REG_CSI_FUZZER_write(0);
tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed
tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(16*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed
tx_intf_api->TX_INTF_REG_TX_CONFIG_write(tx_config);
tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PS_write(num_dma_symbol_to_ps);
@ -350,9 +350,9 @@ static inline u32 hw_init(enum tx_intf_mode mode, u32 tx_config, u32 num_dma_sym
tx_intf_api->TX_INTF_REG_MULTI_RST_write(0);
}
if (mode == TX_INTF_BYPASS) {
tx_intf_api->TX_INTF_REG_CFG_DATA_TO_ANT_write(0x100); //slv_reg10[8]
}
// if (mode == TX_INTF_BYPASS) {
// tx_intf_api->TX_INTF_REG_CFG_DATA_TO_ANT_write(0x100); //slv_reg10[8] -- bit 8 not used anymore. only bit0/1 are still reserved.
// }
printk("%s hw_init err %d\n", tx_intf_compatible_str, err);
return(err);

120
driver/xpu/xpu.c
View File

@ -150,14 +150,6 @@ static inline u32 XPU_REG_FORCE_IDLE_MISC_read(void){
return reg_read(XPU_REG_FORCE_IDLE_MISC_ADDR);
}
static inline u32 XPU_REG_TRX_STATUS_read(void){
return reg_read(XPU_REG_TRX_STATUS_ADDR);
}
static inline u32 XPU_REG_TX_RESULT_read(void){
return reg_read(XPU_REG_TX_RESULT_ADDR);
}
static inline u32 XPU_REG_TSF_RUNTIME_VAL_LOW_read(void){
return reg_read(XPU_REG_TSF_RUNTIME_VAL_LOW_ADDR);
}
@ -180,34 +172,6 @@ static inline void XPU_REG_TSF_LOAD_VAL_write(u32 high_value, u32 low_value){
XPU_REG_TSF_LOAD_VAL_HIGH_write(high_value&(~0x80000000)); // msb low
}
static inline u32 XPU_REG_FC_DI_read(void){
return reg_read(XPU_REG_FC_DI_ADDR);
}
static inline u32 XPU_REG_ADDR1_LOW_read(void){
return reg_read(XPU_REG_ADDR1_LOW_ADDR);
}
static inline u32 XPU_REG_ADDR1_HIGH_read(void){
return reg_read(XPU_REG_ADDR1_HIGH_ADDR);
}
static inline u32 XPU_REG_ADDR2_LOW_read(void){
return reg_read(XPU_REG_ADDR2_LOW_ADDR);
}
static inline u32 XPU_REG_ADDR2_HIGH_read(void){
return reg_read(XPU_REG_ADDR2_HIGH_ADDR);
}
// static inline void XPU_REG_LBT_TH_write(u32 value, u32 en_flag) {
// if (en_flag) {
// reg_write(XPU_REG_LBT_TH_ADDR, value&0x7FFFFFFF);
// } else {
// reg_write(XPU_REG_LBT_TH_ADDR, value|0x80000000);
// }
// }
static inline void XPU_REG_LBT_TH_write(u32 value) {
reg_write(XPU_REG_LBT_TH_ADDR, value);
}
@ -370,31 +334,12 @@ static inline u32 hw_init(enum xpu_mode mode){
// From CMW measurement: lo up 1us before the packet; lo down 0.4us after the packet/RF port switches 1.2us before and 0.2us after
xpu_api->XPU_REG_BB_RF_DELAY_write((16<<24)|(0<<16)|(26<<8)|9); // calibrated by ila and spectrum analyzer (trigger mode)
// setup time schedule of 4 slices
// slice 0
xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms
xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms
xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms
// slice 1
xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms
xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms
//xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms
xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms
// slice 2
xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms
//xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms
xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms
//xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms
xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms
// slice 3
xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms
//xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms
xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms
//xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms
xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms
// setup time schedule of all queues. all time open.
for (i=0; i<4; i++) {
xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((i<<20)|16);//total 16us
xpu_api->XPU_REG_SLICE_COUNT_START_write((i<<20)|0); //start 0us
xpu_api->XPU_REG_SLICE_COUNT_END_write((i<<20)|16); //end 16us
}
// all slice sync rest
xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time
@ -425,7 +370,9 @@ static inline u32 hw_init(enum xpu_mode mode){
rssi_half_db_th = 87<<1; // -62dBm
xpu_api->XPU_REG_LBT_TH_write(rssi_half_db_th); // set IQ rssi th step .5dB to xxx and enable it
xpu_api->XPU_REG_FORCE_IDLE_MISC_write(75); //control the duration to force ch_idle after decoding a packet due to imperfection of agc and signals
// control the duration to force ch_idle after decoding a packet due to imperfection of agc and signals
// (1<<26) to disable eifs_trigger_by_last_tx_fail by default (standard does not ask so)
xpu_api->XPU_REG_FORCE_IDLE_MISC_write((1<<26)|75);
//xpu_api->XPU_REG_CSMA_DEBUG_write((1<<31)|(20<<24)|(4<<19)|(3<<14)|(10<<7)|(5));
xpu_api->XPU_REG_CSMA_DEBUG_write(0);
@ -433,43 +380,17 @@ static inline u32 hw_init(enum xpu_mode mode){
// xpu_api->XPU_REG_CSMA_CFG_write(268435459); // Linux will do config for each queue via openwifi_conf_tx
// xpu_api->XPU_REG_CSMA_CFG_write(0xe0000000); // Linux will do config for each queue via openwifi_conf_tx
xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((16+23)<<16)|(0+23) );
xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M)
// // ------- assume 2.4 and 5GHz have the same SIFS (6us signal extension) --------
xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((16+25)<<16)|((16+25)<<0) );
xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M)
xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M)
// // ------- assume 2.4 and 5GHz have different SIFS --------
// xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((16+23)<<16)|(0+23) );
// xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M)
// xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M)
xpu_api->XPU_REG_DIFS_ADVANCE_write((OPENWIFI_MAX_SIGNAL_LEN_TH<<16)|2); //us. bit31~16 max pkt length threshold
// setup time schedule of 4 slices
// slice 0
xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms
xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms
xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms
// slice 1
xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms
xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms
//xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms
xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms
// slice 2
xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms
//xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms
xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms
//xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms
xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms
// slice 3
xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms
//xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms
xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms
//xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms
xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms
// all slice sync rest
xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time
xpu_api->XPU_REG_MULTI_RST_write(0<<7);
printk("%s hw_init err %d\n", xpu_compatible_str, err);
return(err);
}
@ -535,21 +456,12 @@ static int dev_probe(struct platform_device *pdev)
xpu_api->XPU_REG_FORCE_IDLE_MISC_write=XPU_REG_FORCE_IDLE_MISC_write;
xpu_api->XPU_REG_FORCE_IDLE_MISC_read=XPU_REG_FORCE_IDLE_MISC_read;
xpu_api->XPU_REG_TRX_STATUS_read=XPU_REG_TRX_STATUS_read;
xpu_api->XPU_REG_TX_RESULT_read=XPU_REG_TX_RESULT_read;
xpu_api->XPU_REG_TSF_RUNTIME_VAL_LOW_read=XPU_REG_TSF_RUNTIME_VAL_LOW_read;
xpu_api->XPU_REG_TSF_RUNTIME_VAL_HIGH_read=XPU_REG_TSF_RUNTIME_VAL_HIGH_read;
xpu_api->XPU_REG_TSF_LOAD_VAL_LOW_write=XPU_REG_TSF_LOAD_VAL_LOW_write;
xpu_api->XPU_REG_TSF_LOAD_VAL_HIGH_write=XPU_REG_TSF_LOAD_VAL_HIGH_write;
xpu_api->XPU_REG_TSF_LOAD_VAL_write=XPU_REG_TSF_LOAD_VAL_write;
xpu_api->XPU_REG_FC_DI_read=XPU_REG_FC_DI_read;
xpu_api->XPU_REG_ADDR1_LOW_read=XPU_REG_ADDR1_LOW_read;
xpu_api->XPU_REG_ADDR1_HIGH_read=XPU_REG_ADDR1_HIGH_read;
xpu_api->XPU_REG_ADDR2_LOW_read=XPU_REG_ADDR2_LOW_read;
xpu_api->XPU_REG_ADDR2_HIGH_read=XPU_REG_ADDR2_HIGH_read;
xpu_api->XPU_REG_LBT_TH_write=XPU_REG_LBT_TH_write;
xpu_api->XPU_REG_LBT_TH_read=XPU_REG_LBT_TH_read;

1
kernel_boot/10-network-device.rules Normal file
View File

@ -0,0 +1 @@
SUBSYSTEM=="net", ACTION=="add", ATTR{address}=="66:55:44:33:22:*", NAME="sdr0"

68
kernel_boot/ad9361.patch Normal file
View File

@ -0,0 +1,68 @@
diff --git a/drivers/iio/adc/ad9361.c b/drivers/iio/adc/ad9361.c
index b21e2129e27c..b53d7b7ab20d 100644
--- a/drivers/iio/adc/ad9361.c
+++ b/drivers/iio/adc/ad9361.c
@@ -1234,7 +1234,7 @@ static int ad9361_load_mixer_gm_subtable(struct ad9361_rf_phy *phy)
return 0;
}
-static int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb,
+int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb,
bool tx1, bool tx2, bool immed)
{
u8 buf[2];
@@ -1266,8 +1266,8 @@ static int ad9361_set_tx_atten(struct ad9361_rf_phy *phy, u32 atten_mdb,
return ret;
}
-
-static int ad9361_get_tx_atten(struct ad9361_rf_phy *phy, u32 tx_num)
+EXPORT_SYMBOL(ad9361_set_tx_atten);
+int ad9361_get_tx_atten(struct ad9361_rf_phy *phy, u32 tx_num)
{
u8 buf[2];
int ret = 0;
@@ -1285,7 +1285,7 @@ static int ad9361_get_tx_atten(struct ad9361_rf_phy *phy, u32 tx_num)
return code;
}
-
+EXPORT_SYMBOL(ad9361_get_tx_atten);
int ad9361_tx_mute(struct ad9361_rf_phy *phy, u32 state)
{
struct ad9361_rf_phy_state *st = phy->state;
@@ -3744,7 +3744,7 @@ static int ad9361_get_auxadc(struct ad9361_rf_phy *phy)
// Setup Control Outs
//************************************************************
-static int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy,
+int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy,
struct ctrl_outs_control *ctrl)
{
struct spi_device *spi = phy->spi;
@@ -3754,6 +3754,7 @@ static int ad9361_ctrl_outs_setup(struct ad9361_rf_phy *phy,
ad9361_spi_write(spi, REG_CTRL_OUTPUT_POINTER, ctrl->index); // Ctrl Out index
return ad9361_spi_write(spi, REG_CTRL_OUTPUT_ENABLE, ctrl->en_mask); // Ctrl Out [7:0] output enable
}
+EXPORT_SYMBOL(ad9361_ctrl_outs_setup);
//************************************************************
// Setup GPO
//************************************************************
@@ -5235,7 +5236,7 @@ static int ad9361_setup(struct ad9361_rf_phy *phy)
}
-static int ad9361_do_calib_run(struct ad9361_rf_phy *phy, u32 cal, int arg)
+int ad9361_do_calib_run(struct ad9361_rf_phy *phy, u32 cal, int arg)
{
struct ad9361_rf_phy_state *st = phy->state;
int ret;
@@ -5268,7 +5269,7 @@ static int ad9361_do_calib_run(struct ad9361_rf_phy *phy, u32 cal, int arg)
return ret;
}
-
+EXPORT_SYMBOL(ad9361_do_calib_run);
static int ad9361_update_rf_bandwidth(struct ad9361_rf_phy *phy,
u32 rf_rx_bw, u32 rf_tx_bw)
{

14
kernel_boot/ad9361_conv.patch Normal file
View File

@ -0,0 +1,14 @@
diff --git a/drivers/iio/adc/ad9361_conv.c b/drivers/iio/adc/ad9361_conv.c
index 1902e7d07501..ef421dbd5e70 100644
--- a/drivers/iio/adc/ad9361_conv.c
+++ b/drivers/iio/adc/ad9361_conv.c
@@ -449,7 +449,8 @@ static int ad9361_dig_tune_delay(struct ad9361_rf_phy *phy,
unsigned long max_freq,
enum dig_tune_flags flags, bool tx)
{
- static const unsigned int rates[3] = {25000000U, 40000000U, 61440000U};
+ // static const unsigned int rates[3] = {25000000U, 40000000U, 61440000U};
+ static const unsigned int rates[3] = {25000000U, 40000000U, 40000000U};
struct axiadc_converter *conv = spi_get_drvdata(phy->spi);
unsigned int s0, s1, c0, c1;
unsigned int i, j, r;

13
kernel_boot/axi_hdmi_crtc.patch Normal file
View File

@ -0,0 +1,13 @@
diff --git a/drivers/gpu/drm/adi_axi_hdmi/axi_hdmi_crtc.c b/drivers/gpu/drm/adi_axi_hdmi/axi_hdmi_crtc.c
index f24669f623d6..70c5769019fa 100644
--- a/drivers/gpu/drm/adi_axi_hdmi/axi_hdmi_crtc.c
+++ b/drivers/gpu/drm/adi_axi_hdmi/axi_hdmi_crtc.c
@@ -54,7 +54,7 @@ static struct dma_async_tx_descriptor *axi_hdmi_vdma_prep_interleaved_desc(
memset(&vdma_config, 0, sizeof(vdma_config));
vdma_config.park = 1;
vdma_config.coalesc = 0xff;
- xilinx_vdma_channel_set_config(axi_hdmi_crtc->dma, &vdma_config);
+ // xilinx_vdma_channel_set_config(axi_hdmi_crtc->dma, &vdma_config);
}
#endif

BIN
kernel_boot/boards/adrv9361z7035/u-boot.elf
View File

Binary file not shown.

BIN
kernel_boot/boards/adrv9361z7035_fmc/u-boot.elf
View File

Binary file not shown.

BIN
kernel_boot/boards/adrv9364z7020/devicetree.dtb
View File

Binary file not shown.

730
kernel_boot/boards/adrv9364z7020/devicetree.dts
View File

File diff suppressed because it is too large Load Diff

BIN
kernel_boot/boards/adrv9364z7020/u-boot.elf
View File

Binary file not shown.

BIN
kernel_boot/boards/neptunesdr/devicetree.dtb Normal file
View File

Binary file not shown.

1136
kernel_boot/boards/neptunesdr/devicetree.dts Normal file
View File

File diff suppressed because it is too large Load Diff

BIN
kernel_boot/boards/neptunesdr/u-boot.elf Normal file
View File

Binary file not shown.

BIN
kernel_boot/boards/sdrpi/devicetree.dtb
View File

Binary file not shown.

BIN
kernel_boot/boards/zc702_fmcs2/devicetree.dtb
View File

Binary file not shown.

990
kernel_boot/boards/zc702_fmcs2/devicetree.dts
View File

File diff suppressed because it is too large Load Diff

BIN
kernel_boot/boards/zc706_fmcs2/u-boot.elf
View File

Binary file not shown.

BIN
kernel_boot/boards/zcu102_fmcs2/bl31.elf
View File

Binary file not shown.

BIN
kernel_boot/boards/zcu102_fmcs2/system.dtb
View File

Binary file not shown.

3275
kernel_boot/boards/zcu102_fmcs2/system.dts
View File

File diff suppressed because it is too large Load Diff

BIN
kernel_boot/boards/zcu102_fmcs2/u-boot-zcu.elf
View File

Binary file not shown.

BIN
kernel_boot/boards/zcu102_fmcs2/u-boot_xilinx_zynqmp_zcu102_revA.elf Normal file
View File

Binary file not shown.

BIN
kernel_boot/boards/zed_fmcs2/u-boot.elf
View File

Binary file not shown.

107
kernel_boot/build_boot_bin.sh
View File

@ -1,60 +1,38 @@
#!/bin/bash
# Author: Xianjun Jiao
# SPDX-FileCopyrightText: 2019 UGent
# SPDX-License-Identifier: AGPL-3.0-or-later
# https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/linux/zynq_2014r2
if [ "$#" -ne 2 ]; then
echo "You must enter the \$OPENWIFI_HW_DIR \$BOARD_NAME as argument"
echo "BOARD_NAME Like: sdrpi antsdr adrv9364z7020 adrv9361z7035 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 zcu102_fmcs2 zcu102_9371"
exit 1
fi
OPENWIFI_HW_DIR=$1
BOARD_NAME=$2
if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
echo "\$BOARD_NAME is not correct. Please check!"
exit 1
else
echo "\$BOARD_NAME is found!"
fi
set -ex
HDF_FILE=$OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf
UBOOT_FILE=./boards/$BOARD_NAME/u-boot.elf
BUILD_DIR=./boards/$BOARD_NAME/build_boot_bin
OUTPUT_DIR=./boards/$BOARD_NAME/output_boot_bin
HDF_FILE=$1
UBOOT_FILE=$2
BUILD_DIR=build_boot_bin
OUTPUT_DIR=output_boot_bin
# usage () {
# echo usage: $0 system_top.hdf u-boot.elf [output-archive]
# exit 1
# }
usage () {
echo "usage: $0 system_top.<hdf/xsa> u-boot.elf [output-archive]"
exit 1
}
# depends () {
# echo Xilinx $1 must be installed and in your PATH
# echo try: source /opt/Xilinx/Vivado/201x.x/settings64.sh
# exit 1
# }
depends () {
echo Xilinx $1 must be installed and in your PATH
echo try: source /opt/Xilinx/Vivado/201x.x/settings64.sh
exit 1
}
### Check command line parameters
echo $HDF_FILE | grep -q ".hdf" || usage
echo $UBOOT_FILE | grep -q -e ".elf" -e "uboot" || usage
echo $HDF_FILE | grep -q ".hdf\|.xsa" || usage
echo $UBOOT_FILE | grep -q -e ".elf" -e "uboot" -e "u-boot"|| usage
if [ ! -f $HDF_FILE ]; then
echo $HDF_FILE: File not found!
usage
echo $HDF_FILE: File not found!
usage
fi
if [ ! -f $UBOOT_FILE ]; then
echo $UBOOT_FILE: File not found!
usage
echo $UBOOT_FILE: File not found!
usage
fi
### Check for required Xilinx tools
command -v xsdk >/dev/null 2>&1 || depends xsdk
### Check for required Xilinx tools (xcst is equivalent with 'xsdk -batch')
command -v xsct >/dev/null 2>&1 || depends xsct
command -v bootgen >/dev/null 2>&1 || depends bootgen
rm -Rf $BUILD_DIR $OUTPUT_DIR
@ -65,14 +43,26 @@ cp $HDF_FILE $BUILD_DIR/
cp $UBOOT_FILE $OUTPUT_DIR/u-boot.elf
cp $HDF_FILE $OUTPUT_DIR/
### Create create_fsbl_project.tcl file used by xsdk to create the fsbl
### Create create_fsbl_project.tcl file used by xsct to create the fsbl.
echo "hsi open_hw_design `basename $HDF_FILE`" > $BUILD_DIR/create_fsbl_project.tcl
echo 'set cpu_name [lindex [hsi get_cells -filter {IP_TYPE==PROCESSOR}] 0]' >> $BUILD_DIR/create_fsbl_project.tcl
echo 'sdk setws ./build/sdk' >> $BUILD_DIR/create_fsbl_project.tcl
echo "sdk createhw -name hw_0 -hwspec `basename $HDF_FILE`" >> $BUILD_DIR/create_fsbl_project.tcl
echo 'sdk createapp -name fsbl -hwproject hw_0 -proc $cpu_name -os standalone -lang C -app {Zynq FSBL}' >> $BUILD_DIR/create_fsbl_project.tcl
echo 'configapp -app fsbl build-config release' >> $BUILD_DIR/create_fsbl_project.tcl
echo 'sdk projects -build -type all' >> $BUILD_DIR/create_fsbl_project.tcl
### The fsbl creating flow is different starting with 2019.2 Xilinx version
if [[ "$HDF_FILE" =~ ".hdf" ]];then
echo 'sdk setws ./build/sdk' >> $BUILD_DIR/create_fsbl_project.tcl
echo "sdk createhw -name hw_0 -hwspec `basename $HDF_FILE`" >> $BUILD_DIR/create_fsbl_project.tcl
echo 'sdk createapp -name fsbl -hwproject hw_0 -proc $cpu_name -os standalone -lang C -app {Zynq FSBL}' >> $BUILD_DIR/create_fsbl_project.tcl
echo 'configapp -app fsbl build-config release' >> $BUILD_DIR/create_fsbl_project.tcl
echo 'sdk projects -build -type all' >> $BUILD_DIR/create_fsbl_project.tcl
FSBL_PATH="$BUILD_DIR/build/sdk/fsbl/Release/fsbl.elf"
SYSTEM_TOP_BIT_PATH="$BUILD_DIR/build/sdk/hw_0/system_top.bit"
else
echo 'platform create -name hw0 -hw system_top.xsa -os standalone -out ./build/sdk -proc $cpu_name' >> $BUILD_DIR/create_fsbl_project.tcl
echo 'platform generate' >> $BUILD_DIR/create_fsbl_project.tcl
FSBL_PATH="$BUILD_DIR/build/sdk/hw0/export/hw0/sw/hw0/boot/fsbl.elf"
SYSTEM_TOP_BIT_PATH="$BUILD_DIR/build/sdk/hw0/hw/system_top.bit"
fi
### Create zynq.bif file used by bootgen
echo 'the_ROM_image:' > $OUTPUT_DIR/zynq.bif
@ -85,12 +75,12 @@ echo '}' >> $OUTPUT_DIR/zynq.bif
### Build fsbl.elf
(
cd $BUILD_DIR
xsdk -batch -source create_fsbl_project.tcl
xsct create_fsbl_project.tcl
)
### Copy fsbl and system_top.bit into the output folder
cp $BUILD_DIR/build/sdk/fsbl/Release/fsbl.elf $OUTPUT_DIR/fsbl.elf
cp $BUILD_DIR/build/sdk/hw_0/system_top.bit $OUTPUT_DIR/system_top.bit
cp $FSBL_PATH $OUTPUT_DIR/fsbl.elf
cp $SYSTEM_TOP_BIT_PATH $OUTPUT_DIR/system_top.bit
### Build BOOT.BIN
(
@ -98,12 +88,7 @@ cp $BUILD_DIR/build/sdk/hw_0/system_top.bit $OUTPUT_DIR/system_top.bit
bootgen -arch zynq -image zynq.bif -o BOOT.BIN -w
)
### clean up BUILD_DIR and copy ILA definition together with .bit into OUTPUT_DIR
(
rm $BUILD_DIR -rf
)
# ### Optionally tar.gz the entire output folder with the name given in argument 3
# if [ ${#3} -ne 0 ]; then
# tar czvf $3.tar.gz $OUTPUT_DIR
# fi
### Optionally tar.gz the entire output folder with the name given in argument 3
if [ ${#3} -ne 0 ]; then
tar czvf $3.tar.gz $OUTPUT_DIR
fi

138
kernel_boot/build_zynqmp_boot_bin.sh
View File

@ -1,10 +1,4 @@
#!/bin/bash
# Author: Xianjun Jiao
# SPDX-FileCopyrightText: 2019 UGent
# SPDX-License-Identifier: AGPL-3.0-or-later
# https://wiki.analog.com/resources/eval/user-guides/ad-fmcomms2-ebz/software/linux/zynqmp
set -ex
HDF_FILE=$1
@ -14,7 +8,7 @@ BUILD_DIR=build_boot_bin
OUTPUT_DIR=output_boot_bin
usage () {
echo "usage: $0 system_top.hdf u-boot.elf (download | bl31.elf | <path-to-arm-trusted-firmware-source>) [output-archive]"
echo "usage: $0 system_top.<hdf/xsa> u-boot.elf (download | bl31.elf | <path-to-arm-trusted-firmware-source>) [output-archive]"
exit 1
}
@ -25,12 +19,14 @@ depends () {
}
### Check command line parameters
echo $HDF_FILE | grep -q ".hdf" || usage
echo $UBOOT_FILE | grep -q -e ".elf" -e "uboot" || usage
echo $HDF_FILE | grep -q ".hdf\|.xsa" || usage
echo $UBOOT_FILE | grep -q -e ".elf" -e "uboot" -e "u-boot" || usage
if [ ! -f $HDF_FILE ]; then
echo $HDF_FILE: File not found!
usage
echo $HDF_FILE: File not found!
usage
else
if [[ "$HDF_FILE" =~ ".hdf" ]]; then TOOL="xsdk";else TOOL="vitis";fi
fi
if [ ! -f $UBOOT_FILE ]; then
@ -38,10 +34,10 @@ if [ ! -f $UBOOT_FILE ]; then
usage
fi
### Check for required Xilinx tools
command -v xsdk >/dev/null 2>&1 || depends xsdk
### Check for required Xilinx tools (starting with 2019.2 there is no hsi anymore)
command -v xsct >/dev/null 2>&1 || depends xsct
command -v bootgen >/dev/null 2>&1 || depends bootgen
command -v hsi >/dev/null 2>&1 || depends hsi
if [[ "$HDF_FILE" =~ ".hdf" ]];then (command -v hsi >/dev/null 2>&1 || depends hsi);fi
rm -Rf $BUILD_DIR $OUTPUT_DIR
mkdir -p $OUTPUT_DIR
@ -51,13 +47,22 @@ mkdir -p $BUILD_DIR
# 2018.1 use df4a7e97d57494c7d79de51b1e0e450d982cea98
# 2018.2 use 93a69a5a3bc318027da4af5911124537f4907642
# 2018.3 use 08560c36ea5b6f48b962cb4bd9a79b35bb3d95ce
# 2019.3 use 713dace94b259845fd8eede11061fbd8f039011e
# 2020.1 use bf72e4d494f3be10665b94c0e88766eb2096ef71
# 2021.2 use 799131a3b063f6f24f87baa74e46906c076aebcd
hsi_ver=$(hsi -version | head -1 | cut -d' ' -f2)
if [ -z "$hsi_ver" ] ; then
tool_version=$($TOOL -version | sed -n '3p' | cut -d' ' -f 3)
if [ -z "$tool_version" ] ; then
echo "Could not determine Vivado version"
exit 1
fi
atf_version=xilinx-$hsi_ver
atf_version=xilinx-$tool_version
if [[ "$atf_version" == "xilinx-v2021.1" ]];then atf_version="xlnx_rebase_v2.4_2021.1";fi
if [[ "$atf_version" == "xilinx-v2021.1.1" ]];then atf_version="xlnx_rebase_v2.4_2021.1_update1";fi
if [[ "$atf_version" == "xilinx-v2021.2" ]];then atf_version="xlnx-v2021.2";fi
if [[ "$4" == "uart1" ]];then console="cadence1";else console="cadence0";fi
### Check if ATF_FILE is .elf or path to arm-trusted-firmware
if [ "$ATF_FILE" != "" ] && [ -d $ATF_FILE ]; then
@ -66,7 +71,7 @@ if [ "$ATF_FILE" != "" ] && [ -d $ATF_FILE ]; then
cd $ATF_FILE
make distclean
git checkout $atf_version
make CROSS_COMPILE=aarch64-linux-gnu- PLAT=zynqmp RESET_TO_BL31=1
make CROSS_COMPILE=aarch64-linux-gnu- PLAT=zynqmp RESET_TO_BL31=1 ZYNQMP_CONSOLE=$console
)
cp $ATF_FILE/build/zynqmp/release/bl31/bl31.elf $OUTPUT_DIR/bl31.elf
elif [ "$ATF_FILE" == "download" ]; then
@ -76,7 +81,7 @@ elif [ "$ATF_FILE" == "download" ]; then
git clone https://github.com/Xilinx/arm-trusted-firmware.git
cd arm-trusted-firmware
git checkout $atf_version
make CROSS_COMPILE=aarch64-linux-gnu- PLAT=zynqmp RESET_TO_BL31=1
make CROSS_COMPILE=aarch64-linux-gnu- PLAT=zynqmp RESET_TO_BL31=1 ZYNQMP_CONSOLE=$console
)
cp $BUILD_DIR/arm-trusted-firmware/build/zynqmp/release/bl31/bl31.elf $OUTPUT_DIR/bl31.elf
else
@ -88,45 +93,52 @@ else
cp $ATF_FILE $OUTPUT_DIR/bl31.elf
fi
cp $HDF_FILE $BUILD_DIR/
cp $UBOOT_FILE $OUTPUT_DIR/u-boot.elf
cp $HDF_FILE $OUTPUT_DIR/
cp "$HDF_FILE" "$BUILD_DIR/"
cp "$UBOOT_FILE" "$OUTPUT_DIR/u-boot.elf"
cp "$HDF_FILE" "$OUTPUT_DIR/"
# get the tools version (e.g., v2018.3)
tool_version=$(hsi -version)
tool_version=${tool_version#hsi\ }
tool_version=${tool_version%\ (64-bit)*}
# Work-arownd for MPSoC ZCU102 and ZCU106 Evaluation Kits - DDR4 SODIMM change
# Work-around for MPSoC ZCU102 and ZCU106 Evaluation Kits - DDR4 SODIMM change
# (https://www.xilinx.com/support/answers/71961.html)
if [ $tool_version == "v2018.3" ];then
(
# wget https://www.xilinx.com/Attachment/72113-files.zip -P $BUILD_DIR
cp -P 72113-files.zip $BUILD_DIR
wget https://www.xilinx.com/Attachment/72113-files.zip -P $BUILD_DIR
unzip $BUILD_DIR/72113-files.zip -d $BUILD_DIR
)
fi
### Create create_fsbl_project.tcl file used by xsdk to create the fsbl
### Create create_fsbl_project.tcl file used by xsct to create the fsbl.
echo "hsi open_hw_design `basename $HDF_FILE`" > $BUILD_DIR/create_fsbl_project.tcl
echo 'set cpu_name [lindex [hsi get_cells -filter {IP_TYPE==PROCESSOR}] 0]' >> $BUILD_DIR/create_fsbl_project.tcl
echo 'sdk setws ./build/sdk' >> $BUILD_DIR/create_fsbl_project.tcl
echo "sdk createhw -name hw_0 -hwspec `basename $HDF_FILE`" >> $BUILD_DIR/create_fsbl_project.tcl
echo 'sdk createapp -name fsbl -hwproject hw_0 -proc $cpu_name -os standalone -lang C -app {Zynq MP FSBL}' >> $BUILD_DIR/create_fsbl_project.tcl
echo 'configapp -app fsbl build-config release' >> $BUILD_DIR/create_fsbl_project.tcl
if [ $tool_version == "v2018.3" ];then
(
echo "file copy -force xfsbl_ddr_init.c ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
echo "file copy -force xfsbl_hooks.c ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
echo "file copy -force xfsbl_hooks.h ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
)
fi
echo 'sdk projects -build -type all' >> $BUILD_DIR/create_fsbl_project.tcl
### The fsbl creating flow is different starting with 2019.2 Xilinx version
if [[ "$HDF_FILE" =~ ".hdf" ]];then
echo 'sdk setws ./build/sdk' >> $BUILD_DIR/create_fsbl_project.tcl
echo "sdk createhw -name hw_0 -hwspec `basename $HDF_FILE`" >> $BUILD_DIR/create_fsbl_project.tcl
echo 'sdk createapp -name fsbl -hwproject hw_0 -proc $cpu_name -os standalone -lang C -app {Zynq MP FSBL}' >> $BUILD_DIR/create_fsbl_project.tcl
echo 'configapp -app fsbl build-config release' >> $BUILD_DIR/create_fsbl_project.tcl
if [ $tool_version == "v2018.3" ];then
echo "file copy -force xfsbl_ddr_init.c ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
echo "file copy -force xfsbl_hooks.c ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
echo "file copy -force xfsbl_hooks.h ./build/sdk/fsbl/src" >> $BUILD_DIR/create_fsbl_project.tcl
fi
echo 'sdk projects -build -type all' >> $BUILD_DIR/create_fsbl_project.tcl
### Create create_pmufw_project.tcl
echo "set hwdsgn [open_hw_design `basename $HDF_FILE`]" > $BUILD_DIR/create_pmufw_project.tcl
echo 'generate_app -hw $hwdsgn -os standalone -proc psu_pmu_0 -app zynqmp_pmufw -sw pmufw -dir pmufw' >> $BUILD_DIR/create_pmufw_project.tcl
echo 'quit' >> $BUILD_DIR/create_pmufw_project.tcl
### Create create_pmufw_project.tcl
echo "set hwdsgn [open_hw_design `basename $HDF_FILE`]" > $BUILD_DIR/create_pmufw_project.tcl
echo 'generate_app -hw $hwdsgn -os standalone -proc psu_pmu_0 -app zynqmp_pmufw -compile -sw pmufw -dir pmufw' >> $BUILD_DIR/create_pmufw_project.tcl
echo 'quit' >> $BUILD_DIR/create_pmufw_project.tcl
FSBL_PATH="$BUILD_DIR/build/sdk/fsbl/Release/fsbl.elf"
SYSTEM_TOP_BIT_PATH="$BUILD_DIR/build/sdk/hw_0/system_top.bit"
PMUFW_PATH="$BUILD_DIR/pmufw/executable.elf"
else
# Flow got changed starting with 2019.2 version (when Vitis replaced SDK) and pmufw is generated automatically with fsbl
echo 'platform create -name hw0 -hw system_top.xsa -os standalone -out ./build/sdk -proc $cpu_name' >> $BUILD_DIR/create_fsbl_project.tcl
echo 'platform generate' >> $BUILD_DIR/create_fsbl_project.tcl
FSBL_PATH="$BUILD_DIR/build/sdk/hw0/export/hw0/sw/hw0/boot/fsbl.elf"
SYSTEM_TOP_BIT_PATH="$BUILD_DIR/build/sdk/hw0/hw/system_top.bit"
PMUFW_PATH="$BUILD_DIR/build/sdk/hw0/export/hw0/sw/hw0/boot/pmufw.elf"
fi
### Create zynq.bif file used by bootgen
echo "the_ROM_image:" > $OUTPUT_DIR/zynq.bif
@ -138,22 +150,22 @@ echo "[destination_cpu=a53-0,exception_level=el-3,trustzone] bl31.elf" >> $OUTPU
echo "[destination_cpu=a53-0, exception_level=el-2] u-boot.elf" >> $OUTPUT_DIR/zynq.bif
echo "}" >> $OUTPUT_DIR/zynq.bif
### Build fsbl.elf & pmufw.elf
(
cd $BUILD_DIR
xsdk -batch -source create_fsbl_project.tcl
hsi -source create_pmufw_project.tcl
### There was a bug in some vivado version where they build would fail -> check CC_FLAGS
grep "CC_FLAGS :=" pmufw/Makefile | grep -e "-Os" || sed -i '/-mxl-soft-mul/ s/$/ -Os -flto -ffat-lto-objects/' pmufw/Makefile
cd pmufw
make
xsct create_fsbl_project.tcl
if [[ "$HDF_FILE" =~ ".hdf" ]];then
hsi -source create_pmufw_project.tcl
### There was a bug in some vivado version where they build would fail -> check CC_FLAGS
grep "CC_FLAGS :=" pmufw/Makefile | grep -e "-Os" || sed -i '/-mxl-soft-mul/ s/$/ -Os -flto -ffat-lto-objects/' pmufw/Makefile
cd pmufw
make
fi
)
### Copy fsbl and system_top.bit into the output folder
cp $BUILD_DIR/build/sdk/fsbl/Release/fsbl.elf $OUTPUT_DIR/fsbl.elf
cp $BUILD_DIR/build/sdk/hw_0/system_top.bit $OUTPUT_DIR/system_top.bit
cp $BUILD_DIR/pmufw/executable.elf $OUTPUT_DIR/pmufw.elf
cp "$FSBL_PATH" "$OUTPUT_DIR/fsbl.elf"
cp "$SYSTEM_TOP_BIT_PATH" "$OUTPUT_DIR/system_top.bit"
cp "$PMUFW_PATH" "$OUTPUT_DIR/pmufw.elf"
### Build BOOT.BIN
(
@ -161,7 +173,11 @@ cp $BUILD_DIR/pmufw/executable.elf $OUTPUT_DIR/pmufw.elf
bootgen -arch zynqmp -image zynq.bif -o BOOT.BIN -w
)
### Optionally tar.gz the entire output folder with the name given in argument 3
if [ ${#4} -ne 0 ]; then
tar czvf $4.tar.gz $OUTPUT_DIR
### Optionally tar.gz the entire output folder with the name given in argument 4/5
if [[ ( $4 == "uart"* && ${#5} -ne 0 ) ]]; then
tar czvf $5.tar.gz $OUTPUT_DIR
fi
if [[ ( ${#4} -ne 0 && $4 != "uart"* && ${#5} -eq 0 ) ]]; then
tar czvf $4.tar.gz $OUTPUT_DIR
fi

2951
kernel_boot/kernel_config
View File

File diff suppressed because it is too large Load Diff

4397
kernel_boot/kernel_config_zynqmp
View File

File diff suppressed because it is too large Load Diff

6
kernel_boot/kernel_patch_readme.md Normal file
View File

@ -0,0 +1,6 @@
axi_hdmi_crtc.patch to avoid axi hdmi compiling error after enable Xilinx axi dma.
ad9361.patch to expose some APIs for openwifi driver.
ad9361_conv.patch to avoid 61.44Msps lvds interface self timing calibration for some low-end/bad hardware (sometimes difficult).

4
user_space/arbitrary_iq_gen/single_carrier_gen.m
View File

@ -1,4 +1,6 @@
% xianjun.jiao@imec.be
% Author: Xianjun Jiao (xianjun.jiao@imec.be; putaoshu@msn.com)
% SPDX-FileCopyrightText: 2023 UGent
% SPDX-License-Identifier: AGPL-3.0-or-later
function single_carrier_gen(carrier_freq, num_iq)
if exist('carrier_freq', 'var')==0 || isempty(carrier_freq)

63
user_space/boot_bin_gen.sh
View File

@ -5,18 +5,18 @@
# SPDX-License-Identifier: AGPL-3.0-or-later
if [ "$#" -ne 3 ]; then
echo "You must enter exactly 3 arguments: \$OPENWIFI_HW_DIR \$XILINX_DIR \$BOARD_NAME"
echo "You must enter exactly 3 arguments: \$XILINX_DIR \$BOARD_NAME DIR_TO_system_top.xsa"
exit 1
fi
OPENWIFI_HW_DIR=$1
XILINX_DIR=$2
BOARD_NAME=$3
XILINX_DIR=$1
BOARD_NAME=$2
XSA_FILE=$3
OPENWIFI_DIR=$(pwd)/../
echo OPENWIFI_DIR $OPENWIFI_DIR
echo OPENWIFI_HW_DIR $OPENWIFI_HW_DIR
echo XSA_FILE $XSA_FILE
if [ -f "$OPENWIFI_DIR/LICENSE" ]; then
echo "\$OPENWIFI_DIR is found!"
@ -25,24 +25,24 @@ else
exit 1
fi
if [ -d "$XILINX_DIR/SDK" ]; then
if [ -d "$XILINX_DIR/Vitis" ]; then
echo "\$XILINX_DIR is found!"
else
echo "\$XILINX_DIR is not correct. Please check!"
exit 1
fi
if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ]; then
echo "\$BOARD_NAME is not correct. Please check!"
exit 1
else
echo "\$BOARD_NAME is found!"
fi
# if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ]; then
# echo "\$BOARD_NAME is not correct. Please check!"
# exit 1
# else
# echo "\$BOARD_NAME is found!"
# fi
if [ -d "$OPENWIFI_HW_DIR/boards/$BOARD_NAME" ]; then
echo "\$OPENWIFI_HW_DIR is found!"
if [ -f "$XSA_FILE" ]; then
echo "\$XSA_FILE is found!"
else
echo "\$OPENWIFI_HW_DIR is not correct. Please check!"
echo "\$XSA_FILE is not found. Please check!"
exit 1
fi
@ -50,17 +50,32 @@ home_dir=$(pwd)
set -ex
# check if user entered the right path to SDK
source $XILINX_DIR/SDK/2018.3/settings64.sh
# uncompress the system.hdf and system_top.bit for use
mkdir -p hdf_and_bit
tar -zxvf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/hdf_and_bit.tar.gz -C ./hdf_and_bit
cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system_top.bit $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
source $XILINX_DIR/Vitis/2021.1/settings64.sh
cd $OPENWIFI_DIR/kernel_boot
./build_boot_bin.sh $OPENWIFI_HW_DIR $BOARD_NAME
if [ "$BOARD_NAME" == "zcu102_fmcs2" ] || [ "$BOARD_NAME" == "zcu102_9371" ]; then
./build_zynqmp_boot_bin.sh $XSA_FILE boards/$BOARD_NAME/u-boot_xilinx_zynqmp_zcu102_revA.elf boards/$BOARD_NAME/bl31.elf
ARCH="zynqmp"
ARCH_BIT=64
elif [ "$BOARD_NAME" == "antsdr" ] || [ "$BOARD_NAME" == "antsdr_e200" ] || [ "$BOARD_NAME" == "sdrpi" ] || [ "$BOARD_NAME" == "neptunesdr" ] || [ "$BOARD_NAME" == "zc706_fmcs2" ] || [ "$BOARD_NAME" == "zc702_fmcs2" ] || [ "$BOARD_NAME" == "zed_fmcs2" ] || [ "$BOARD_NAME" == "adrv9361z7035" ] || [ "$BOARD_NAME" == "adrv9364z7020" ]; then
./build_boot_bin.sh $XSA_FILE boards/$BOARD_NAME/u-boot.elf
ARCH="zynq"
ARCH_BIT=32
else
echo "\$BOARD_NAME is not correct. Please check!"
cd $home_dir
exit 1
fi
rm -rf build_boot_bin
rm -rf boards/$BOARD_NAME/output_boot_bin
mv output_boot_bin boards/$BOARD_NAME/
cd $home_dir
# generate system_top.bit.bin for FPGA dynamic loading
unzip -o $XSA_FILE
rm -rf ./system_top.bit.bin
bootgen -image system_top.bif -arch $ARCH -process_bitstream bin -w
ls ./system_top.bit.bin -al

70
user_space/boot_bin_gen_zynqmp.sh
View File

@ -1,70 +0,0 @@
#!/bin/bash
# Author: Xianjun Jiao
# SPDX-FileCopyrightText: 2019 UGent
# SPDX-License-Identifier: AGPL-3.0-or-later
if [ "$#" -ne 3 ]; then
echo "You must enter exactly 3 arguments: \$OPENWIFI_HW_DIR \$XILINX_DIR \$BOARD_NAME"
exit 1
fi
OPENWIFI_HW_DIR=$1
XILINX_DIR=$2
BOARD_NAME=$3
OPENWIFI_DIR=$(pwd)/../
echo OPENWIFI_DIR $OPENWIFI_DIR
echo OPENWIFI_HW_DIR $OPENWIFI_HW_DIR
if [ -f "$OPENWIFI_DIR/LICENSE" ]; then
echo "\$OPENWIFI_DIR is found!"
else
echo "\$OPENWIFI_DIR is not correct. Please check!"
exit 1
fi
if [ -d "$XILINX_DIR/SDK" ]; then
echo "\$XILINX_DIR is found!"
else
echo "\$XILINX_DIR is not correct. Please check!"
exit 1
fi
if [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
echo "\$BOARD_NAME is not correct. Please check!"
exit 1
else
echo "\$BOARD_NAME is found!"
fi
if [ -d "$OPENWIFI_HW_DIR/boards/$BOARD_NAME" ]; then
echo "\$OPENWIFI_HW_DIR is found!"
else
echo "\$OPENWIFI_HW_DIR is not correct. Please check!"
exit 1
fi
home_dir=$(pwd)
set -ex
# check if user entered the right path to SDK
source $XILINX_DIR/SDK/2018.3/settings64.sh
# uncompress the system.hdf and system_top.bit for use
mkdir -p hdf_and_bit
tar -zxvf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/hdf_and_bit.tar.gz -C ./hdf_and_bit
cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system_top.bit $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
cd $OPENWIFI_DIR/kernel_boot
./build_zynqmp_boot_bin.sh $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf boards/$BOARD_NAME/u-boot-zcu.elf boards/$BOARD_NAME/bl31.elf
rm -rf build_boot_bin
rm -rf boards/$BOARD_NAME/output_boot_bin
mv output_boot_bin boards/$BOARD_NAME/
cd $home_dir

2
user_space/dhcpd.conf
View File

@ -13,7 +13,7 @@
ddns-update-style none;
# option definitions common to all supported networks...
option domain-name "orca-project.eu";
# option domain-name "orca-project.eu";
#option domain-name-servers ns1.example.org, ns2.example.org;
default-lease-time 600;

62
user_space/drv_and_fpga_package_gen.sh
View File

@ -7,42 +7,44 @@
if [ "$#" -ne 3 ]; then
echo "You have input $# arguments."
echo "You must enter exactly 3 arguments: \$OPENWIFI_HW_DIR \$XILINX_DIR \$BOARD_NAME"
echo "You must enter exactly 3 arguments: \$OPENWIFI_HW_IMG_DIR \$XILINX_DIR \$BOARD_NAME"
exit 1
fi
OPENWIFI_HW_DIR=$1
OPENWIFI_HW_IMG_DIR=$1
XILINX_DIR=$2
BOARD_NAME=$3
if [ -d "$XILINX_DIR/SDK" ]; then
if [ -d "$XILINX_DIR/Vitis" ]; then
echo "\$XILINX_DIR is found!"
else
echo "\$XILINX_DIR is not correct. Please check!"
exit 1
fi
if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
if [ "$BOARD_NAME" != "neptunesdr" ] && [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
echo "\$BOARD_NAME is not correct. Please check!"
exit 1
else
echo "\$BOARD_NAME is found!"
fi
if [ -d "$OPENWIFI_HW_DIR/boards/$BOARD_NAME" ]; then
echo "\$OPENWIFI_HW_DIR is found!"
if [ -d "$OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME" ]; then
echo "\$OPENWIFI_HW_IMG_DIR is found!"
else
echo "\$OPENWIFI_HW_DIR is not correct. Please check!"
echo "\$OPENWIFI_HW_IMG_DIR is not correct. Please check!"
exit 1
fi
# uncompress the system.hdf and system_top.bit for use
mkdir -p hdf_and_bit
tar -zxvf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/hdf_and_bit.tar.gz -C ./hdf_and_bit
cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system_top.bit $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
rm hdf_and_bit/* -rf
unzip $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/system_top.xsa -d ./hdf_and_bit
# cp ./hdf_and_bit/$BOARD_NAME/sdk/system_top_hw_platform_0/system.hdf $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
# cp ./hdf_and_bit/system_top.bit $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/ -rf
BIT_FILENAME=$OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/system_top.bit
# BIT_FILENAME=$OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/system_top_hw_platform_0/system_top.bit
BIT_FILENAME=./hdf_and_bit/system_top.bit
if [ -f "$BIT_FILENAME" ]; then
echo "\$BIT_FILENAME is found!"
@ -61,7 +63,7 @@ fi
# FINAL_BIT_FILENAME=$BOARD_NAME\_system_top_reload.bit.bin
source $XILINX_DIR/SDK/2018.3/settings64.sh
source $XILINX_DIR/Vitis/2021.1/settings64.sh
set -x
@ -76,29 +78,29 @@ make clean
cd ../user_space
mkdir -p drv_and_fpga
rm -rf drv_and_fpga/*
cp system_top.bit.bin ../driver/tx_intf/tx_intf.ko ../driver/rx_intf/rx_intf.ko ../driver/openofdm_tx/openofdm_tx.ko ../driver/openofdm_rx/openofdm_rx.ko ../driver/xpu/xpu.ko ../driver/sdr.ko ./drv_and_fpga -f
cp $OPENWIFI_HW_DIR/boards/$BOARD_NAME/sdk/git_info.txt ./drv_and_fpga -f
cp system_top.bit.bin ../driver/side_ch/side_ch.ko ../driver/tx_intf/tx_intf.ko ../driver/rx_intf/rx_intf.ko ../driver/openofdm_tx/openofdm_tx.ko ../driver/openofdm_rx/openofdm_rx.ko ../driver/xpu/xpu.ko ../driver/sdr.ko ./drv_and_fpga -f
cp $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME/sdk/git_info.txt ./drv_and_fpga -f
tar -cvf ./drv_and_fpga/driver.tar $(git ls-files ../driver/)
dir_save=$(pwd)
# dir_save=$(pwd)
cd $OPENWIFI_HW_DIR/ip/
tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-root.tar $(git ls-files ./ | grep -v -E "/|openofdm_rx")
tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-xpu.tar $(git ls-files ./xpu)
tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-tx_intf.tar $(git ls-files ./tx_intf)
tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-rx_intf.tar $(git ls-files ./rx_intf)
tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-openofdm_tx.tar $(git ls-files ./openofdm_tx)
tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-side_ch.tar $(git ls-files ./side_ch)
# cd $OPENWIFI_HW_DIR/ip/
# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-root.tar $(git ls-files ./ | grep -v -E "/|openofdm_rx")
# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-xpu.tar $(git ls-files ./xpu)
# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-tx_intf.tar $(git ls-files ./tx_intf)
# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-rx_intf.tar $(git ls-files ./rx_intf)
# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-openofdm_tx.tar $(git ls-files ./openofdm_tx)
# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-ip-side_ch.tar $(git ls-files ./side_ch)
cd ../boards
tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-root.tar $(git ls-files ./ | grep -v "/")
cd ./$BOARD_NAME
tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-root.tar $(git ls-files ./ | grep -v "/")
tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-src.tar $(git ls-files ./src)
tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-ip_repo.tar ip_repo
# cd ../boards
# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-root.tar $(git ls-files ./ | grep -v "/")
# cd ./$BOARD_NAME
# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-root.tar $(git ls-files ./ | grep -v "/")
# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-src.tar $(git ls-files ./src)
# tar -cvf $dir_save/drv_and_fpga/openwifi-hw-boards-$BOARD_NAME-ip_repo.tar ip_repo
cd $dir_save
# tar -cvf drv_and_fpga.tar system_top.bit.bin tx_intf.ko rx_intf.ko openofdm_tx.ko openofdm_rx.ko xpu.ko sdr.ko git_info.txt
# cd $dir_save
# # tar -cvf drv_and_fpga.tar system_top.bit.bin tx_intf.ko rx_intf.ko openofdm_tx.ko openofdm_rx.ko xpu.ko sdr.ko git_info.txt
tar -zcvf drv_and_fpga.tar.gz drv_and_fpga

21
user_space/eifs_by_last_rx_fail_disable.sh Executable file
View File

@ -0,0 +1,21 @@
#!/bin/bash
home_dir=$(pwd)
if test -d "/sys/devices/platform/fpga-axi@0/fpga-axi@0:sdr"; then
cd /sys/devices/platform/fpga-axi@0/fpga-axi@0:sdr
else
cd /sys/devices/soc0/fpga-axi\@0/fpga-axi\@0\:sdr
fi
set -x
#set
if [[ -n $1 ]]; then
echo "4$1" > csma_cfg0
fi
# show
cat csma_cfg0
set +x
cd $home_dir

21
user_space/eifs_by_last_tx_fail_disable.sh Executable file
View File

@ -0,0 +1,21 @@
#!/bin/bash
home_dir=$(pwd)
if test -d "/sys/devices/platform/fpga-axi@0/fpga-axi@0:sdr"; then
cd /sys/devices/platform/fpga-axi@0/fpga-axi@0:sdr
else
cd /sys/devices/soc0/fpga-axi\@0/fpga-axi\@0\:sdr
fi
set -x
#set
if [[ -n $1 ]]; then
echo "5$1" > csma_cfg0
fi
# show
cat csma_cfg0
set +x
cd $home_dir

60
user_space/fast_reg_log/fast_reg_log.c Normal file
View File

@ -0,0 +1,60 @@
// Author: Xianjun Jiao (xianjun.jiao@imec.be; putaoshu@msn.com)
// SPDX-FileCopyrightText: 2023 UGent
// SPDX-License-Identifier: AGPL-3.0-or-later
// Use this example together with fast_reg_log_analyzer.m (notter release)
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <fcntl.h>
#include <sys/mman.h>
#include <stdint.h>
int main()
{
unsigned int bram_size = 0x10000; // 64KB, aligned with openwifi hw .bd and devicetree
off_t bram_pbase = 0x83c40000; // physical base address, aligned with openwifi hw .bd and devicetree (this example: xpu @ 32bit boards)
uint32_t *bram32_vptr;
int fd, i, j;
uint32_t tsf_reg[524288*2];
FILE *fp;
// Map the BRAM physical address into user space getting a virtual address for it
if ((fd = open("/dev/mem", O_RDONLY | O_SYNC)) != -1) {
bram32_vptr = (uint32_t *)mmap(NULL, bram_size, PROT_READ, MAP_SHARED, fd, bram_pbase);
fp = fopen ("fast_reg_log.bin", "wb");
if (fp == NULL) {
printf("fopen fast_reg_log.bin failed! %d\n", (int)fp);
close(fd);
return(0);
}
for (j=0; j<10; j++) {
for (i=0; i<(524288*2); i=i+2) {
tsf_reg[i+0] = (*(bram32_vptr+57)); // read xpu register 57: rssi trx agc cca status
tsf_reg[i+1] = (*(bram32_vptr+58)); // read xpu register 58: low 32bit of tsf
}
// for (i=0; i<1024; i++) {
// printf("%d %x\n", tsf[i], reg[i]);
// }
// memcpy(buf, bram64_vptr, bram_size);
fwrite(tsf_reg, sizeof(uint32_t), 524288*2, fp);
}
fclose(fp);
// printf("%016llx\n", buf[65532]);
// printf("%016llx\n", buf[65533]);
// printf("%016llx\n", buf[65534]);
// printf("%016llx\n", buf[65535]);
// //for(i=0; i<32; i++) {
// // printf("0x%02x\n", buf[i]);
// //}
close(fd);
}
return(0);
}

71
user_space/fast_reg_log/fast_reg_log_analyzer.m Normal file
View File

@ -0,0 +1,71 @@
% Author: Xianjun Jiao (xianjun.jiao@imec.be; putaoshu@msn.com)
% SPDX-FileCopyrightText: 2023 UGent
% SPDX-License-Identifier: AGPL-3.0-or-later
function fast_reg_log_analyzer(filename_bin, start_idx, end_idx)
close all;
% if exist('start_idx', 'var')==0 || isempty(start_idx)
% start_idx = 1;
% end
%
% if exist('end_idx', 'var')==0 || isempty(end_idx)
% end_idx = 65536;
% end
filename_csv = [filename_bin(1:(end-3)) 'csv'];
disp(['Human readable fast reg log will be in ' filename_csv]);
fid = fopen(filename_bin);
if fid == -1
disp('fopen failed!');
return;
end
a = fread(fid, inf, 'uint32');
fclose(fid);
% a = bitand(uint32(a), uint32(268435455));
% plot(a(1:2:end)); hold on;
% plot(a(2:2:end));
% legend('1', '2');
a = uint32(a);
tsf = a(2:2:end);
% plot(tsf);
state = a(1:2:end);
% find out overflow idx
overflow_idx = find(diff([0; double(tsf)])<0, 1, 'first');
% overflow_idx
if ~isempty(overflow_idx)
tsf(overflow_idx:end) = tsf(overflow_idx:end) + (2^32);
disp(num2str(overflow_idx));
end
rssi_correction = 145;
rssi_half_db = double(bitand(bitshift(state, 0), uint32((2^11)-1)));
agc_lock = 1 - double(bitand(bitshift(state, -11), uint32(1)));
demod_is_ongoing = double(bitand(bitshift(state, -12), uint32(1)));
tx_is_ongoing = double(bitand(bitshift(state, -13), uint32(1)));
ch_idle = 1 - double(bitand(bitshift(state, -14), uint32(1)));
iq_rssi_half_db = double(bitand(bitshift(state, -16), uint32((2^9)-1)));
agc_gain = double(bitand(bitshift(state, -25), uint32((2^7)-1)));
rssi_dbm = (rssi_half_db./2) - rssi_correction;
figure;
subplot(2,1,1);
plot(tsf, -rssi_dbm, 'r+-'); hold on;
plot(tsf, iq_rssi_half_db, 'bo-');
plot(tsf, agc_gain, 'ks-');
legend('rssi dbm', 'iq rssi half db', 'agc gain');
subplot(2,1,2);
plot(tsf, agc_lock+0); hold on;
plot(tsf, demod_is_ongoing+2);
plot(tsf, tx_is_ongoing+4);
plot(tsf, ch_idle+6);
legend('agc lock', 'demod is ongoing', 'tx is ongoing', 'ch idle');
a=table(tsf, rssi_half_db, rssi_dbm, iq_rssi_half_db, agc_gain, agc_lock, demod_is_ongoing, tx_is_ongoing, ch_idle);
writetable(a, filename_csv);

6
user_space/fosdem-11ag.sh
View File

@ -15,12 +15,14 @@ killall hostapd
killall webfsd
cd ~/openwifi
service network-manager stop
# service network-manager stop
# ./wgd.sh $test_mode
ifconfig sdr0 192.168.13.1
route add default gw 192.168.10.1
rm /var/run/dhcpd.pid
sleep 1
service isc-dhcp-server restart
hostapd hostapd-openwifi-11ag.conf &
sleep 5
cd webserver
webfsd -F -p 80 -f index.html &
route add default gw 192.168.10.1

7
user_space/fosdem.sh
View File

@ -15,12 +15,15 @@ killall hostapd
killall webfsd
cd ~/openwifi
service network-manager stop
# service network-manager stop
# ./wgd.sh $test_mode
ifconfig sdr0 192.168.13.1
route add default gw 192.168.10.1
rm /var/run/dhcpd.pid
sleep 1
service isc-dhcp-server restart
hostapd hostapd-openwifi.conf &
sleep 5
cd webserver
webfsd -F -p 80 -f index.html &
route add default gw 192.168.10.1

9
user_space/hostapd-openwifi-11ag.conf
View File

@ -3,7 +3,7 @@ driver=nl80211
country_code=BE
ssid=openwifi
hw_mode=a
channel=44
channel=36
supported_rates=60 90 120 180 240 360 480 540
basic_rates=60 90 120 180
#ieee80211n=1
@ -11,6 +11,9 @@ basic_rates=60 90 120 180
#require_ht=1
#ieee80211d=1
#ieee80211h=1
#wpa=2
#wpa_passphrase=myrabbit
#wpa=1
#wpa_passphrase=openwifi
#wpa_key_mgmt=WPA-PSK
#wpa_pairwise=TKIP CCMP
#wpa_ptk_rekey=600

9
user_space/hostapd-openwifi.conf
View File

@ -3,7 +3,7 @@ driver=nl80211
country_code=BE
ssid=openwifi
hw_mode=a
channel=44
channel=36
supported_rates=60 90 120 180 240 360 480 540
basic_rates=60 90 120 180
ieee80211n=1
@ -11,6 +11,9 @@ ieee80211n=1
require_ht=1
#ieee80211d=1
#ieee80211h=1
#wpa=2
#wpa_passphrase=myrabbit
#wpa=1
#wpa_passphrase=openwifi
#wpa_key_mgmt=WPA-PSK
#wpa_pairwise=TKIP CCMP
#wpa_ptk_rekey=600

7
user_space/inject_80211/Makefile
View File

@ -2,11 +2,12 @@
all: inject_80211 analyze_80211
inject_80211: inject_80211.c
gcc -Wall -Werror inject_80211.c -o inject_80211 -lpcap
# gcc -Wall -Werror inject_80211.c -o inject_80211 -lpcap
gcc -Wall inject_80211.c -o inject_80211 -lpcap
analyze_80211: analyze_80211.c
gcc -Wall -Werror radiotap.c analyze_80211.c -o analyze_80211 -lpcap
# gcc -Wall -Werror radiotap.c analyze_80211.c -o analyze_80211 -lpcap
gcc -Wall radiotap.c analyze_80211.c -o analyze_80211 -lpcap
clean:
rm -f inject_80211 analyze_80211

2
user_space/inject_80211/analyze_80211.c
View File

@ -75,7 +75,7 @@ int main(int argc, char **argv)
if (packet_size < 0)
continue;
if (ieee80211_radiotap_iterator_init(&rti, (struct ieee80211_radiotap_header *)packet, packet_size) < 0)
if (ieee80211_radiotap_iterator_init(&rti, (struct ieee80211_radiotap_header *)packet, packet_size, NULL) < 0)
continue;
while ((n = ieee80211_radiotap_iterator_next(&rti)) == 0)

578
user_space/inject_80211/ieee80211_radiotap.h
View File

@ -1,196 +1,55 @@
/*
* Copyright (c) 2003, 2004 David Young. All rights reserved.
* Copyright (c) 2017 Intel Deutschland GmbH
* Copyright (c) 2018-2019 Intel Corporation
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of David Young may not be used to endorse or promote
* products derived from this software without specific prior
* written permission.
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THIS SOFTWARE IS PROVIDED BY DAVID YOUNG ``AS IS'' AND ANY
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL DAVID
* YOUNG BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __RADIOTAP_H
#define __RADIOTAP_H
/*
* Modifications to fit into the linux IEEE 802.11 stack,
* Mike Kershaw (dragorn@kismetwireless.net)
*/
#ifndef IEEE80211RADIOTAP_H
#define IEEE80211RADIOTAP_H
#include <linux/if_ether.h>
#include <linux/kernel.h>
// #include <asm/unaligned.h>
/* Base version of the radiotap packet header data */
#define PKTHDR_RADIOTAP_VERSION 0
/* A generic radio capture format is desirable. There is one for
* Linux, but it is neither rigidly defined (there were not even
* units given for some fields) nor easily extensible.
*
* I suggest the following extensible radio capture format. It is
* based on a bitmap indicating which fields are present.
*
* I am trying to describe precisely what the application programmer
* should expect in the following, and for that reason I tell the
* units and origin of each measurement (where it applies), or else I
* use sufficiently weaselly language ("is a monotonically nondecreasing
* function of...") that I cannot set false expectations for lawyerly
* readers.
*/
/*
* The radio capture header precedes the 802.11 header.
* All data in the header is little endian on all platforms.
/**
* struct ieee82011_radiotap_header - base radiotap header
*/
struct ieee80211_radiotap_header {
u8 it_version; /* Version 0. Only increases
* for drastic changes,
* introduction of compatible
* new fields does not count.
*/
u8 it_pad;
__le16 it_len; /* length of the whole
* header in bytes, including
* it_version, it_pad,
* it_len, and data fields.
*/
__le32 it_present; /* A bitmap telling which
* fields are present. Set bit 31
* (0x80000000) to extend the
* bitmap by another 32 bits.
* Additional extensions are made
* by setting bit 31.
*/
} __packed;
/**
* @it_version: radiotap version, always 0
*/
uint8_t it_version;
/* Name Data type Units
* ---- --------- -----
*
* IEEE80211_RADIOTAP_TSFT __le64 microseconds
*
* Value in microseconds of the MAC's 64-bit 802.11 Time
* Synchronization Function timer when the first bit of the
* MPDU arrived at the MAC. For received frames, only.
*
* IEEE80211_RADIOTAP_CHANNEL 2 x __le16 MHz, bitmap
*
* Tx/Rx frequency in MHz, followed by flags (see below).
*
* IEEE80211_RADIOTAP_FHSS __le16 see below
*
* For frequency-hopping radios, the hop set (first byte)
* and pattern (second byte).
*
* IEEE80211_RADIOTAP_RATE u8 500kb/s
*
* Tx/Rx data rate
*
* IEEE80211_RADIOTAP_DBM_ANTSIGNAL s8 decibels from
* one milliwatt (dBm)
*
* RF signal power at the antenna, decibel difference from
* one milliwatt.
*
* IEEE80211_RADIOTAP_DBM_ANTNOISE s8 decibels from
* one milliwatt (dBm)
*
* RF noise power at the antenna, decibel difference from one
* milliwatt.
*
* IEEE80211_RADIOTAP_DB_ANTSIGNAL u8 decibel (dB)
*
* RF signal power at the antenna, decibel difference from an
* arbitrary, fixed reference.
*
* IEEE80211_RADIOTAP_DB_ANTNOISE u8 decibel (dB)
*
* RF noise power at the antenna, decibel difference from an
* arbitrary, fixed reference point.
*
* IEEE80211_RADIOTAP_LOCK_QUALITY __le16 unitless
*
* Quality of Barker code lock. Unitless. Monotonically
* nondecreasing with "better" lock strength. Called "Signal
* Quality" in datasheets. (Is there a standard way to measure
* this?)
*
* IEEE80211_RADIOTAP_TX_ATTENUATION __le16 unitless
*
* Transmit power expressed as unitless distance from max
* power set at factory calibration. 0 is max power.
* Monotonically nondecreasing with lower power levels.
*
* IEEE80211_RADIOTAP_DB_TX_ATTENUATION __le16 decibels (dB)
*
* Transmit power expressed as decibel distance from max power
* set at factory calibration. 0 is max power. Monotonically
* nondecreasing with lower power levels.
*
* IEEE80211_RADIOTAP_DBM_TX_POWER s8 decibels from
* one milliwatt (dBm)
*
* Transmit power expressed as dBm (decibels from a 1 milliwatt
* reference). This is the absolute power level measured at
* the antenna port.
*
* IEEE80211_RADIOTAP_FLAGS u8 bitmap
*
* Properties of transmitted and received frames. See flags
* defined below.
*
* IEEE80211_RADIOTAP_ANTENNA u8 antenna index
*
* Unitless indication of the Rx/Tx antenna for this packet.
* The first antenna is antenna 0.
*
* IEEE80211_RADIOTAP_RX_FLAGS __le16 bitmap
*
* Properties of received frames. See flags defined below.
*
* IEEE80211_RADIOTAP_TX_FLAGS __le16 bitmap
*
* Properties of transmitted frames. See flags defined below.
*
* IEEE80211_RADIOTAP_RTS_RETRIES u8 data
*
* Number of rts retries a transmitted frame used.
*
* IEEE80211_RADIOTAP_DATA_RETRIES u8 data
*
* Number of unicast retries a transmitted frame used.
*
* IEEE80211_RADIOTAP_MCS u8, u8, u8 unitless
*
* Contains a bitmap of known fields/flags, the flags, and
* the MCS index.
*
* IEEE80211_RADIOTAP_AMPDU_STATUS u32, u16, u8, u8 unitless
*
* Contains the AMPDU information for the subframe.
*
* IEEE80211_RADIOTAP_VHT u16, u8, u8, u8[4], u8, u8, u16
*
* Contains VHT information about this frame.
*/
enum ieee80211_radiotap_type {
/**
* @it_pad: padding (or alignment)
*/
uint8_t it_pad;
/**
* @it_len: overall radiotap header length
*/
__le16 it_len;
/**
* @it_present: (first) present word
*/
__le32 it_present;
} __attribute__((packed));
/* version is always 0 */
#define PKTHDR_RADIOTAP_VERSION 0
/* see the radiotap website for the descriptions */
enum ieee80211_radiotap_presence {
IEEE80211_RADIOTAP_TSFT = 0,
IEEE80211_RADIOTAP_FLAGS = 1,
IEEE80211_RADIOTAP_RATE = 2,
@ -209,10 +68,15 @@ enum ieee80211_radiotap_type {
IEEE80211_RADIOTAP_TX_FLAGS = 15,
IEEE80211_RADIOTAP_RTS_RETRIES = 16,
IEEE80211_RADIOTAP_DATA_RETRIES = 17,
/* 18 is XChannel, but it's not defined yet */
IEEE80211_RADIOTAP_MCS = 19,
IEEE80211_RADIOTAP_AMPDU_STATUS = 20,
IEEE80211_RADIOTAP_VHT = 21,
IEEE80211_RADIOTAP_TIMESTAMP = 22,
IEEE80211_RADIOTAP_HE = 23,
IEEE80211_RADIOTAP_HE_MU = 24,
IEEE80211_RADIOTAP_ZERO_LEN_PSDU = 26,
IEEE80211_RADIOTAP_LSIG = 27,
/* valid in every it_present bitmap, even vendor namespaces */
IEEE80211_RADIOTAP_RADIOTAP_NAMESPACE = 29,
@ -220,88 +84,284 @@ enum ieee80211_radiotap_type {
IEEE80211_RADIOTAP_EXT = 31
};
/* Channel flags. */
#define IEEE80211_CHAN_TURBO 0x0010 /* Turbo channel */
#define IEEE80211_CHAN_CCK 0x0020 /* CCK channel */
#define IEEE80211_CHAN_OFDM 0x0040 /* OFDM channel */
#define IEEE80211_CHAN_2GHZ 0x0080 /* 2 GHz spectrum channel. */
#define IEEE80211_CHAN_5GHZ 0x0100 /* 5 GHz spectrum channel */
#define IEEE80211_CHAN_PASSIVE 0x0200 /* Only passive scan allowed */
#define IEEE80211_CHAN_DYN 0x0400 /* Dynamic CCK-OFDM channel */
#define IEEE80211_CHAN_GFSK 0x0800 /* GFSK channel (FHSS PHY) */
/* for IEEE80211_RADIOTAP_FLAGS */
enum ieee80211_radiotap_flags {
IEEE80211_RADIOTAP_F_CFP = 0x01,
IEEE80211_RADIOTAP_F_SHORTPRE = 0x02,
IEEE80211_RADIOTAP_F_WEP = 0x04,
IEEE80211_RADIOTAP_F_FRAG = 0x08,
IEEE80211_RADIOTAP_F_FCS = 0x10,
IEEE80211_RADIOTAP_F_DATAPAD = 0x20,
IEEE80211_RADIOTAP_F_BADFCS = 0x40,
};
/* For IEEE80211_RADIOTAP_FLAGS */
#define IEEE80211_RADIOTAP_F_CFP 0x01 /* sent/received
* during CFP
*/
#define IEEE80211_RADIOTAP_F_SHORTPRE 0x02 /* sent/received
* with short
* preamble
*/
#define IEEE80211_RADIOTAP_F_WEP 0x04 /* sent/received
* with WEP encryption
*/
#define IEEE80211_RADIOTAP_F_FRAG 0x08 /* sent/received
* with fragmentation
*/
#define IEEE80211_RADIOTAP_F_FCS 0x10 /* frame includes FCS */
#define IEEE80211_RADIOTAP_F_DATAPAD 0x20 /* frame has padding between
* 802.11 header and payload
* (to 32-bit boundary)
*/
#define IEEE80211_RADIOTAP_F_BADFCS 0x40 /* bad FCS */
/* for IEEE80211_RADIOTAP_CHANNEL */
enum ieee80211_radiotap_channel_flags {
IEEE80211_CHAN_CCK = 0x0020,
IEEE80211_CHAN_OFDM = 0x0040,
IEEE80211_CHAN_2GHZ = 0x0080,
IEEE80211_CHAN_5GHZ = 0x0100,
IEEE80211_CHAN_DYN = 0x0400,
IEEE80211_CHAN_HALF = 0x4000,
IEEE80211_CHAN_QUARTER = 0x8000,
};
/* For IEEE80211_RADIOTAP_RX_FLAGS */
#define IEEE80211_RADIOTAP_F_RX_BADPLCP 0x0002 /* frame has bad PLCP */
/* for IEEE80211_RADIOTAP_RX_FLAGS */
enum ieee80211_radiotap_rx_flags {
IEEE80211_RADIOTAP_F_RX_BADPLCP = 0x0002,
};
/* For IEEE80211_RADIOTAP_TX_FLAGS */
#define IEEE80211_RADIOTAP_F_TX_FAIL 0x0001 /* failed due to excessive
* retries */
#define IEEE80211_RADIOTAP_F_TX_CTS 0x0002 /* used cts 'protection' */
#define IEEE80211_RADIOTAP_F_TX_RTS 0x0004 /* used rts/cts handshake */
#define IEEE80211_RADIOTAP_F_TX_NOACK 0x0008 /* don't expect an ack */
/* for IEEE80211_RADIOTAP_TX_FLAGS */
enum ieee80211_radiotap_tx_flags {
IEEE80211_RADIOTAP_F_TX_FAIL = 0x0001,
IEEE80211_RADIOTAP_F_TX_CTS = 0x0002,
IEEE80211_RADIOTAP_F_TX_RTS = 0x0004,
IEEE80211_RADIOTAP_F_TX_NOACK = 0x0008,
IEEE80211_RADIOTAP_F_TX_NOSEQNO = 0x0010,
};
/* for IEEE80211_RADIOTAP_MCS "have" flags */
enum ieee80211_radiotap_mcs_have {
IEEE80211_RADIOTAP_MCS_HAVE_BW = 0x01,
IEEE80211_RADIOTAP_MCS_HAVE_MCS = 0x02,
IEEE80211_RADIOTAP_MCS_HAVE_GI = 0x04,
IEEE80211_RADIOTAP_MCS_HAVE_FMT = 0x08,
IEEE80211_RADIOTAP_MCS_HAVE_FEC = 0x10,
IEEE80211_RADIOTAP_MCS_HAVE_STBC = 0x20,
};
/* For IEEE80211_RADIOTAP_MCS */
#define IEEE80211_RADIOTAP_MCS_HAVE_BW 0x01
#define IEEE80211_RADIOTAP_MCS_HAVE_MCS 0x02
#define IEEE80211_RADIOTAP_MCS_HAVE_GI 0x04
#define IEEE80211_RADIOTAP_MCS_HAVE_FMT 0x08
#define IEEE80211_RADIOTAP_MCS_HAVE_FEC 0x10
enum ieee80211_radiotap_mcs_flags {
IEEE80211_RADIOTAP_MCS_BW_MASK = 0x03,
IEEE80211_RADIOTAP_MCS_BW_20 = 0,
IEEE80211_RADIOTAP_MCS_BW_40 = 1,
IEEE80211_RADIOTAP_MCS_BW_20L = 2,
IEEE80211_RADIOTAP_MCS_BW_20U = 3,
#define IEEE80211_RADIOTAP_MCS_BW_MASK 0x03
#define IEEE80211_RADIOTAP_MCS_BW_20 0
#define IEEE80211_RADIOTAP_MCS_BW_40 1
#define IEEE80211_RADIOTAP_MCS_BW_20L 2
#define IEEE80211_RADIOTAP_MCS_BW_20U 3
#define IEEE80211_RADIOTAP_MCS_SGI 0x04
#define IEEE80211_RADIOTAP_MCS_FMT_GF 0x08
#define IEEE80211_RADIOTAP_MCS_FEC_LDPC 0x10
IEEE80211_RADIOTAP_MCS_SGI = 0x04,
IEEE80211_RADIOTAP_MCS_FMT_GF = 0x08,
IEEE80211_RADIOTAP_MCS_FEC_LDPC = 0x10,
IEEE80211_RADIOTAP_MCS_STBC_MASK = 0x60,
IEEE80211_RADIOTAP_MCS_STBC_1 = 1,
IEEE80211_RADIOTAP_MCS_STBC_2 = 2,
IEEE80211_RADIOTAP_MCS_STBC_3 = 3,
IEEE80211_RADIOTAP_MCS_STBC_SHIFT = 5,
};
/* For IEEE80211_RADIOTAP_AMPDU_STATUS */
#define IEEE80211_RADIOTAP_AMPDU_REPORT_ZEROLEN 0x0001
#define IEEE80211_RADIOTAP_AMPDU_IS_ZEROLEN 0x0002
#define IEEE80211_RADIOTAP_AMPDU_LAST_KNOWN 0x0004
#define IEEE80211_RADIOTAP_AMPDU_IS_LAST 0x0008
#define IEEE80211_RADIOTAP_AMPDU_DELIM_CRC_ERR 0x0010
#define IEEE80211_RADIOTAP_AMPDU_DELIM_CRC_KNOWN 0x0020
/* for IEEE80211_RADIOTAP_AMPDU_STATUS */
enum ieee80211_radiotap_ampdu_flags {
IEEE80211_RADIOTAP_AMPDU_REPORT_ZEROLEN = 0x0001,
IEEE80211_RADIOTAP_AMPDU_IS_ZEROLEN = 0x0002,
IEEE80211_RADIOTAP_AMPDU_LAST_KNOWN = 0x0004,
IEEE80211_RADIOTAP_AMPDU_IS_LAST = 0x0008,
IEEE80211_RADIOTAP_AMPDU_DELIM_CRC_ERR = 0x0010,
IEEE80211_RADIOTAP_AMPDU_DELIM_CRC_KNOWN = 0x0020,
IEEE80211_RADIOTAP_AMPDU_EOF = 0x0040,
IEEE80211_RADIOTAP_AMPDU_EOF_KNOWN = 0x0080,
};
/* For IEEE80211_RADIOTAP_VHT */
#define IEEE80211_RADIOTAP_VHT_KNOWN_STBC 0x0001
#define IEEE80211_RADIOTAP_VHT_KNOWN_TXOP_PS_NA 0x0002
#define IEEE80211_RADIOTAP_VHT_KNOWN_GI 0x0004
#define IEEE80211_RADIOTAP_VHT_KNOWN_SGI_NSYM_DIS 0x0008
#define IEEE80211_RADIOTAP_VHT_KNOWN_LDPC_EXTRA_OFDM_SYM 0x0010
#define IEEE80211_RADIOTAP_VHT_KNOWN_BEAMFORMED 0x0020
#define IEEE80211_RADIOTAP_VHT_KNOWN_BANDWIDTH 0x0040
#define IEEE80211_RADIOTAP_VHT_KNOWN_GROUP_ID 0x0080
#define IEEE80211_RADIOTAP_VHT_KNOWN_PARTIAL_AID 0x0100
/* for IEEE80211_RADIOTAP_VHT */
enum ieee80211_radiotap_vht_known {
IEEE80211_RADIOTAP_VHT_KNOWN_STBC = 0x0001,
IEEE80211_RADIOTAP_VHT_KNOWN_TXOP_PS_NA = 0x0002,
IEEE80211_RADIOTAP_VHT_KNOWN_GI = 0x0004,
IEEE80211_RADIOTAP_VHT_KNOWN_SGI_NSYM_DIS = 0x0008,
IEEE80211_RADIOTAP_VHT_KNOWN_LDPC_EXTRA_OFDM_SYM = 0x0010,
IEEE80211_RADIOTAP_VHT_KNOWN_BEAMFORMED = 0x0020,
IEEE80211_RADIOTAP_VHT_KNOWN_BANDWIDTH = 0x0040,
IEEE80211_RADIOTAP_VHT_KNOWN_GROUP_ID = 0x0080,
IEEE80211_RADIOTAP_VHT_KNOWN_PARTIAL_AID = 0x0100,
};
#define IEEE80211_RADIOTAP_VHT_FLAG_STBC 0x01
#define IEEE80211_RADIOTAP_VHT_FLAG_TXOP_PS_NA 0x02
#define IEEE80211_RADIOTAP_VHT_FLAG_SGI 0x04
#define IEEE80211_RADIOTAP_VHT_FLAG_SGI_NSYM_M10_9 0x08
#define IEEE80211_RADIOTAP_VHT_FLAG_LDPC_EXTRA_OFDM_SYM 0x10
#define IEEE80211_RADIOTAP_VHT_FLAG_BEAMFORMED 0x20
enum ieee80211_radiotap_vht_flags {
IEEE80211_RADIOTAP_VHT_FLAG_STBC = 0x01,
IEEE80211_RADIOTAP_VHT_FLAG_TXOP_PS_NA = 0x02,
IEEE80211_RADIOTAP_VHT_FLAG_SGI = 0x04,
IEEE80211_RADIOTAP_VHT_FLAG_SGI_NSYM_M10_9 = 0x08,
IEEE80211_RADIOTAP_VHT_FLAG_LDPC_EXTRA_OFDM_SYM = 0x10,
IEEE80211_RADIOTAP_VHT_FLAG_BEAMFORMED = 0x20,
};
#endif /* IEEE80211_RADIOTAP_H */
enum ieee80211_radiotap_vht_coding {
IEEE80211_RADIOTAP_CODING_LDPC_USER0 = 0x01,
IEEE80211_RADIOTAP_CODING_LDPC_USER1 = 0x02,
IEEE80211_RADIOTAP_CODING_LDPC_USER2 = 0x04,
IEEE80211_RADIOTAP_CODING_LDPC_USER3 = 0x08,
};
/* for IEEE80211_RADIOTAP_TIMESTAMP */
enum ieee80211_radiotap_timestamp_unit_spos {
IEEE80211_RADIOTAP_TIMESTAMP_UNIT_MASK = 0x000F,
IEEE80211_RADIOTAP_TIMESTAMP_UNIT_MS = 0x0000,
IEEE80211_RADIOTAP_TIMESTAMP_UNIT_US = 0x0001,
IEEE80211_RADIOTAP_TIMESTAMP_UNIT_NS = 0x0003,
IEEE80211_RADIOTAP_TIMESTAMP_SPOS_MASK = 0x00F0,
IEEE80211_RADIOTAP_TIMESTAMP_SPOS_BEGIN_MDPU = 0x0000,
IEEE80211_RADIOTAP_TIMESTAMP_SPOS_PLCP_SIG_ACQ = 0x0010,
IEEE80211_RADIOTAP_TIMESTAMP_SPOS_EO_PPDU = 0x0020,
IEEE80211_RADIOTAP_TIMESTAMP_SPOS_EO_MPDU = 0x0030,
IEEE80211_RADIOTAP_TIMESTAMP_SPOS_UNKNOWN = 0x00F0,
};
enum ieee80211_radiotap_timestamp_flags {
IEEE80211_RADIOTAP_TIMESTAMP_FLAG_64BIT = 0x00,
IEEE80211_RADIOTAP_TIMESTAMP_FLAG_32BIT = 0x01,
IEEE80211_RADIOTAP_TIMESTAMP_FLAG_ACCURACY = 0x02,
};
struct ieee80211_radiotap_he {
__le16 data1, data2, data3, data4, data5, data6;
};
enum ieee80211_radiotap_he_bits {
IEEE80211_RADIOTAP_HE_DATA1_FORMAT_MASK = 3,
IEEE80211_RADIOTAP_HE_DATA1_FORMAT_SU = 0,
IEEE80211_RADIOTAP_HE_DATA1_FORMAT_EXT_SU = 1,
IEEE80211_RADIOTAP_HE_DATA1_FORMAT_MU = 2,
IEEE80211_RADIOTAP_HE_DATA1_FORMAT_TRIG = 3,
IEEE80211_RADIOTAP_HE_DATA1_BSS_COLOR_KNOWN = 0x0004,
IEEE80211_RADIOTAP_HE_DATA1_BEAM_CHANGE_KNOWN = 0x0008,
IEEE80211_RADIOTAP_HE_DATA1_UL_DL_KNOWN = 0x0010,
IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN = 0x0020,
IEEE80211_RADIOTAP_HE_DATA1_DATA_DCM_KNOWN = 0x0040,
IEEE80211_RADIOTAP_HE_DATA1_CODING_KNOWN = 0x0080,
IEEE80211_RADIOTAP_HE_DATA1_LDPC_XSYMSEG_KNOWN = 0x0100,
IEEE80211_RADIOTAP_HE_DATA1_STBC_KNOWN = 0x0200,
IEEE80211_RADIOTAP_HE_DATA1_SPTL_REUSE_KNOWN = 0x0400,
IEEE80211_RADIOTAP_HE_DATA1_SPTL_REUSE2_KNOWN = 0x0800,
IEEE80211_RADIOTAP_HE_DATA1_SPTL_REUSE3_KNOWN = 0x1000,
IEEE80211_RADIOTAP_HE_DATA1_SPTL_REUSE4_KNOWN = 0x2000,
IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN = 0x4000,
IEEE80211_RADIOTAP_HE_DATA1_DOPPLER_KNOWN = 0x8000,
IEEE80211_RADIOTAP_HE_DATA2_PRISEC_80_KNOWN = 0x0001,
IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN = 0x0002,
IEEE80211_RADIOTAP_HE_DATA2_NUM_LTF_SYMS_KNOWN = 0x0004,
IEEE80211_RADIOTAP_HE_DATA2_PRE_FEC_PAD_KNOWN = 0x0008,
IEEE80211_RADIOTAP_HE_DATA2_TXBF_KNOWN = 0x0010,
IEEE80211_RADIOTAP_HE_DATA2_PE_DISAMBIG_KNOWN = 0x0020,
IEEE80211_RADIOTAP_HE_DATA2_TXOP_KNOWN = 0x0040,
IEEE80211_RADIOTAP_HE_DATA2_MIDAMBLE_KNOWN = 0x0080,
IEEE80211_RADIOTAP_HE_DATA2_RU_OFFSET = 0x3f00,
IEEE80211_RADIOTAP_HE_DATA2_RU_OFFSET_KNOWN = 0x4000,
IEEE80211_RADIOTAP_HE_DATA2_PRISEC_80_SEC = 0x8000,
IEEE80211_RADIOTAP_HE_DATA3_BSS_COLOR = 0x003f,
IEEE80211_RADIOTAP_HE_DATA3_BEAM_CHANGE = 0x0040,
IEEE80211_RADIOTAP_HE_DATA3_UL_DL = 0x0080,
IEEE80211_RADIOTAP_HE_DATA3_DATA_MCS = 0x0f00,
IEEE80211_RADIOTAP_HE_DATA3_DATA_DCM = 0x1000,
IEEE80211_RADIOTAP_HE_DATA3_CODING = 0x2000,
IEEE80211_RADIOTAP_HE_DATA3_LDPC_XSYMSEG = 0x4000,
IEEE80211_RADIOTAP_HE_DATA3_STBC = 0x8000,
IEEE80211_RADIOTAP_HE_DATA4_SU_MU_SPTL_REUSE = 0x000f,
IEEE80211_RADIOTAP_HE_DATA4_MU_STA_ID = 0x7ff0,
IEEE80211_RADIOTAP_HE_DATA4_TB_SPTL_REUSE1 = 0x000f,
IEEE80211_RADIOTAP_HE_DATA4_TB_SPTL_REUSE2 = 0x00f0,
IEEE80211_RADIOTAP_HE_DATA4_TB_SPTL_REUSE3 = 0x0f00,
IEEE80211_RADIOTAP_HE_DATA4_TB_SPTL_REUSE4 = 0xf000,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC = 0x000f,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC_20MHZ = 0,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC_40MHZ = 1,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC_80MHZ = 2,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC_160MHZ = 3,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC_26T = 4,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC_52T = 5,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC_106T = 6,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC_242T = 7,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC_484T = 8,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC_996T = 9,
IEEE80211_RADIOTAP_HE_DATA5_DATA_BW_RU_ALLOC_2x996T = 10,
IEEE80211_RADIOTAP_HE_DATA5_GI = 0x0030,
IEEE80211_RADIOTAP_HE_DATA5_GI_0_8 = 0,
IEEE80211_RADIOTAP_HE_DATA5_GI_1_6 = 1,
IEEE80211_RADIOTAP_HE_DATA5_GI_3_2 = 2,
IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE = 0x00c0,
IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE_UNKNOWN = 0,
IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE_1X = 1,
IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE_2X = 2,
IEEE80211_RADIOTAP_HE_DATA5_LTF_SIZE_4X = 3,
IEEE80211_RADIOTAP_HE_DATA5_NUM_LTF_SYMS = 0x0700,
IEEE80211_RADIOTAP_HE_DATA5_PRE_FEC_PAD = 0x3000,
IEEE80211_RADIOTAP_HE_DATA5_TXBF = 0x4000,
IEEE80211_RADIOTAP_HE_DATA5_PE_DISAMBIG = 0x8000,
IEEE80211_RADIOTAP_HE_DATA6_NSTS = 0x000f,
IEEE80211_RADIOTAP_HE_DATA6_DOPPLER = 0x0010,
IEEE80211_RADIOTAP_HE_DATA6_TB_PPDU_BW_KNOWN = 0x0020,
IEEE80211_RADIOTAP_HE_DATA6_TB_PPDU_BW = 0x00c0,
IEEE80211_RADIOTAP_HE_DATA6_TB_PPDU_BW_20MHZ = 0,
IEEE80211_RADIOTAP_HE_DATA6_TB_PPDU_BW_40MHZ = 1,
IEEE80211_RADIOTAP_HE_DATA6_TB_PPDU_BW_80MHZ = 2,
IEEE80211_RADIOTAP_HE_DATA6_TB_PPDU_BW_160MHZ = 3,
IEEE80211_RADIOTAP_HE_DATA6_TXOP = 0x7f00,
IEEE80211_RADIOTAP_HE_DATA6_MIDAMBLE_PDCTY = 0x8000,
};
struct ieee80211_radiotap_he_mu {
__le16 flags1, flags2;
u8 ru_ch1[4];
u8 ru_ch2[4];
};
enum ieee80211_radiotap_he_mu_bits {
IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_MCS = 0x000f,
IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_MCS_KNOWN = 0x0010,
IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_DCM = 0x0020,
IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_DCM_KNOWN = 0x0040,
IEEE80211_RADIOTAP_HE_MU_FLAGS1_CH2_CTR_26T_RU_KNOWN = 0x0080,
IEEE80211_RADIOTAP_HE_MU_FLAGS1_CH1_RU_KNOWN = 0x0100,
IEEE80211_RADIOTAP_HE_MU_FLAGS1_CH2_RU_KNOWN = 0x0200,
IEEE80211_RADIOTAP_HE_MU_FLAGS1_CH1_CTR_26T_RU_KNOWN = 0x1000,
IEEE80211_RADIOTAP_HE_MU_FLAGS1_CH1_CTR_26T_RU = 0x2000,
IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_COMP_KNOWN = 0x4000,
IEEE80211_RADIOTAP_HE_MU_FLAGS1_SIG_B_SYMS_USERS_KNOWN = 0x8000,
IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW = 0x0003,
IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW_20MHZ = 0x0000,
IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW_40MHZ = 0x0001,
IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW_80MHZ = 0x0002,
IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW_160MHZ = 0x0003,
IEEE80211_RADIOTAP_HE_MU_FLAGS2_BW_FROM_SIG_A_BW_KNOWN = 0x0004,
IEEE80211_RADIOTAP_HE_MU_FLAGS2_SIG_B_COMP = 0x0008,
IEEE80211_RADIOTAP_HE_MU_FLAGS2_SIG_B_SYMS_USERS = 0x00f0,
IEEE80211_RADIOTAP_HE_MU_FLAGS2_PUNC_FROM_SIG_A_BW = 0x0300,
IEEE80211_RADIOTAP_HE_MU_FLAGS2_PUNC_FROM_SIG_A_BW_KNOWN= 0x0400,
IEEE80211_RADIOTAP_HE_MU_FLAGS2_CH2_CTR_26T_RU = 0x0800,
};
enum ieee80211_radiotap_lsig_data1 {
IEEE80211_RADIOTAP_LSIG_DATA1_RATE_KNOWN = 0x0001,
IEEE80211_RADIOTAP_LSIG_DATA1_LENGTH_KNOWN = 0x0002,
};
enum ieee80211_radiotap_lsig_data2 {
IEEE80211_RADIOTAP_LSIG_DATA2_RATE = 0x000f,
IEEE80211_RADIOTAP_LSIG_DATA2_LENGTH = 0xfff0,
};
struct ieee80211_radiotap_lsig {
__le16 data1, data2;
};
enum ieee80211_radiotap_zero_len_psdu_type {
IEEE80211_RADIOTAP_ZERO_LEN_PSDU_SOUNDING = 0,
IEEE80211_RADIOTAP_ZERO_LEN_PSDU_NOT_CAPTURED = 1,
IEEE80211_RADIOTAP_ZERO_LEN_PSDU_VENDOR = 0xff,
};
// /**
// * ieee80211_get_radiotap_len - get radiotap header length
// */
// static inline u16 ieee80211_get_radiotap_len(const char *data)
// {
// struct ieee80211_radiotap_header *hdr = (void *)data;
// return get_unaligned_le16(&hdr->it_len);
// }
#endif /* __RADIOTAP_H */

6
user_space/inject_80211/inject_80211.c
View File

@ -22,7 +22,7 @@
// 2007-03-15 fixes to getopt_long code by Matteo Croce rootkit85@yahoo.it
#include "inject_80211.h"
#include "radiotap.h"
#include "ieee80211_radiotap.h"
#define BUF_SIZE_MAX (1536)
#define BUF_SIZE_TOTAL (BUF_SIZE_MAX+1) // +1 in case the sprintf insert the last 0
@ -142,7 +142,7 @@ void usage(void)
"-h this menu\n\n"
"Example:\n"
" iw dev wlan0 interface add mon0 type monitor && ifconfig mon0 up\n"
" iw dev sdr0 interface add mon0 type monitor && ifconfig mon0 up\n"
" inject_80211 mon0\n"
"\n");
exit(1);
@ -270,6 +270,7 @@ int main(int argc, char *argv[])
ieee_hdr_data[0] = ( ieee_hdr_data[0]|(sub_type<<4) );
ieee_hdr_data[9] = addr1;
ieee_hdr_data[15] = addr2;
ieee_hdr_data[21] = addr1;
ieee_hdr_len = sizeof(ieee_hdr_data);
ieee_hdr = ieee_hdr_data;
}
@ -278,6 +279,7 @@ int main(int argc, char *argv[])
ieee_hdr_mgmt[0] = ( ieee_hdr_mgmt[0]|(sub_type<<4) );
ieee_hdr_mgmt[9] = addr1;
ieee_hdr_mgmt[15] = addr2;
ieee_hdr_mgmt[21] = addr1;
ieee_hdr_len = sizeof(ieee_hdr_mgmt);
ieee_hdr = ieee_hdr_mgmt;
}

1
user_space/inject_80211/inject_80211.h
View File

@ -12,6 +12,7 @@
#include <pcap.h>
#include <errno.h>
typedef unsigned long long int u64;
typedef unsigned int u32;
typedef unsigned short u16;
typedef unsigned char u8;

400
user_space/inject_80211/radiotap.c
View File

@ -2,16 +2,110 @@
* Radiotap parser
*
* Copyright 2007 Andy Green <andy@warmcat.com>
* Copyright 2009 Johannes Berg <johannes@sipsolutions.net>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Alternatively, this software may be distributed under the terms of BSD
* license.
*
* See COPYING for more details.
*/
#include <linux/kernel.h>
// #include <linux/export.h>
// #include <net/cfg80211.h>
// #include <net/ieee80211_radiotap.h>
// #include <asm/unaligned.h>
#include "inject_80211.h"
#include "radiotap.h"
#include "unaligned.h"
// ----- from kernel, needed by ARRAY_SIZE from kernel.h
/*
* Force a compilation error if condition is true, but also produce a
* result (of value 0 and type int), so the expression can be used
* e.g. in a structure initializer (or where-ever else comma expressions
* aren't permitted).
*/
#define BUILD_BUG_ON_ZERO(e) ((int)(sizeof(struct { int:(-!!(e)); })))
/* Are two types/vars the same type (ignoring qualifiers)? */
#define __same_type(a, b) __builtin_types_compatible_p(typeof(a), typeof(b))
/* &a[0] degrades to a pointer: a different type from an array */
#define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0]))
// ----- ARRAY_SIZE from kernel.h
/**
* ARRAY_SIZE - get the number of elements in array @arr
* @arr: array to be sized
*/
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
// ----- radiotap_align_size
// ----- ieee80211_radiotap_namespace
// ----- ieee80211_radiotap_vendor_namespaces from cfg80211.h ----- //
struct radiotap_align_size {
uint8_t align:4, size:4;
};
struct ieee80211_radiotap_namespace {
const struct radiotap_align_size *align_size;
int n_bits;
uint32_t oui;
uint8_t subns;
};
struct ieee80211_radiotap_vendor_namespaces {
const struct ieee80211_radiotap_namespace *ns;
int n_ns;
};
// -------------------------------------------------------------------//
/* function prototypes and related defs are in include/net/cfg80211.h */
static const struct radiotap_align_size rtap_namespace_sizes[] = {
[IEEE80211_RADIOTAP_TSFT] = { .align = 8, .size = 8, },
[IEEE80211_RADIOTAP_FLAGS] = { .align = 1, .size = 1, },
[IEEE80211_RADIOTAP_RATE] = { .align = 1, .size = 1, },
[IEEE80211_RADIOTAP_CHANNEL] = { .align = 2, .size = 4, },
[IEEE80211_RADIOTAP_FHSS] = { .align = 2, .size = 2, },
[IEEE80211_RADIOTAP_DBM_ANTSIGNAL] = { .align = 1, .size = 1, },
[IEEE80211_RADIOTAP_DBM_ANTNOISE] = { .align = 1, .size = 1, },
[IEEE80211_RADIOTAP_LOCK_QUALITY] = { .align = 2, .size = 2, },
[IEEE80211_RADIOTAP_TX_ATTENUATION] = { .align = 2, .size = 2, },
[IEEE80211_RADIOTAP_DB_TX_ATTENUATION] = { .align = 2, .size = 2, },
[IEEE80211_RADIOTAP_DBM_TX_POWER] = { .align = 1, .size = 1, },
[IEEE80211_RADIOTAP_ANTENNA] = { .align = 1, .size = 1, },
[IEEE80211_RADIOTAP_DB_ANTSIGNAL] = { .align = 1, .size = 1, },
[IEEE80211_RADIOTAP_DB_ANTNOISE] = { .align = 1, .size = 1, },
[IEEE80211_RADIOTAP_RX_FLAGS] = { .align = 2, .size = 2, },
[IEEE80211_RADIOTAP_TX_FLAGS] = { .align = 2, .size = 2, },
[IEEE80211_RADIOTAP_RTS_RETRIES] = { .align = 1, .size = 1, },
[IEEE80211_RADIOTAP_DATA_RETRIES] = { .align = 1, .size = 1, },
[IEEE80211_RADIOTAP_MCS] = { .align = 1, .size = 3, },
[IEEE80211_RADIOTAP_AMPDU_STATUS] = { .align = 4, .size = 8, },
[IEEE80211_RADIOTAP_VHT] = { .align = 2, .size = 12, },
/*
* add more here as they are defined in radiotap.h
*/
};
static const struct ieee80211_radiotap_namespace radiotap_ns = {
.n_bits = ARRAY_SIZE(rtap_namespace_sizes),
.align_size = rtap_namespace_sizes,
};
/**
* ieee80211_radiotap_iterator_init - radiotap parser iterator initialization
* @iterator: radiotap_iterator to initialize
* @radiotap_header: radiotap header to parse
* @max_length: total length we can parse into (eg, whole packet length)
* @vns: vendor namespaces to parse
*
* Returns: 0 or a negative error code if there is a problem.
*
@ -36,36 +130,57 @@
* iterator->max_length after executing ieee80211_radiotap_iterator_init()
* successfully.
*
* Alignment Gotcha:
* You must take care when dereferencing iterator.this_arg
* for multibyte types... the pointer is not aligned. Use
* get_unaligned((type *)iterator.this_arg) to dereference
* iterator.this_arg for type "type" safely on all arches.
*
* Example code:
* See Documentation/networking/radiotap-headers.txt
* See Documentation/networking/radiotap-headers.rst
*/
int ieee80211_radiotap_iterator_init(
struct ieee80211_radiotap_iterator *iterator,
struct ieee80211_radiotap_header *radiotap_header,
int max_length)
struct ieee80211_radiotap_iterator *iterator,
struct ieee80211_radiotap_header *radiotap_header,
int max_length, const struct ieee80211_radiotap_vendor_namespaces *vns)
{
/* check the radiotap header can actually be present */
if (max_length < sizeof(struct ieee80211_radiotap_header))
return -EINVAL;
/* Linux only supports version 0 radiotap format */
if (radiotap_header->it_version)
return -EINVAL;
/* sanity check for allowed length and radiotap length field */
if (max_length < le16_to_cpu(radiotap_header->it_len))
if (max_length < get_unaligned_le16(&radiotap_header->it_len))
return -EINVAL;
iterator->rtheader = radiotap_header;
iterator->max_length = le16_to_cpu(radiotap_header->it_len);
iterator->arg_index = 0;
iterator->bitmap_shifter = le32_to_cpu(radiotap_header->it_present);
iterator->arg = (u8 *)radiotap_header + sizeof(*radiotap_header);
iterator->this_arg = 0;
iterator->_rtheader = radiotap_header;
iterator->_max_length = get_unaligned_le16(&radiotap_header->it_len);
iterator->_arg_index = 0;
// iterator->_bitmap_shifter = get_unaligned_le32(&radiotap_header->it_present);
iterator->_bitmap_shifter = (uint32_t)le32_to_cpu(radiotap_header->it_present);
iterator->_arg = (uint8_t *)radiotap_header + sizeof(*radiotap_header);
iterator->_reset_on_ext = 0;
iterator->_next_bitmap = &radiotap_header->it_present;
iterator->_next_bitmap++;
iterator->_vns = vns;
iterator->current_namespace = &radiotap_ns;
iterator->is_radiotap_ns = 1;
/* find payload start allowing for extended bitmap(s) */
if (unlikely(iterator->bitmap_shifter & (1<<IEEE80211_RADIOTAP_EXT))) {
while (le32_to_cpu(*((u32 *)iterator->arg)) &
(1<<IEEE80211_RADIOTAP_EXT)) {
iterator->arg += sizeof(u32);
if (iterator->_bitmap_shifter & (1<<IEEE80211_RADIOTAP_EXT)) {
if ((unsigned long)iterator->_arg -
(unsigned long)iterator->_rtheader + sizeof(uint32_t) >
(unsigned long)iterator->_max_length)
return -EINVAL;
// while (get_unaligned_le32(iterator->_arg) &
while (le32_to_cpu(*((u32 *)iterator->_arg)) &
(1 << IEEE80211_RADIOTAP_EXT)) {
iterator->_arg += sizeof(uint32_t);
/*
* check for insanity where the present bitmaps
@ -73,12 +188,14 @@ int ieee80211_radiotap_iterator_init(
* stated radiotap header length
*/
if (((ulong)iterator->arg -
(ulong)iterator->rtheader) > iterator->max_length)
if ((unsigned long)iterator->_arg -
(unsigned long)iterator->_rtheader +
sizeof(uint32_t) >
(unsigned long)iterator->_max_length)
return -EINVAL;
}
iterator->arg += sizeof(u32);
iterator->_arg += sizeof(uint32_t);
/*
* no need to check again for blowing past stated radiotap
@ -87,10 +204,35 @@ int ieee80211_radiotap_iterator_init(
*/
}
iterator->this_arg = iterator->_arg;
/* we are all initialized happily */
return 0;
}
// EXPORT_SYMBOL(ieee80211_radiotap_iterator_init);
static void find_ns(struct ieee80211_radiotap_iterator *iterator,
uint32_t oui, uint8_t subns)
{
int i;
iterator->current_namespace = NULL;
if (!iterator->_vns)
return;
for (i = 0; i < iterator->_vns->n_ns; i++) {
if (iterator->_vns->ns[i].oui != oui)
continue;
if (iterator->_vns->ns[i].subns != subns)
continue;
iterator->current_namespace = &iterator->_vns->ns[i];
break;
}
}
/**
@ -107,102 +249,111 @@ int ieee80211_radiotap_iterator_init(
* present fields. @this_arg can be changed by the caller (eg,
* incremented to move inside a compound argument like
* IEEE80211_RADIOTAP_CHANNEL). The args pointed to are in
* little-endian format whatever the endianness of your CPU.
* little-endian format whatever the endianess of your CPU.
*
* Alignment Gotcha:
* You must take care when dereferencing iterator.this_arg
* for multibyte types... the pointer is not aligned. Use
* get_unaligned((type *)iterator.this_arg) to dereference
* iterator.this_arg for type "type" safely on all arches.
*/
int ieee80211_radiotap_iterator_next(
struct ieee80211_radiotap_iterator *iterator)
struct ieee80211_radiotap_iterator *iterator)
{
/*
* small length lookup table for all radiotap types we heard of
* starting from b0 in the bitmap, so we can walk the payload
* area of the radiotap header
*
* There is a requirement to pad args, so that args
* of a given length must begin at a boundary of that length
* -- but note that compound args are allowed (eg, 2 x u16
* for IEEE80211_RADIOTAP_CHANNEL) so total arg length is not
* a reliable indicator of alignment requirement.
*
* upper nybble: content alignment for arg
* lower nybble: content length for arg
*/
static const u8 rt_sizes[] = {
[IEEE80211_RADIOTAP_TSFT] = 0x88,
[IEEE80211_RADIOTAP_FLAGS] = 0x11,
[IEEE80211_RADIOTAP_RATE] = 0x11,
[IEEE80211_RADIOTAP_CHANNEL] = 0x24,
[IEEE80211_RADIOTAP_FHSS] = 0x22,
[IEEE80211_RADIOTAP_DBM_ANTSIGNAL] = 0x11,
[IEEE80211_RADIOTAP_DBM_ANTNOISE] = 0x11,
[IEEE80211_RADIOTAP_LOCK_QUALITY] = 0x22,
[IEEE80211_RADIOTAP_TX_ATTENUATION] = 0x22,
[IEEE80211_RADIOTAP_DB_TX_ATTENUATION] = 0x22,
[IEEE80211_RADIOTAP_DBM_TX_POWER] = 0x11,
[IEEE80211_RADIOTAP_ANTENNA] = 0x11,
[IEEE80211_RADIOTAP_DB_ANTSIGNAL] = 0x11,
[IEEE80211_RADIOTAP_DB_ANTNOISE] = 0x11,
[IEEE80211_RADIOTAP_RX_FLAGS] = 0x22,
[IEEE80211_RADIOTAP_TX_FLAGS] = 0x22,
[IEEE80211_RADIOTAP_RTS_RETRIES] = 0x11,
[IEEE80211_RADIOTAP_DATA_RETRIES] = 0x11,
[IEEE80211_RADIOTAP_MCS] = 0x13,
[IEEE80211_RADIOTAP_AMPDU_STATUS] = 0x48
/*
* add more here as they are defined in
* include/net/ieee80211_radiotap.h
*/
};
/*
* for every radiotap entry we can at
* least skip (by knowing the length)...
*/
while (iterator->arg_index < sizeof(rt_sizes)) {
while (1) {
int hit = 0;
int pad;
int pad, align, size, subns;
uint32_t oui;
if (!(iterator->bitmap_shifter & 1))
/* if no more EXT bits, that's it */
if ((iterator->_arg_index % 32) == IEEE80211_RADIOTAP_EXT &&
!(iterator->_bitmap_shifter & 1))
return -ENOENT;
if (!(iterator->_bitmap_shifter & 1))
goto next_entry; /* arg not present */
/* get alignment/size of data */
switch (iterator->_arg_index % 32) {
case IEEE80211_RADIOTAP_RADIOTAP_NAMESPACE:
case IEEE80211_RADIOTAP_EXT:
align = 1;
size = 0;
break;
case IEEE80211_RADIOTAP_VENDOR_NAMESPACE:
align = 2;
size = 6;
break;
default:
if (!iterator->current_namespace ||
iterator->_arg_index >= iterator->current_namespace->n_bits) {
if (iterator->current_namespace == &radiotap_ns)
return -ENOENT;
align = 0;
} else {
align = iterator->current_namespace->align_size[iterator->_arg_index].align;
size = iterator->current_namespace->align_size[iterator->_arg_index].size;
}
if (!align) {
/* skip all subsequent data */
iterator->_arg = iterator->_next_ns_data;
/* give up on this namespace */
iterator->current_namespace = NULL;
goto next_entry;
}
break;
}
/*
* arg is present, account for alignment padding
* 8-bit args can be at any alignment
* 16-bit args must start on 16-bit boundary
* 32-bit args must start on 32-bit boundary
* 64-bit args must start on 64-bit boundary
*
* note that total arg size can differ from alignment of
* elements inside arg, so we use upper nybble of length
* table to base alignment on
*
* also note: these alignments are ** relative to the
* start of the radiotap header **. There is no guarantee
* Note that these alignments are relative to the start
* of the radiotap header. There is no guarantee
* that the radiotap header itself is aligned on any
* kind of boundary.
*
* The above is why get_unaligned() is used to dereference
* multibyte elements from the radiotap area.
*/
pad = (((ulong)iterator->arg) -
((ulong)iterator->rtheader)) &
((rt_sizes[iterator->arg_index] >> 4) - 1);
pad = ((unsigned long)iterator->_arg -
(unsigned long)iterator->_rtheader) & (align - 1);
if (pad)
iterator->arg +=
(rt_sizes[iterator->arg_index] >> 4) - pad;
iterator->_arg += align - pad;
if (iterator->_arg_index % 32 == IEEE80211_RADIOTAP_VENDOR_NAMESPACE) {
int vnslen;
if ((unsigned long)iterator->_arg + size -
(unsigned long)iterator->_rtheader >
(unsigned long)iterator->_max_length)
return -EINVAL;
oui = (*iterator->_arg << 16) |
(*(iterator->_arg + 1) << 8) |
*(iterator->_arg + 2);
subns = *(iterator->_arg + 3);
find_ns(iterator, oui, subns);
vnslen = get_unaligned_le16(iterator->_arg + 4);
iterator->_next_ns_data = iterator->_arg + size + vnslen;
if (!iterator->current_namespace)
size += vnslen;
}
/*
* this is what we will return to user, but we need to
* move on first so next call has something fresh to test
*/
iterator->this_arg_index = iterator->arg_index;
iterator->this_arg = iterator->arg;
hit = 1;
iterator->this_arg_index = iterator->_arg_index;
iterator->this_arg = iterator->_arg;
iterator->this_arg_size = size;
/* internally move on the size of this arg */
iterator->arg += rt_sizes[iterator->arg_index] & 0x0f;
iterator->_arg += size;
/*
* check for insanity where we are given a bitmap that
@ -211,34 +362,59 @@ int ieee80211_radiotap_iterator_next(
* max_length on the last arg, never exceeding it.
*/
if (((ulong)iterator->arg - (ulong)iterator->rtheader) >
iterator->max_length)
if ((unsigned long)iterator->_arg -
(unsigned long)iterator->_rtheader >
(unsigned long)iterator->_max_length)
return -EINVAL;
next_entry:
iterator->arg_index++;
if (unlikely((iterator->arg_index & 31) == 0)) {
/* completed current u32 bitmap */
if (iterator->bitmap_shifter & 1) {
/* b31 was set, there is more */
/* move to next u32 bitmap */
iterator->bitmap_shifter =
le32_to_cpu(*iterator->next_bitmap);
iterator->next_bitmap++;
} else {
/* no more bitmaps: end */
iterator->arg_index = sizeof(rt_sizes);
}
} else { /* just try the next bit */
iterator->bitmap_shifter >>= 1;
/* these special ones are valid in each bitmap word */
switch (iterator->_arg_index % 32) {
case IEEE80211_RADIOTAP_VENDOR_NAMESPACE:
iterator->_reset_on_ext = 1;
iterator->is_radiotap_ns = 0;
/*
* If parser didn't register this vendor
* namespace with us, allow it to show it
* as 'raw. Do do that, set argument index
* to vendor namespace.
*/
iterator->this_arg_index =
IEEE80211_RADIOTAP_VENDOR_NAMESPACE;
if (!iterator->current_namespace)
hit = 1;
goto next_entry;
case IEEE80211_RADIOTAP_RADIOTAP_NAMESPACE:
iterator->_reset_on_ext = 1;
iterator->current_namespace = &radiotap_ns;
iterator->is_radiotap_ns = 1;
goto next_entry;
case IEEE80211_RADIOTAP_EXT:
/*
* bit 31 was set, there is more
* -- move to next u32 bitmap
*/
iterator->_bitmap_shifter =
// get_unaligned_le32(iterator->_next_bitmap);
le32_to_cpu(*iterator->_next_bitmap);
iterator->_next_bitmap++;
if (iterator->_reset_on_ext)
iterator->_arg_index = 0;
else
iterator->_arg_index++;
iterator->_reset_on_ext = 0;
break;
default:
/* we've got a hit! */
hit = 1;
next_entry:
iterator->_bitmap_shifter >>= 1;
iterator->_arg_index++;
}
/* if we found a valid arg earlier, return it now */
if (hit)
return 0;
}
/* we don't know how to handle any more args, we're done */
return -ENOENT;
}
// EXPORT_SYMBOL(ieee80211_radiotap_iterator_next);

70
user_space/inject_80211/radiotap.h
View File

@ -1,38 +1,60 @@
#include "ieee80211_radiotap.h"
/* Radiotap header iteration
* implemented in net/wireless/radiotap.c
* docs in Documentation/networking/radiotap-headers.txt
*/
// -----ieee80211_radiotap_iterator from cfg80211.h ----- //
/**
* struct ieee80211_radiotap_iterator - tracks walk thru present radiotap args
* @rtheader: pointer to the radiotap header we are walking through
* @max_length: length of radiotap header in cpu byte ordering
* @this_arg_index: IEEE80211_RADIOTAP_... index of current arg
* @this_arg: pointer to current radiotap arg
* @arg_index: internal next argument index
* @arg: internal next argument pointer
* @next_bitmap: internal pointer to next present u32
* @bitmap_shifter: internal shifter for curr u32 bitmap, b0 set == arg present
* @this_arg_index: index of current arg, valid after each successful call
* to ieee80211_radiotap_iterator_next()
* @this_arg: pointer to current radiotap arg; it is valid after each
* call to ieee80211_radiotap_iterator_next() but also after
* ieee80211_radiotap_iterator_init() where it will point to
* the beginning of the actual data portion
* @this_arg_size: length of the current arg, for convenience
* @current_namespace: pointer to the current namespace definition
* (or internally %NULL if the current namespace is unknown)
* @is_radiotap_ns: indicates whether the current namespace is the default
* radiotap namespace or not
*
* @_rtheader: pointer to the radiotap header we are walking through
* @_max_length: length of radiotap header in cpu byte ordering
* @_arg_index: next argument index
* @_arg: next argument pointer
* @_next_bitmap: internal pointer to next present u32
* @_bitmap_shifter: internal shifter for curr u32 bitmap, b0 set == arg present
* @_vns: vendor namespace definitions
* @_next_ns_data: beginning of the next namespace's data
* @_reset_on_ext: internal; reset the arg index to 0 when going to the
* next bitmap word
*
* Describes the radiotap parser state. Fields prefixed with an underscore
* must not be used by users of the parser, only by the parser internally.
*/
struct ieee80211_radiotap_iterator {
struct ieee80211_radiotap_header *rtheader;
int max_length;
int this_arg_index;
u8 *this_arg;
struct ieee80211_radiotap_header *_rtheader;
const struct ieee80211_radiotap_vendor_namespaces *_vns;
const struct ieee80211_radiotap_namespace *current_namespace;
int arg_index;
u8 *arg;
__le32 *next_bitmap;
u32 bitmap_shifter;
unsigned char *_arg, *_next_ns_data;
__le32 *_next_bitmap;
unsigned char *this_arg;
int this_arg_index;
int this_arg_size;
int is_radiotap_ns;
int _max_length;
int _arg_index;
uint32_t _bitmap_shifter;
int _reset_on_ext;
};
extern int ieee80211_radiotap_iterator_init(
struct ieee80211_radiotap_iterator *iterator,
struct ieee80211_radiotap_header *radiotap_header,
int max_length);
struct ieee80211_radiotap_iterator *iterator,
struct ieee80211_radiotap_header *radiotap_header,
int max_length, const struct ieee80211_radiotap_vendor_namespaces *vns);
extern int ieee80211_radiotap_iterator_next(
struct ieee80211_radiotap_iterator *iterator);
struct ieee80211_radiotap_iterator *iterator);

106
user_space/inject_80211/unaligned.h Normal file
View File

@ -0,0 +1,106 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Port on Texas Instruments TMS320C6x architecture
*
* Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated
* Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com)
* Rewritten for 2.6.3x: Mark Salter <msalter@redhat.com>
*/
#ifndef _ASM_C6X_UNALIGNED_H
#define _ASM_C6X_UNALIGNED_H
// #include <linux/swab.h>
// #include <linux/unaligned/generic.h>
#include "inject_80211.h"
/*
* The C64x+ can do unaligned word and dword accesses in hardware
* using special load/store instructions.
*/
static inline u16 get_unaligned_le16(const void *p)
{
const u8 *_p = p;
return _p[0] | _p[1] << 8;
}
static inline u16 get_unaligned_be16(const void *p)
{
const u8 *_p = p;
return _p[0] << 8 | _p[1];
}
static inline void put_unaligned_le16(u16 val, void *p)
{
u8 *_p = p;
_p[0] = val;
_p[1] = val >> 8;
}
static inline void put_unaligned_be16(u16 val, void *p)
{
u8 *_p = p;
_p[0] = val >> 8;
_p[1] = val;
}
// static inline u32 get_unaligned32(const void *p)
// {
// u32 val = (u32) p;
// asm (" ldnw .d1t1 *%0,%0\n"
// " nop 4\n"
// : "+a"(val));
// return val;
// }
// static inline void put_unaligned32(u32 val, void *p)
// {
// asm volatile (" stnw .d2t1 %0,*%1\n"
// : : "a"(val), "b"(p) : "memory");
// }
// static inline u64 get_unaligned64(const void *p)
// {
// u64 val;
// asm volatile (" ldndw .d1t1 *%1,%0\n"
// " nop 4\n"
// : "=a"(val) : "a"(p));
// return val;
// }
// static inline void put_unaligned64(u64 val, const void *p)
// {
// asm volatile (" stndw .d2t1 %0,*%1\n"
// : : "a"(val), "b"(p) : "memory");
// }
#ifdef CONFIG_CPU_BIG_ENDIAN
#define get_unaligned_le32(p) __swab32(get_unaligned32(p))
#define get_unaligned_le64(p) __swab64(get_unaligned64(p))
#define get_unaligned_be32(p) get_unaligned32(p)
#define get_unaligned_be64(p) get_unaligned64(p)
#define put_unaligned_le32(v, p) put_unaligned32(__swab32(v), (p))
#define put_unaligned_le64(v, p) put_unaligned64(__swab64(v), (p))
#define put_unaligned_be32(v, p) put_unaligned32((v), (p))
#define put_unaligned_be64(v, p) put_unaligned64((v), (p))
#define get_unaligned __get_unaligned_be
#define put_unaligned __put_unaligned_be
#else
#define get_unaligned_le32(p) get_unaligned32(p)
#define get_unaligned_le64(p) get_unaligned64(p)
#define get_unaligned_be32(p) __swab32(get_unaligned32(p))
#define get_unaligned_be64(p) __swab64(get_unaligned64(p))
#define put_unaligned_le32(v, p) put_unaligned32((v), (p))
#define put_unaligned_le64(v, p) put_unaligned64((v), (p))
#define put_unaligned_be32(v, p) put_unaligned32(__swab32(v), (p))
#define put_unaligned_be64(v, p) put_unaligned64(__swab64(v), (p))
#define get_unaligned __get_unaligned_le
#define put_unaligned __put_unaligned_le
#endif
#endif /* _ASM_C6X_UNALIGNED_H */

27
user_space/openwifi_ad9361_fir_tx_0MHz_11n.ftr
View File

@ -1,18 +1,17 @@
# Generated with AD9361 Filter Design Wizard 16.1.3-g924f0cd
# Generated with AD9361 Filter Design Wizard 16.1.3
# MATLAB 9.10.0.1602886 (R2021a), 18-Nov-2021 11:34:55
# Inputs:
# Data Sample Frequency = 40000000 Hz
# Filter = 2
# Phase Equalization = 0
# Use AD936x FIR = 1
# Fpass = 8.750000e+00
# Fstop = 1.125000e+01
# Apass = 5.000000e-01
# Astop = 80
# Param = 0.000000
# PLL rate = 1280
# Converter = 320
# Data rate = 40
# Rx setting:
# Data Rate 40, Clock (MHz) ADC 320 DAC 320 1x
# PLL Div 4x, PLL (MHz) 1280
# Units: dB. Apass 0.5, Astop 80, Astop (FIR) 0
# Units: MHz. Fpass 8.75, Fstop 11.25, Fcutoff (Analog) 15.6896, RF Bandwidth 22.4138
# AD936x Decimation Rates. Use Internal FIR. FIR 1X 40, HB1 2X 80, HB2 2X 160, HB3 2X 320
# Tx setting:
# Data Rate 40, Clock (MHz) ADC 320 DAC 320 1x
# PLL Div 4x, PLL (MHz) 1280
# Units: dB. Apass 0.5, Astop 80, Astop (FIR) 0
# Units: MHz. Fpass 8.75, Fstop 11.25, Fcutoff (Analog) 17.6508, RF Bandwidth 22.0636
# AD936x Interpolation Rates. Use Internal FIR. FIR 1X 40, HB1 2X 80, HB2 2X 160, HB3 2X 320
TX 3 GAIN -6 INT 1
RX 3 GAIN -6 DEC 1
RTX 1280000000 320000000 160000000 80000000 40000000 40000000

68
user_space/openwifi_ad9361_fir_tx_0MHz_11n_narrow1.ftr Normal file
View File

@ -0,0 +1,68 @@
# Generated with AD9361 Filter Design Wizard 16.1.3
# MATLAB 9.10.0.1602886 (R2021a), 31-Oct-2022 15:56:07
# Rx setting:
# Data Rate 40, Clock (MHz) ADC 320 DAC 320 1x
# PLL Div 4x, PLL (MHz) 1280
# Units: dB. Apass 0.5, Astop 120, Astop (FIR) 0
# Units: MHz. Fpass 8.75, Fstop 12.1, Fcutoff (Analog) 15.6896, RF Bandwidth 22.4138
# AD936x Decimation Rates. Use Internal FIR. FIR 1X 40, HB1 2X 80, HB2 2X 160, HB3 2X 320
# Tx setting:
# Data Rate 40, Clock (MHz) ADC 320 DAC 320 1x
# PLL Div 4x, PLL (MHz) 1280
# Units: dB. Apass 0.5, Astop 80, Astop (FIR) 0
# Units: MHz. Fpass 8.75, Fstop 11.25, Fcutoff (Analog) 17.6508, RF Bandwidth 22.0636
# AD936x Interpolation Rates. Use Internal FIR. FIR 1X 40, HB1 2X 80, HB2 2X 160, HB3 2X 320
TX 3 GAIN -6 INT 1
RX 3 GAIN -6 DEC 1
RTX 1280000000 320000000 160000000 80000000 40000000 40000000
RRX 1280000000 320000000 160000000 80000000 40000000 40000000
BWTX 25215414
BWRX 25215513
41,-12
31,-90
-187,-279
-496,-446
-395,-280
183,212
412,395
-201,-140
-619,-571
148,58
886,827
-38,87
-1232,-1169
-166,-334
1680,1622
513,740
-2284,-2242
-1107,-1417
3197,3181
2238,2687
-4904,-4913
-5068,-5819
10562,10346
28812,29882
28812,29882
10562,10346
-5068,-5819
-4904,-4913
2238,2687
3197,3181
-1107,-1417
-2284,-2242
513,740
1680,1622
-166,-334
-1232,-1169
-38,87
886,827
148,58
-619,-571
-201,-140
412,395
183,212
-395,-280
-496,-446
-187,-279
31,-90
41,-12

50
user_space/populate_kernel_image_module_reboot.sh Executable file
View File

@ -0,0 +1,50 @@
#!/bin/bash
# Author: Xianjun Jiao
# SPDX-FileCopyrightText: 2019 UGent
# SPDX-License-Identifier: AGPL-3.0-or-later
set -ex
MACHINE_TYPE=`uname -m`
mkdir -p kernel_modules
rm -rf kernel_modules/*
tar -zxvf kernel_modules.tar.gz
if [ ${MACHINE_TYPE} == 'aarch64' ]; then
IMAGE_FILENAME=Image
DTB_FILENAME="system.dtb"
else
IMAGE_FILENAME=uImage
DTB_FILENAME="devicetree.dtb"
fi
mv ./kernel_modules/ad9361_drv.ko ./openwifi/ -f || true
mv ./kernel_modules/adi_axi_hdmi.ko ./openwifi/ -f || true
mv ./kernel_modules/axidmatest.ko ./openwifi/ -f || true
mv ./kernel_modules/lcd.ko ./openwifi/ -f || true
mv ./kernel_modules/xilinx_dma.ko ./openwifi/ -f || true
rm -rf /lib/modules/$(uname -r)
ln -s /root/kernel_modules /lib/modules/$(uname -r)
depmod
umount /mnt || /bin/true
mount /dev/mmcblk0p1 /mnt
if test -f "./kernel_modules/$IMAGE_FILENAME"; then
cp ./kernel_modules/$IMAGE_FILENAME /mnt/
fi
if test -f "./kernel_modules/BOOT.BIN"; then
cp ./kernel_modules/BOOT.BIN /mnt/
fi
if test -f "./kernel_modules/$DTB_FILENAME"; then
cp ./kernel_modules/$DTB_FILENAME /mnt/
fi
cd /mnt/
sync
cd ~
umount /mnt
reboot now

3
user_space/post_config.sh
View File

@ -30,6 +30,8 @@ fi
# add gateway (PC) for internet access
route add default gw 192.168.10.1 || true
sudo apt update
chmod +x *.sh
# build sdrctl
@ -53,6 +55,7 @@ sudo apt-get -y install nano
sudo apt-get -y install tcpdump
sudo apt-get -y install webfs
sudo apt-get -y install iperf
sudo apt-get -y install iperf3
sudo apt-get -y install libpcap-dev
sudo apt-get -y install bridge-utils

59
user_space/prepare_kernel.sh
View File

@ -5,8 +5,18 @@
# SPDX-FileCopyrightText: 2019 UGent
# SPDX-License-Identifier: AGPL-3.0-or-later
if [ "$#" -lt 2 ]; then
echo "You must enter at least 2 arguments: \$XILINX_DIR ARCH_BIT(32 or 64)"
# ATTENTION! You need Vitis, NOT Vitis_HLS, installed
# if [ "$#" -ne 1 ]; then
# echo "You must enter 1 arguments: ARCH_BIT(32 or 64)"
# exit 1
# fi
# OPENWIFI_DIR=$(pwd)/../
# ARCH_OPTION=$1
if [ "$#" -ne 2 ]; then
echo "You must enter 2 arguments: \$XILINX_DIR ARCH_BIT(32 or 64)"
exit 1
fi
@ -21,7 +31,7 @@ else
exit 1
fi
if [ -d "$XILINX_DIR/SDK" ]; then
if [ -d "$XILINX_DIR/Vitis" ]; then
echo "\$XILINX_DIR is found!"
else
echo "\$XILINX_DIR is not correct. Please check!"
@ -55,29 +65,38 @@ set -x
cd $OPENWIFI_DIR/
git submodule init $LINUX_KERNEL_SRC_DIR_NAME
cd $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME
git reset --hard
cd $OPENWIFI_DIR/
git submodule update $LINUX_KERNEL_SRC_DIR_NAME
cd $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME
git checkout 2019_R1
git pull origin 2019_R1
git reset --hard
# git reset --hard 4e81f0927cfb2fada92fc762dbd65d002848405a
cp $LINUX_KERNEL_CONFIG_FILE ./.config
cp $OPENWIFI_DIR/driver/ad9361/ad9361.c $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/drivers/iio/adc/ad9361.c -rf
cp $OPENWIFI_DIR/driver/ad9361/ad9361_conv.c $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/drivers/iio/adc/ad9361_conv.c -rf
git fetch
git checkout 2021_r1
git pull origin 2021_r1
git reset --hard 2021_r1
source $XILINX_DIR/SDK/2018.3/settings64.sh
export ARCH=$ARCH_NAME
export CROSS_COMPILE=$CROSS_COMPILE_NAME
source $XILINX_DIR/Vitis/2021.1/settings64.sh
make oldconfig && make prepare && make modules_prepare
# if [ "$ARCH_OPTION" == "64" ]; then
cp $LINUX_KERNEL_CONFIG_FILE ./.config
# cp $OPENWIFI_DIR/driver/ad9361/ad9361.c $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/drivers/iio/adc/ad9361.c -rf
# cp $OPENWIFI_DIR/driver/ad9361/ad9361_conv.c $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/drivers/iio/adc/ad9361_conv.c -rf
git apply ../kernel_boot/axi_hdmi_crtc.patch
git apply ../kernel_boot/ad9361.patch
git apply ../kernel_boot/ad9361_conv.patch
# else
# make zynq_xcomm_adv7511_defconfig
# fi
if [ "$#" -gt 2 ]; then
# if [ -f "$OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME/arch/$ARCH_NAME/boot/$IMAGE_TYPE" ]; then
# echo "Kernel found! Skip the time costly Linux kernel compiling."
# else
make -j12 $IMAGE_TYPE UIMAGE_LOADADDR=0x8000
make modules
# fi
fi
make oldconfig
# make adi_zynqmp_defconfig
make prepare && make modules_prepare
# if [ "$#" -gt 2 ]; then
make -j12 $IMAGE_TYPE UIMAGE_LOADADDR=0x8000
make modules
# fi
cd $home_dir

45
user_space/rssi_ad9361_show.sh Executable file
View File

@ -0,0 +1,45 @@
#!/bin/bash
# Reads RSSI in dB from RX1, let's call it "r".
# Linear fit offset "o" depends on frequency (2.4GHz or 5GHz and FMCOMMS2/3).
# RSSI(dBm) = -r + o
# 2.4GHz(ch 6) FMCOMMS2: o = 16.74
# 2.4GHz(ch 6) FMCOMMS3: o = 17.44
# 5GHz (ch 44) FMCOMMS2: o = 25.41
# 5GHz (ch 44) FMCOMMS3: o = 24.58
home_dir=$(pwd)
#set -x
if test -f "/sys/bus/iio/devices/iio:device0/in_voltage0_rssi"; then
cd /sys/bus/iio/devices/iio:device0/
else if test -f "/sys/bus/iio/devices/iio:device1/in_voltage0_rssi"; then
cd /sys/bus/iio/devices/iio:device1/
else if test -f "/sys/bus/iio/devices/iio:device2/in_voltage0_rssi"; then
cd /sys/bus/iio/devices/iio:device2/
else if test -f "/sys/bus/iio/devices/iio:device3/in_voltage0_rssi"; then
cd /sys/bus/iio/devices/iio:device3/
else if test -f "/sys/bus/iio/devices/iio:device4/in_voltage0_rssi"; then
cd /sys/bus/iio/devices/iio:device4/
else
echo "Can not find in_voltage_rf_bandwidth!"
echo "Check log to make sure ad9361 driver is loaded!"
exit 1
fi
fi
fi
fi
fi
#set +x
if [ $# -lt 1 ]; then
cat in_voltage0_rssi
else
num_read=$1
for ((i=0;i<$num_read;i++))
do
rssi_str=$(cat in_voltage0_rssi)
echo "${rssi_str//dB}"
done
fi
cd $home_dir

18
user_space/rssi_openwifi_show.sh Executable file
View File

@ -0,0 +1,18 @@
#!/bin/bash
rssi_raw=$(./sdrctl dev sdr0 get reg xpu 57)
echo $rssi_raw
rssi_raw=${rssi_raw: -8}
echo $rssi_raw
rssi_raw_dec=$(( 16#$rssi_raw ))
echo $rssi_raw_dec
#rssi_half_db=$(expr (16#$rss_raw) \& 2047)
#rssi_half_db=$(($rssi_raw_dec & 2047))
#rssi_half_db=$(($rssi_raw_dec & 16#7ff))
#the low 11 bits are rssi_half_db
rssi_half_db=$((16#$rssi_raw & 16#7ff))
echo $rssi_half_db

4
user_space/sdcard_boot_update.sh
View File

@ -6,12 +6,12 @@
if [ "$#" -ne 1 ]; then
echo "You must enter the \$BOARD_NAME as argument"
echo "Like: sdrpi antsdr antsdr_e200 adrv9364z7020 adrv9361z7035 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 zcu102_fmcs2 zcu102_9371"
echo "Like: sdrpi antsdr antsdr_e200 adrv9364z7020 adrv9361z7035 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 zcu102_fmcs2 zcu102_9371 neptunesdr"
exit 1
fi
BOARD_NAME=$1
if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
if [ "$BOARD_NAME" != "neptunesdr" ] && [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
echo "\$BOARD_NAME is not correct. Please check!"
exit 1
else

3
user_space/set_lbt_th.sh
View File

@ -13,5 +13,6 @@ if [ $lbt_th -ne 987654321 ]; then
fi
# show
./sdrctl dev sdr0 get reg xpu 8
# ./sdrctl dev sdr0 get reg xpu 8
./sdrctl dev sdr0 get reg drv_xpu 0
set +x

82
user_space/setup_once.sh Executable file
View File

@ -0,0 +1,82 @@
#!/bin/bash
# Author: Xianjun Jiao
# SPDX-FileCopyrightText: 2023 UGent
# SPDX-License-Identifier: AGPL-3.0-or-later
set -ex
cd /root/
MACHINE_TYPE=`uname -m`
rm -rf kernel_modules
mkdir -p kernel_modules
# mkdir -p /lib/modules/$(uname -r)
# rm -rf /lib/modules/$(uname -r)
if [ ${MACHINE_TYPE} == 'aarch64' ]; then
cp /root/kernel_modules64/* /root/kernel_modules/
cp /root/openwifi64/* /root/openwifi/
# cp ./kernel_modules64/* /lib/modules/$(uname -r)/
else
cp /root/kernel_modules32/* /root/kernel_modules/
cp /root/openwifi32/* /root/openwifi/
# cp ./kernel_modules32/* /lib/modules/$(uname -r)/
fi
# Decide board name
DEVICE_TREE_MODEL_STRING=$(cat /proc/device-tree/model)
if [[ $DEVICE_TREE_MODEL_STRING == *"ADRV9361-Z7035"* ]]; then
BOARD_NAME=adrv9361z7035
elif [[ $DEVICE_TREE_MODEL_STRING == *"ADRV9364-Z7020"* ]]; then
BOARD_NAME=adrv9364z7020
elif [[ $DEVICE_TREE_MODEL_STRING == *"ANTSDR-E310"* ]]; then
BOARD_NAME=antsdr
elif [[ $DEVICE_TREE_MODEL_STRING == *"ANTSDR-E200"* ]]; then
BOARD_NAME=antsdr_e200
elif [[ $DEVICE_TREE_MODEL_STRING == *"neptunesdr"* ]]; then
BOARD_NAME=neptunesdr
elif [[ $DEVICE_TREE_MODEL_STRING == *"sdrpi"* ]]; then
BOARD_NAME=sdrpi
elif [[ $DEVICE_TREE_MODEL_STRING == *"ZC702"* ]]; then
BOARD_NAME=zc702_fmcs2
elif [[ $DEVICE_TREE_MODEL_STRING == *"ZC706"* ]]; then
BOARD_NAME=zc706_fmcs2
elif [[ $DEVICE_TREE_MODEL_STRING == *"ZCU102"* ]]; then
BOARD_NAME=zcu102_fmcs2
elif [[ $DEVICE_TREE_MODEL_STRING == *"ZED"* ]]; then
BOARD_NAME=zed_fmcs2
else
echo $DEVICE_TREE_MODEL_STRING " NOT recognized!"
exit 1
fi
mv /root/kernel_modules/ad9361_drv.ko /root/openwifi/ -f || true
mv /root/kernel_modules/adi_axi_hdmi.ko /root/openwifi/ -f || true
mv /root/kernel_modules/axidmatest.ko /root/openwifi/ -f || true
mv /root/kernel_modules/lcd.ko /root/openwifi/ -f || true
mv /root/kernel_modules/xilinx_dma.ko /root/openwifi/ -f || true
rm -rf /lib/modules/$(uname -r)
ln -s /root/kernel_modules /lib/modules/$(uname -r)
sync
depmod
echo $BOARD_NAME
cp /root/openwifi_BOOT/$BOARD_NAME/system_top.bit.bin /root/openwifi/ -f || true
cd /root/openwifi/sdrctl_src
make clean
make
cp sdrctl /root/openwifi/
cd /root/openwifi/side_ch_ctl_src/
gcc -o side_ch_ctl side_ch_ctl.c
cp side_ch_ctl /root/openwifi/
cd /root/openwifi/inject_80211/
make clean
make
cd ..
sync
# reboot now

37
user_space/transfer_driver_userspace_to_board.sh Executable file
View File

@ -0,0 +1,37 @@
#!/bin/bash
# Author: Xianjun Jiao
# SPDX-FileCopyrightText: 2019 UGent
# SPDX-License-Identifier: AGPL-3.0-or-later
# Setup Eth connection before this script!
# Host: 192.168.10.1
# Board: 192.168.10.122
# Commands onboard to setup:
# ifconfig eth0 192.168.10.122 netmask 255.255.255.0
# ifconfig eth0 up
# route add default gw 192.168.10.1
# if [ "$#" -ne 2 ]; then
# echo "You have input $# arguments."
# echo "You must enter \$DIR_TO_ADI_LINUX_KERNEL and ARCH_BIT(32 or 64) as argument"
# exit 1
# fi
# DIR_TO_ADI_LINUX_KERNEL=$1
# ARCH_OPTION=$2
# if [ "$ARCH_OPTION" == "64" ]; then
# LINUX_KERNEL_IMAGE=$DIR_TO_ADI_LINUX_KERNEL/arch/arm64/boot/Image
# else
# LINUX_KERNEL_IMAGE=$DIR_TO_ADI_LINUX_KERNEL/arch/arm/boot/uImage
# fi
mkdir -p openwifi
rm -rf ./openwifi/*
find ../driver/ -name \*.ko -exec cp {} ./openwifi/ \;
tar -zcvf openwifi.tar.gz openwifi
scp openwifi.tar.gz root@192.168.10.122:

65
user_space/transfer_kernel_image_module_to_board.sh Executable file
View File

@ -0,0 +1,65 @@
#!/bin/bash
# Author: Xianjun Jiao
# SPDX-FileCopyrightText: 2019 UGent
# SPDX-License-Identifier: AGPL-3.0-or-later
# Setup Eth connection before this script!
# Host: 192.168.10.1
# Board: 192.168.10.122
# Commands onboard to setup:
# ifconfig eth0 192.168.10.122 netmask 255.255.255.0
# ifconfig eth0 up
# route add default gw 192.168.10.1
if [ "$#" -ne 2 ]; then
echo "You have input $# arguments."
echo "You must enter \$DIR_TO_ADI_LINUX_KERNEL and \$BOARD_NAME as argument"
exit 1
fi
DIR_TO_ADI_LINUX_KERNEL=$1
BOARD_NAME=$2
if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "neptunesdr" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ]; then
echo "\$BOARD_NAME is not correct. Please check!"
exit 1
else
echo "\$BOARD_NAME is found!"
fi
if [ "$BOARD_NAME" == "zcu102_fmcs2" ] || [ "$BOARD_NAME" == "zcu102_9371" ]; then
LINUX_KERNEL_IMAGE=$DIR_TO_ADI_LINUX_KERNEL/arch/arm64/boot/Image
DTB_FILENAME="system.dtb"
else
LINUX_KERNEL_IMAGE=$DIR_TO_ADI_LINUX_KERNEL/arch/arm/boot/uImage
DTB_FILENAME="devicetree.dtb"
fi
mkdir -p kernel_modules
rm -rf ./kernel_modules/*
find $DIR_TO_ADI_LINUX_KERNEL/ -name \*.ko -exec cp {} ./kernel_modules/ \;
cp $DIR_TO_ADI_LINUX_KERNEL/Module.symvers ./kernel_modules/
cp $DIR_TO_ADI_LINUX_KERNEL/modules.builtin ./kernel_modules/
cp $DIR_TO_ADI_LINUX_KERNEL/modules.builtin.modinfo ./kernel_modules/
cp $DIR_TO_ADI_LINUX_KERNEL/modules.order ./kernel_modules/
if test -f "$LINUX_KERNEL_IMAGE"; then
cp $LINUX_KERNEL_IMAGE ./kernel_modules/
fi
if test -f "../kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN"; then
cp ../kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN ./kernel_modules/
fi
if test -f "../kernel_boot/boards/$BOARD_NAME/$DTB_FILENAME"; then
cp ../kernel_boot/boards/$BOARD_NAME/$DTB_FILENAME ./kernel_modules/
fi
tar -zcvf kernel_modules.tar.gz kernel_modules
scp kernel_modules.tar.gz root@192.168.10.122:
# scp $LINUX_KERNEL_IMAGE root@192.168.10.122:
scp populate_kernel_image_module_reboot.sh root@192.168.10.122:

244
user_space/update_sdcard.sh
View File

@ -5,21 +5,41 @@
# SPDX-FileCopyrightText: 2019 UGent
# SPDX-License-Identifier: AGPL-3.0-or-later
if [ "$#" -ne 4 ]; then
# Only put BOOT partition (BOOT.BIN devicetree kernel) and kernel modules drivers on the SD card, but not populate them
if [ "$#" -lt 3 ]; then
echo "You have input $# arguments."
echo "You must enter exactly 4 arguments: \$OPENWIFI_HW_DIR \$XILINX_DIR \$BOARD_NAME \$SDCARD_DIR"
echo "You must enter exactly 3 arguments: \$OPENWIFI_HW_IMG_DIR \$XILINX_DIR \$SDCARD_DIR"
exit 1
fi
OPENWIFI_HW_DIR=$1
SKIP_KERNEL_BUILD=0
SKIP_BOOT=0
SKIP_rootfs=0
if [ "$#" -gt 3 ]; then
SKIP_KERNEL_BUILD=$(( ($4 >> 0) & 1 ))
SKIP_BOOT=$(( ($4 >> 1) & 1 ))
SKIP_rootfs=$(( ($4 >> 2) & 1 ))
echo $4
echo SKIP_KERNEL_BUILD $SKIP_KERNEL_BUILD
echo SKIP_BOOT $SKIP_BOOT
echo SKIP_rootfs $SKIP_rootfs
fi
BOARD_NAME_ALL="sdrpi antsdr antsdr_e200 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 adrv9361z7035 adrv9364z7020 zcu102_fmcs2 neptunesdr"
if [ "$#" -gt 4 ]; then
BOARD_NAME_ALL=$5
echo BOARD_NAME_ALL $BOARD_NAME_ALL
fi
OPENWIFI_HW_IMG_DIR=$1
XILINX_DIR=$2
BOARD_NAME=$3
SDCARD_DIR=$4
SDCARD_DIR=$3
OPENWIFI_DIR=$(pwd)/../
echo OPENWIFI_DIR $OPENWIFI_DIR
echo OPENWIFI_HW_DIR $OPENWIFI_HW_DIR
echo OPENWIFI_HW_IMG_DIR $OPENWIFI_HW_IMG_DIR
if [ -f "$OPENWIFI_DIR/LICENSE" ]; then
echo "\$OPENWIFI_DIR is found!"
@ -28,32 +48,27 @@ else
exit 1
fi
if [ -d "$XILINX_DIR/SDK" ]; then
if [ -d "$XILINX_DIR/Vitis" ]; then
echo "\$XILINX_DIR is found!"
else
echo "\$XILINX_DIR is not correct. Please check!"
exit 1
fi
if [ "$BOARD_NAME" != "antsdr" ] && [ "$BOARD_NAME" != "antsdr_e200" ] && [ "$BOARD_NAME" != "sdrpi" ] && [ "$BOARD_NAME" != "zc706_fmcs2" ] && [ "$BOARD_NAME" != "zc702_fmcs2" ] && [ "$BOARD_NAME" != "zed_fmcs2" ] && [ "$BOARD_NAME" != "adrv9361z7035" ] && [ "$BOARD_NAME" != "adrv9364z7020" ] && [ "$BOARD_NAME" != "zcu102_fmcs2" ] && [ "$BOARD_NAME" != "zcu102_9371" ]; then
echo "\$BOARD_NAME is not correct. Please check!"
exit 1
if [ -d "$OPENWIFI_HW_IMG_DIR/boards/" ]; then
echo "\$OPENWIFI_HW_IMG_DIR is found!"
else
echo "\$BOARD_NAME is found!"
fi
if [ -d "$OPENWIFI_HW_DIR/boards/$BOARD_NAME" ]; then
echo "\$OPENWIFI_HW_DIR is found!"
else
echo "\$OPENWIFI_HW_DIR is not correct. Please check!"
echo "\$OPENWIFI_HW_IMG_DIR is not correct. Please check!"
exit 1
fi
# detect SD card mounting status
if [ -d "$SDCARD_DIR/BOOT/" ]; then
echo "$SDCARD_DIR/BOOT/"
sudo mkdir $SDCARD_DIR/BOOT/openwifi
sudo rm -rf $SDCARD_DIR/BOOT/README.txt
sudo rm -f $SDCARD_DIR/BOOT/README.txt
# to save some space
sudo rm -rf $SDCARD_DIR/BOOT/socfpga_*
sudo rm -rf $SDCARD_DIR/BOOT/versal-*
else
echo "$SDCARD_DIR/BOOT/ does not exist!"
exit 1
@ -66,16 +81,6 @@ else
exit 1
fi
if [ "$BOARD_NAME" == "zcu102_fmcs2" ] || [ "$BOARD_NAME" == "zcu102_9371" ]; then
dtb_filename="system.dtb"
dts_filename="system.dts"
else
dtb_filename="devicetree.dtb"
dts_filename="devicetree.dts"
fi
echo $dtb_filename
echo $dts_filename
sudo true
home_dir=$(pwd)
@ -85,109 +90,102 @@ set -x
LINUX_KERNEL_SRC_DIR_NAME32=adi-linux
LINUX_KERNEL_SRC_DIR_NAME64=adi-linux-64
cd $OPENWIFI_DIR/user_space/
./prepare_kernel.sh $XILINX_DIR 32 build
sudo true
./prepare_kernel.sh $XILINX_DIR 64 build
sudo true
BOARD_NAME_ALL="sdrpi antsdr antsdr_e200 zc706_fmcs2 zed_fmcs2 zc702_fmcs2 adrv9361z7035 adrv9364z7020 zcu102_fmcs2 zcu102_9371"
# BOARD_NAME_ALL="zcu102_fmcs2"
# BOARD_NAME_ALL="adrv9361z7035"
for BOARD_NAME_TMP in $BOARD_NAME_ALL
do
if [ "$BOARD_NAME_TMP" == "zcu102_fmcs2" ] || [ "$BOARD_NAME_TMP" == "zcu102_9371" ]; then
dtb_filename_tmp="system.dtb"
dts_filename_tmp="system.dts"
./boot_bin_gen_zynqmp.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME_TMP
else
dtb_filename_tmp="devicetree.dtb"
dts_filename_tmp="devicetree.dts"
./boot_bin_gen.sh $OPENWIFI_HW_DIR $XILINX_DIR $BOARD_NAME_TMP
fi
echo $dtb_filename_tmp
echo $dts_filename_tmp
dtc -I dts -O dtb -o $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dtb_filename_tmp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dts_filename_tmp
mkdir $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP
sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dtb_filename_tmp $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP
sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/output_boot_bin/BOOT.BIN $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP
sudo true
done
sudo mkdir $SDCARD_DIR/BOOT/openwifi/zynq-common
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage $SDCARD_DIR/BOOT/openwifi/zynq-common/
sudo mkdir $SDCARD_DIR/BOOT/openwifi/zynqmp-common
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/arch/arm64/boot/Image $SDCARD_DIR/BOOT/openwifi/zynqmp-common/
sudo mkdir $SDCARD_DIR/rootfs/root/openwifi
# Copy uImage BOOT.BIN and devicetree to SD card BOOT partition and backup at rootfs/root/openwifi
sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/$dtb_filename $SDCARD_DIR/BOOT/
sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/$dtb_filename $SDCARD_DIR/rootfs/root/openwifi/ -rf
sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN $SDCARD_DIR/BOOT/
sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME/output_boot_bin/BOOT.BIN $SDCARD_DIR/rootfs/root/openwifi/ -rf
if [ "$BOARD_NAME" == "zcu102_fmcs2" ] || [ "$BOARD_NAME" == "zcu102_9371" ]; then
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/arch/arm64/boot/Image $SDCARD_DIR/BOOT/
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/arch/arm64/boot/Image $SDCARD_DIR/rootfs/root/openwifi/ -rf
else
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage $SDCARD_DIR/BOOT/
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage $SDCARD_DIR/rootfs/root/openwifi/ -rf
if [ "$SKIP_KERNEL_BUILD" == "0" ]; then
cd $OPENWIFI_DIR/user_space/
./prepare_kernel.sh $XILINX_DIR 32
sudo true
./prepare_kernel.sh $XILINX_DIR 64
sudo true
fi
sudo cp $OPENWIFI_DIR/user_space/* $SDCARD_DIR/rootfs/root/openwifi/ -rf
sudo mv $SDCARD_DIR/rootfs/root/openwifi/system_top.bit.bin $SDCARD_DIR/rootfs/root/openwifi/system_top.bit.bin.bak
sudo wget -P $SDCARD_DIR/rootfs/root/openwifi/webserver/ https://users.ugent.be/~xjiao/openwifi-low-aac.mp4
if [ "$SKIP_BOOT" == "0" ]; then
sudo rm -rf $SDCARD_DIR/BOOT/openwifi/
sudo mkdir -p $SDCARD_DIR/BOOT/openwifi
for BOARD_NAME_TMP in $BOARD_NAME_ALL
do
if [ "$BOARD_NAME_TMP" == "zcu102_fmcs2" ] || [ "$BOARD_NAME_TMP" == "zcu102_9371" ]; then
dtb_filename_tmp="system.dtb"
dts_filename_tmp="system.dts"
else
dtb_filename_tmp="devicetree.dtb"
dts_filename_tmp="devicetree.dts"
kernel_img_filename_tmp=$OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage
fi
./boot_bin_gen.sh $XILINX_DIR $BOARD_NAME_TMP $OPENWIFI_HW_IMG_DIR/boards/$BOARD_NAME_TMP/sdk/system_top.xsa
echo $dtb_filename_tmp
echo $dts_filename_tmp
# build openwifi driver
saved_dir=$(pwd)
cd $OPENWIFI_DIR/driver
./make_all.sh $XILINX_DIR 32
cd $OPENWIFI_DIR/driver/side_ch
./make_driver.sh $XILINX_DIR 32
cd $saved_dir
dtc -I dts -O dtb -o $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dtb_filename_tmp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dts_filename_tmp
sudo mkdir -p $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP
sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/$dtb_filename_tmp $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP/
sudo cp $OPENWIFI_DIR/kernel_boot/boards/$BOARD_NAME_TMP/output_boot_bin/BOOT.BIN $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP/
sudo cp ./system_top.bit.bin $SDCARD_DIR/BOOT/openwifi/$BOARD_NAME_TMP/
sudo true
done
# Copy files to SD card rootfs partition
sudo mkdir $SDCARD_DIR/rootfs/root/openwifi/drv32
sudo find $OPENWIFI_DIR/driver -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/openwifi/drv32 \;
kernel_img_filename_tmp=$OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/arch/arm64/boot/Image
sudo cp $kernel_img_filename_tmp $SDCARD_DIR/BOOT/
kernel_img_filename_tmp=$OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/arch/arm/boot/uImage
sudo cp $kernel_img_filename_tmp $SDCARD_DIR/BOOT/
fi
# build openwifi driver
saved_dir=$(pwd)
cd $OPENWIFI_DIR/driver
./make_all.sh $XILINX_DIR 64
cd $OPENWIFI_DIR/driver/side_ch
./make_driver.sh $XILINX_DIR 64
cd $saved_dir
if [ "$SKIP_rootfs" == "0" ]; then
sudo rm -rf $SDCARD_DIR/rootfs/root/openwifi/
sudo mkdir -p $SDCARD_DIR/rootfs/root/openwifi
# Copy files to SD card rootfs partition
sudo mkdir $SDCARD_DIR/rootfs/root/openwifi/drv64
sudo find $OPENWIFI_DIR/driver -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/openwifi/drv64 \;
saved_dir=$(pwd)
cd $OPENWIFI_DIR/user_space/
git clean -dxf ./
cd $saved_dir
sudo cp $OPENWIFI_DIR/user_space/* $SDCARD_DIR/rootfs/root/openwifi/ -rf
sudo mv $SDCARD_DIR/rootfs/root/openwifi/system_top.bit.bin $SDCARD_DIR/rootfs/root/openwifi/system_top.bit.bin.bak
sudo wget -P $SDCARD_DIR/rootfs/root/openwifi/webserver/ https://github.com/open-sdr/openwifi-hw-img/raw/master/openwifi-low-aac.mp4
sudo mkdir $SDCARD_DIR/rootfs/lib/modules
sudo rm -rf $SDCARD_DIR/rootfs/root/openwifi_BOOT/
sudo mkdir -p $SDCARD_DIR/rootfs/root/openwifi_BOOT
sudo cp $SDCARD_DIR/BOOT/openwifi/* $SDCARD_DIR/rootfs/root/openwifi_BOOT/ -rf
sudo mkdir $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32
sudo find $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32 -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32/ \;
sudo mv $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32/xilinx_dma.ko $SDCARD_DIR/rootfs/root/openwifi/drv32
sudo mv $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32/ad9361_drv.ko $SDCARD_DIR/rootfs/root/openwifi/drv32
sudo rm $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME32/{axidmatest.ko,adi_axi_hdmi.ko} -f
ARCH_OPTION_ALL="32 64"
for ARCH_OPTION_TMP in $ARCH_OPTION_ALL
do
# build openwifi driver
saved_dir=$(pwd)
cd $OPENWIFI_DIR/driver/
git clean -dxf ./
sync
./make_all.sh $XILINX_DIR $ARCH_OPTION_TMP
cd $saved_dir
sudo mkdir $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64
sudo find $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64 -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64/ \;
sudo mv $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64/xilinx_dma.ko $SDCARD_DIR/rootfs/root/openwifi/drv64
sudo mv $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64/ad9361_drv.ko $SDCARD_DIR/rootfs/root/openwifi/drv64
sudo rm $SDCARD_DIR/rootfs/lib/modules/$LINUX_KERNEL_SRC_DIR_NAME64/{axidmatest.ko,adi_axi_hdmi.ko} -f
# Copy files to SD card rootfs partition
sudo rm -rf $SDCARD_DIR/rootfs/root/openwifi$ARCH_OPTION_TMP/
sudo mkdir -p $SDCARD_DIR/rootfs/root/openwifi$ARCH_OPTION_TMP
sudo find $OPENWIFI_DIR/driver/ -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/openwifi$ARCH_OPTION_TMP \;
sudo rm $SDCARD_DIR/rootfs/etc/udev/rules.d/70-persistent-net.rules
sudo cp $OPENWIFI_DIR/kernel_boot/70-persistent-net.rules $SDCARD_DIR/rootfs/etc/udev/rules.d/
sudo mv $SDCARD_DIR/rootfs/lib/udev/rules.d/75-persistent-net-generator.rules $SDCARD_DIR/rootfs/lib/udev/rules.d/75-persistent-net-generator.rules.bak
sudo rm -rf $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
sudo mkdir -p $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP
# Some setup
sudo echo -e "\nauto lo eth0\niface lo inet loopback\niface eth0 inet static\naddress 192.168.10.122\nnetmask 255.255.255.0\n" | sudo tee -a $SDCARD_DIR/rootfs/etc/network/interfaces
sudo echo -e "\nnameserver 8.8.8.8\nnameserver 4.4.4.4\n" | sudo tee -a $SDCARD_DIR/rootfs/etc/resolv.conf
sudo echo -e "\nUseDNS no\n" | sudo tee -a $SDCARD_DIR/rootfs/etc/ssh/sshd_config
sudo echo -e "\nnet.ipv4.ip_forward=1\n" | sudo tee -a $SDCARD_DIR/rootfs/etc/sysctl.conf
sudo chmod -x $SDCARD_DIR/rootfs/etc/update-motd.d/90-updates-available
sudo chmod -x $SDCARD_DIR/rootfs/etc/update-motd.d/91-release-upgrade
if [ "$ARCH_OPTION_TMP" == "32" ]; then
sudo find $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32 -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/ \;
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/Module.symvers $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/modules.builtin $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/modules.builtin.modinfo $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME32/modules.order $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
else
sudo find $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64 -name \*.ko -exec cp {} $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/ \;
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/Module.symvers $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/modules.builtin $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/modules.builtin.modinfo $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
sudo cp $OPENWIFI_DIR/$LINUX_KERNEL_SRC_DIR_NAME64/modules.order $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/
fi
sudo rm -rf $SDCARD_DIR/rootfs/lib/modules/*dirty*
sudo rm -rf $SDCARD_DIR/rootfs/root/kernel_modules
# sudo rm $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/axidmatest.ko -f
# sudo rm $SDCARD_DIR/rootfs/root/kernel_modules$ARCH_OPTION_TMP/adi_axi_hdmi.ko -f
done
fi
cd $SDCARD_DIR/BOOT
sync
@ -196,5 +194,5 @@ sync
cd $home_dir
umount $SDCARD_DIR/BOOT/
umount $SDCARD_DIR/rootfs/
sudo umount $SDCARD_DIR/BOOT/
sudo umount $SDCARD_DIR/rootfs/

26
user_space/wgd.sh
View File

@ -64,6 +64,13 @@ insert_check_module () {
print_usage
insmod ad9361_drv.ko
insmod xilinx_dma.ko
# modprobe ad9361_drv
# modprobe xilinx_dma
modprobe mac80211
lsmod
TARGET_DIR=./
DOWNLOAD_FLAG=0
test_mode=0
@ -125,10 +132,14 @@ fi
echo " "
service network-manager stop
killall hostapd
service dhcpcd stop #dhcp client. it will get secondary ip for sdr0 which causes trouble
killall dhcpd
killall wpa_supplicant
#service network-manager stop
ifconfig sdr0 down
rmmod sdr
insert_check_module ./ ad9361_drv
if [ $DOWNLOAD_FLAG -eq 1 ]; then
download_module fpga $TARGET_DIR
@ -138,15 +149,10 @@ if [ -f "$TARGET_DIR/system_top.bit.bin" ]; then
./load_fpga_img.sh $TARGET_DIR/system_top.bit.bin
else
echo $TARGET_DIR/system_top.bit.bin not found. Skip reloading FPGA.
./load_fpga_img.sh fjdo349ujtrueugjhj
# ./load_fpga_img.sh fjdo349ujtrueugjhj
fi
./rf_init_11n.sh
insert_check_module ./ xilinx_dma
depmod
modprobe mac80211
lsmod
MODULE_ALL="tx_intf rx_intf openofdm_tx openofdm_rx xpu sdr"
for MODULE in $MODULE_ALL
@ -161,8 +167,8 @@ do
fi
done
[ -e /tmp/check_calib_inf.pid ] && kill -0 $(</tmp/check_calib_inf.pid)
./check_calib_inf.sh
# [ -e /tmp/check_calib_inf.pid ] && kill -0 $(</tmp/check_calib_inf.pid)
# ./check_calib_inf.sh
echo the end
# dmesg