Sebastian Sumpf fd0e6685fc riscv: Use Qemu and update to ISA v1.10 ... - remove Spike/BBL support in favour of Qemu (>=4.2.1) - add 'riscv_qemu' board, remove 'spike' board' - update to privileged ISA v1.10 (from v1.9.1) - use direct system calls for privileged core threads (they call into the kernel and don't use mode changing system calls, i.e. 'ecall', semantics) - use 'OpenSBI' semtantics for SBI calls (to machine mode) instead of BBL issue #4012		2021-02-23 12:02:44 +01:00
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arm_v7.h	vmm_arm: support for i.MX7 Dual SABRE board	2019-05-06 16:15:25 +02:00
imx6.h	hw: correct the ARM cache maintainance operations	2020-03-26 11:38:55 +01:00
imx6q_sabrelite.h	enable i.MX6 Quad Sabrelite board for hw and foc	2019-01-30 13:35:28 +01:00
imx7d_sabre.h	hw: correct the ARM cache maintainance operations	2020-03-26 11:38:55 +01:00
imx8q_evk.h	sd_card_drv: i.MX8 support	2019-12-19 17:01:42 +01:00
imx53_qsb.h	base: remove include/spec/* other than ISA	2017-05-31 13:16:01 +02:00
imx53.h	hw: correct the ARM cache maintainance operations	2020-03-26 11:38:55 +01:00
nit6_solox.h	hw: add board support for Nitrogen6 SoloX	2019-02-26 14:45:31 +01:00
pbxa9.h	hw: correct the ARM cache maintainance operations	2020-03-26 11:38:55 +01:00
rpi.h	hw: unify irq enumeration for Raspberri Pi	2020-08-25 11:50:12 +02:00
usb_armory.h	base: remove include/spec/* other than ISA	2017-05-31 13:16:01 +02:00
wand_quad.h	hw: avoid code duplication for imx6 initialization	2019-02-26 14:45:31 +01:00
zynq_qemu.h	zynq: move RAM size to board defs	2018-11-29 11:46:02 +01:00
zynq.h	hw: correct the ARM cache maintainance operations	2020-03-26 11:38:55 +01:00