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6d48b5484d
This commit fixes the following issues regarding cache maintainance under ARM: * read out I-, and D-cache line size at runtime and use the correct one * remove 'update_data_region' call from unprivileged syscalls * rename 'update_instr_region' syscall to 'cache_coherent_region' to reflect what it doing, namely make I-, and D-cache coherent * restrict 'cache_coherent_region' syscall to one page at a time * lookup the region given in a 'cache_coherent_region' syscall in the page-table of the PD to prevent machine exceptions in the kernel * only clean D-cache lines, do not invalidate them when pages where added on Cortex-A8 and ARMv6 (MMU sees phys. memory here) * remove unused code relicts of cache maintainance In addition it introduces per architecture memory clearance functions used by core, when preparing new dataspaces. Thereby, it optimizes: * on ARMv7 using per-word assignments * on ARMv8 using cacheline zeroing * on x86_64 using 'rept stosq' assembler instruction Fix #3685 |
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| .. | ||
| arm_v7.h | ||
| arndale.h | ||
| exynos5.h | ||
| imx6.h | ||
| imx6q_sabrelite.h | ||
| imx7d_sabre.h | ||
| imx8q_evk.h | ||
| imx53_qsb.h | ||
| imx53.h | ||
| nit6_solox.h | ||
| odroid_x2.h | ||
| odroid_xu.h | ||
| panda.h | ||
| pbxa9.h | ||
| riscv.h | ||
| rpi.h | ||
| usb_armory.h | ||
| wand_quad.h | ||
| zynq_qemu.h | ||
| zynq.h | ||