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6d48b5484d
This commit fixes the following issues regarding cache maintainance under ARM: * read out I-, and D-cache line size at runtime and use the correct one * remove 'update_data_region' call from unprivileged syscalls * rename 'update_instr_region' syscall to 'cache_coherent_region' to reflect what it doing, namely make I-, and D-cache coherent * restrict 'cache_coherent_region' syscall to one page at a time * lookup the region given in a 'cache_coherent_region' syscall in the page-table of the PD to prevent machine exceptions in the kernel * only clean D-cache lines, do not invalidate them when pages where added on Cortex-A8 and ARMv6 (MMU sees phys. memory here) * remove unused code relicts of cache maintainance In addition it introduces per architecture memory clearance functions used by core, when preparing new dataspaces. Thereby, it optimizes: * on ARMv7 using per-word assignments * on ARMv8 using cacheline zeroing * on x86_64 using 'rept stosq' assembler instruction Fix #3685 |
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| .. | ||
| base | ||
| cpu | ||
| cpu_session | ||
| cpu_thread | ||
| dataspace | ||
| deprecated | ||
| drivers | ||
| io_mem_session | ||
| io_port_session | ||
| irq_session | ||
| log_session | ||
| parent | ||
| pd_session | ||
| region_map | ||
| rm_session | ||
| rom_session | ||
| root | ||
| session | ||
| spec | ||
| timer | ||
| timer_session | ||
| trace_session | ||
| util | ||
| vm_session | ||
| README | ||
This directory contains include files of interfaces that are exported by components to be used by other components. Each subdirectory corresponds to the component exporting the interface.