Commit Graph

39 Commits

Author SHA1 Message Date
Norman Feske
03047009b1 base: avoid implicit conversions
This patch is a prerequisite for compiling the code with
the warnings -Wconversion enabled.

Issue #23
2021-12-17 15:04:44 +01:00
Alexander Boettcher
533015b93e nova: support transfer of IA32_TSC_AUX MSR for vCPUs
The 32-bit MSR is returned by rdtscp in ecx register and used to detect
the CPU ID the timestamp was taken on.

Issue #4314
2021-11-29 15:10:52 +01:00
Johannes Schlatow
2b0bb6dda0 trace: comment x86 timestamp() implementations
Fixes genodelabs/genode#4243
2021-08-30 15:00:38 +02:00
Christian Helmuth
219809ffed base: refactor VM/vCPU API
Issue #3554
2021-02-23 12:07:18 +01:00
Sebastian Sumpf
ccd9ba4161 riscv: move CPU header from base-hw to base
issue #4021
2021-02-23 12:07:16 +01:00
Alexander Boettcher
c5de2acf57 vm_session(x86): support cstar register
Fixes #3964
2020-12-09 14:02:12 +01:00
Alexander Boettcher
f09ac23144 base: Timestamp type on arm_64 is 64bit 2020-02-04 15:51:09 +01:00
Sebastian Sumpf
1b489820a9 base: timestamp support for ARM 64-Bit
issue #3407
2019-07-09 08:55:23 +02:00
Alexander Boettcher
ab6315d6b4 vm_session: add fpu state for x86
Issue #3111
2019-05-29 10:20:52 +02:00
Stefan Kalkowski
71a48c0a26 base: add initial support for ARM 64-bit
Ref #3260
2019-05-27 14:52:51 +02:00
Alexander Boettcher
5fa91a1bcc base: add x86 vm_state
Issue #3111
2019-04-01 19:33:51 +02:00
Stefan Kalkowski
8f28f884ee hw: name vm_state header explicitely
Ref #3251
2019-04-01 19:33:49 +02:00
Martin Stein
b04a70177b base & arm: simplify and optimize cmpxchg
The old inline assembly provided two output operands that were afterwards
combined for a return value. However, the second output operand isn't
necessary when using the "Acquiring a Lock" example-code of the ARM manual
"Barrier Litmus Tests and Cookbook". This saves two logical operations
per acquisition try. Additionally better documentation is now provided.

Fixes #1292
2019-04-01 19:33:47 +02:00
Stefan Kalkowski
4796f761b8 base: initialize Cpu_state consistently (Fix #1452) 2019-03-18 15:56:23 +01:00
Alexander Boettcher
0c24e1efdc vm_session: extensions
- support to create multiple vCPUs
- support to implement Vm_session methods client side within base library
- adjust muen specific virtualbox4 version to compile/link

Issue #3111
2019-02-19 11:08:17 +01:00
Norman Feske
bf62d6b896 Move timer from os to base repository
Since the timer and timeout handling is part of the base library (the
dynamic linker), it belongs to the base repository.

Besides moving the timer and its related infrastructure (alarm, timeout
libs, tests) to the base repository, this patch also moves the timer
from the 'drivers' subdirectory directly to 'src' and disamibuates the
timer's build locations for the various kernels. Otherwise the different
timer implementations could interfere with each other when using one
build directory with multiple kernels.

Note that this patch changes the include paths for the former os/timer,
os/alarm.h, os/duration.h, and os/timed_semaphore.h to base/.

Issue #3101
2019-01-14 12:33:57 +01:00
Norman Feske
eba9c15746 Follow practices suggested by "Effective C++"
The patch adjust the code of the base, base-<kernel>, and os repository.
To adapt existing components to fix violations of the best practices
suggested by "Effective C++" as reported by the -Weffc++ compiler
argument. The changes follow the patterns outlined below:

* A class with virtual functions can no longer publicly inherit base
  classed without a vtable. The inherited object may either be moved
  to a member variable, or inherited privately. The latter would be
  used for classes that inherit 'List::Element' or 'Avl_node'. In order
  to enable the 'List' and 'Avl_tree' to access the meta data, the
  'List' must become a friend.

* Instead of adding a virtual destructor to abstract base classes,
  we inherit the new 'Interface' class, which contains a virtual
  destructor. This way, single-line abstract base classes can stay
  as compact as they are now. The 'Interface' utility resides in
  base/include/util/interface.h.

* With the new warnings enabled, all member variables must be explicitly
  initialized. Basic types may be initialized with '='. All other types
  are initialized with braces '{ ... }' or as class initializers. If
  basic types and non-basic types appear in a row, it is nice to only
  use the brace syntax (also for basic types) and align the braces.

* If a class contains pointers as members, it must now also provide a
  copy constructor and assignment operator. In the most cases, one
  would make them private, effectively disallowing the objects to be
  copied. Unfortunately, this warning cannot be fixed be inheriting
  our existing 'Noncopyable' class (the compiler fails to detect that
  the inheriting class cannot be copied and still gives the error).
  For now, we have to manually add declarations for both the copy
  constructor and assignment operator as private class members. Those
  declarations should be prepended with a comment like this:

        /*
         * Noncopyable
         */
        Thread(Thread const &);
        Thread &operator = (Thread const &);

  In the future, we should revisit these places and try to replace
  the pointers with references. In the presence of at least one
  reference member, the compiler would no longer implicitly generate
  a copy constructor. So we could remove the manual declaration.

Issue #465
2018-01-17 12:14:35 +01:00
Stefan Kalkowski
4e97a6511b hw: switch page-tables only when necessary
* Instead of always re-load page-tables when a thread context is switched
  only do this when another user PD's thread is the next target,
  core-threads are always executed within the last PD's page-table set
* remove the concept of the mode transition
* instead map the exception vector once in bootstrap code into kernel's
  memory segment
* when a new page directory is constructed for a user PD, copy over the
  top-level kernel segment entries on RISCV and X86, on ARM we use a designated
  page directory register for the kernel segment
* transfer the current CPU id from bootstrap to core/kernel in a register
  to ease first stack address calculation
* align cpu context member of threads and vms, because of x86 constraints
  regarding the stack-pointer loading
* introduce Align_at template for members with alignment constraints
* let the x86 hardware do part of the context saving in ISS, by passing
  the thread context into the TSS before leaving to user-land
* use one exception vector for all ARM platforms including Arm_v6

Fix #2091
2017-10-19 13:31:18 +02:00
Stefan Kalkowski
ca60e24ad9 hw: run core threads in privileged mode
* introduce new syscall (core-only) to create privileged threads
* take the privilege level of the thread into account
  when doing a context switch
* map kernel segment as accessable for privileged code only

Ref #2091
2017-10-19 13:31:17 +02:00
Stefan Kalkowski
6106e64aac base: remove include/spec/* other than ISA
This commit moves the headers residing in `repos/base/include/spec/*/drivers`
to `repos/base/include/drivers/defs` or repos/base/include/drivers/uart`
respectively. The first one contains definitions about board-specific MMIO
iand RAM addresses, or IRQ lines. While the latter contains device driver
code for UART devices. Those definitions are used by driver implementations
in `repos/base-hw`, `repos/os`, and `repos/dde-linux`, which now need to
include them more explicitely.

This work is a step in the direction of reducing 'SPEC' identifiers overall.

Ref #2403
2017-05-31 13:16:01 +02:00
Stefan Kalkowski
67ba7b89a7 hw: separate bootstrap and core strictly
* Introduce Hw namespace and library files under src/lib/hw
* Introduce Bootstrap namespace
* Move all initialization logic into Bootstrap namespace

Ref #2388
2017-05-31 13:15:52 +02:00
Martin Stein
0bb752674f panda: fix timer speed
Previously we had configured the timer for the Panda ES with 700 MHz
CPU clock. But the Panda A6 that we use as reference now runs with
800 MHz.

Fixes #2308
2017-03-15 12:32:24 +01:00
Norman Feske
29b8d609c9 Adjust file headers to refer to the AGPLv3 2017-02-28 12:59:29 +01:00
Stefan Kalkowski
cf943dac65 hw: bootstrap into kernel
Put the initialization of the cpu cores, setup of page-tables, enabling of
MMU and caches into a separate component that is only used to bootstrap
the kernel resp. core.

Ref #2092
2017-02-23 14:54:42 +01:00
Stefan Kalkowski
c76c199f8d hw: enable SMP for Wandboard (fix #2253) 2017-01-31 12:01:16 +01:00
Martin Stein
613f4171f3 sd_card: i.MX6 support
The i.MX6 driver shares most of its code with the i.MX53 driver.

Ref #2206
2017-01-13 13:07:06 +01:00
Martin Stein
1208d14681 hw: use kernel timer for timer driver
* Adds public timeout syscalls to kernel API
  * Kernel::timeout installs a timeout and binds a signal context to it that
    shall trigger once the timeout expired
  * With Kernel::timeout_max_us, one can get the maximum installable timeout
  * Kernel::timeout_age_us returns the time that has passed since the
    calling threads last timeout installation

* Removes all device specific back-ends for the base-hw timer driver and
  implements a generic back-end taht uses the kernel timeout API

* Adds assertions about the kernel timer frequency that originate from the
  requirements of the the kernel timeout API and adjusts all timers
  accordingly by using the their internal dividers

* Introduces the Kernel::Clock class. As member of each Kernel::Cpu object
  it combines the management of the timer of the CPU with a timeout scheduler.
  Not only the timeout API uses the timeout scheduler but also the CPUs job
  scheduler for installing scheduling timeouts.

* Introduces the Kernel::time_t type for timer tic values and values inherited
  from timer tics (like microseconds).

Fixes #1972
2016-05-26 15:54:15 +02:00
Christian Helmuth
9cd26c4d61 Prevent compiler warnings 2016-04-25 10:48:02 +02:00
Timo Wischer
3e1fa54c61 sd_card: generalise RPi sd card driver
This enables to reuse the driver for zynq (and other platforms) in the
future.

Fixes #1925
2016-04-11 12:12:23 +02:00
Norman Feske
7f73e5e879 base: hide internals of the Thread API
This patch moves details about the stack allocation and organization
the base-internal headers. Thereby, I replaced the notion of "thread
contexts" by "stacks" as this term is much more intuitive. The fact that
we place thread-specific information at the bottom of the stack is not
worth introducing new terminology.

Issue #1832
2016-03-07 12:34:46 +01:00
Norman Feske
2e701f9afa base: update include guards
This patch cleans up the include guards, assisted by the
tool/fix_include_ifndef script.
2016-03-07 12:34:45 +01:00
Norman Feske
e6729316ff base: uniform base-internal header structure
This patch establishes a common organization of header files
internal to the base framework. The internal headers are located at
'<repository>/src/include/base/internal/'. This structure has been
choosen to make the nature of those headers immediately clear when
included:

  #include <base/internal/lock_helper.h>

Issue #1832
2016-03-07 12:34:45 +01:00
Stefan Kalkowski
b0b4c3c7fa noux: consider stack alignment constraints
The interim stack in a forked noux process has to consider the architecture
dependent stack alignment constraints.

Fix #1852
2016-01-26 16:20:37 +01:00
Stefan Kalkowski
7aff1895bf hw: enable SMP for ARM Cortex A9
This commit enables multi-processing for all Cortex A9 SoCs we currently
support. Moreover, it thereby enables the L2 cache for i.MX6 that was not
enabled until now. However, the QEMU variants hw_pbxa9 and hw_zynq still
only use 1 core, because the busy cpu synchronization used when initializing
multiple Cortex A9 cores leads to horrible boot times on QEMU.

During this work the CPU initialization in general was reworked. From now
on lots of hardware specifics were put into the 'spec' specific files, some
generic hook functions and abstractions thereby were eliminated. This
results to more lean implementations for instance on non-SMP platforms,
or in the x86 case where cache maintainance is a non-issue.

Due to the fact that memory/cache coherency and SMP are closely coupled
on ARM Cortex A9 this commit combines so different aspects.

Fix #1312
Fix #1807
2016-01-26 16:20:18 +01:00
Martin Stein
c58de0d80e hw_panda: driver for Cortex-A9 wakeup generator
Ref #1312
2016-01-15 16:42:12 +01:00
Martin Stein
492bd39619 epit timer: raise precision
Previously we used a pretty slow external clock source for the timer. This
resulted in such a low TICS_PER_MS value that the granularity wasn't
sufficient to find a setup with a precision better than 1 second error per
minute. Now we use the so-called High Frequency Reference Clock as input
with TICS_PER_MS=33333 and the timer precision is significantly < 1 second per
minute.

Fixes #1805
2015-12-10 13:16:26 +01:00
Alexy Gallardo Segura
de87ecfc62 foc_odroid_x2: basic configuration for gpio pins
Fixes #1669
2015-09-30 12:20:38 +02:00
Alexy Gallardo Segura
49b3d520a9 exynos: generalize Exynos5 fb_drv for Exynos4/5
Fixes #1678
2015-09-30 12:20:37 +02:00
Stefan Kalkowski
ed52d5a211 Introduce 'spec' subdirectories to outline aspects
Instead of holding SPEC-variable dependent files and directories inline
within the repository structure, move them into 'spec' subdirectories
at the corresponding levels, e.g.:

  repos/base/include/spec
  repos/base/mk/spec
  repos/base/lib/mk/spec
  repos/base/src/core/spec
  ...

Moreover, this commit removes the 'platform' directories. That term was
used in an overloaded sense. All SPEC-relative 'platform' directories are
now named 'spec'. Other files, like for instance those related to the
kernel/architecture specific startup library, where moved from 'platform'
directories to explicit, more meaningful places like e.g.: 'src/lib/startup'.

Fix #1673
2015-09-16 13:58:50 +02:00