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hw: add Serial re-init/resume support

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Issue #4669
This commit is contained in:
Alexander Boettcher 2023-02-21 15:25:13 +01:00 committed by Christian Helmuth
parent 5587476b4e
commit 1da71afbf3
5 changed files with 29 additions and 13 deletions
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2
repos/base-hw/src/core/kernel/main.cc
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@ -142,6 +142,8 @@ void Kernel::main_initialize_and_handle_kernel_entry()
if (kernel_initialized) { if (kernel_initialized) {
nr_of_initialized_cpus = 0; nr_of_initialized_cpus = 0;
kernel_initialized = false; kernel_initialized = false;
Main::_instance->_serial.init();
} }
nr_of_initialized_cpus ++; nr_of_initialized_cpus ++;

2
repos/base-hw/src/include/hw/spec/riscv/sbi.h
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@ -47,6 +47,8 @@ struct Hw::Riscv_uart
{ {
Sbi::console_put_char(c); Sbi::console_put_char(c);
} }
void init() { }
}; };
#endif /* _SRC__LIB__HW__SPEC__RISCV__SBI_H_ */ #endif /* _SRC__LIB__HW__SPEC__RISCV__SBI_H_ */

5
repos/base/include/drivers/uart/imx.h
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@ -247,6 +247,11 @@ class Genode::Imx_uart: Mmio
* \param base device MMIO base * \param base device MMIO base
*/ */
Imx_uart(addr_t base, uint32_t, uint32_t) : Mmio(base) Imx_uart(addr_t base, uint32_t, uint32_t) : Mmio(base)
{
init();
}
void init()
{ {
write<Cr1>(Cr1::init_value()); write<Cr1>(Cr1::init_value());
write<Cr2>(Cr2::init_value()); write<Cr2>(Cr2::init_value());

2
repos/base/include/drivers/uart/pl011.h
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@ -126,6 +126,8 @@ class Genode::Pl011_uart : Mmio
* Send ASCII char 'c' over the UART interface * Send ASCII char 'c' over the UART interface
*/ */
inline void put_char(char const c); inline void put_char(char const c);
void init() { }
}; };

31
repos/base/include/drivers/uart/x86_pc.h
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@ -24,7 +24,8 @@ class Genode::X86_uart
{ {
private: private:
uint16_t _port; uint16_t const _port;
unsigned const _baud_rate;
enum { enum {
COMPORT_DATA_OFFSET = 0, COMPORT_DATA_OFFSET = 0,
@ -59,32 +60,36 @@ class Genode::X86_uart
X86_uart(uint16_t const port, unsigned /* clock */, X86_uart(uint16_t const port, unsigned /* clock */,
unsigned const baud_rate) unsigned const baud_rate)
: :
_port(port) _port(port), _baud_rate(baud_rate)
{ {
init();
}
void init()
{
/** /**
* Initialize serial port * Initialize serial port
* *
* Based on 'init_serial' of L4ka::Pistachio's 'kdb/platform/pc99/io.cc' * Based on 'init_serial' of L4ka::Pistachio's 'kdb/platform/pc99/io.cc'
*/ */
if (!port) if (!_port)
return; return;
uint16_t const uint16_t const
IER = (uint16_t)(port + 1), IER = (uint16_t)(_port + 1),
EIR = (uint16_t)(port + 2), EIR = (uint16_t)(_port + 2),
LCR = (uint16_t)(port + 3), LCR = (uint16_t)(_port + 3),
MCR = (uint16_t)(port + 4), MCR = (uint16_t)(_port + 4),
LSR = (uint16_t)(port + 5), LSR = (uint16_t)(_port + 5),
MSR = (uint16_t)(port + 6), MSR = (uint16_t)(_port + 6),
DLLO = (uint16_t)(port + 0), DLLO = (uint16_t)(_port + 0),
DLHI = (uint16_t)(port + 1); DLHI = (uint16_t)(_port + 1);
_outb(LCR, 0x80); /* select bank 1 */ _outb(LCR, 0x80); /* select bank 1 */
for (volatile int i = 10000000; i--; ); for (volatile int i = 10000000; i--; );
_outb(DLLO, (uint8_t)((115200/baud_rate) >> 0)); _outb(DLLO, (uint8_t)((115200/_baud_rate) >> 0));
_outb(DLHI, (uint8_t)((115200/baud_rate) >> 8)); _outb(DLHI, (uint8_t)((115200/_baud_rate) >> 8));
_outb(LCR, 0x03); /* set 8,N,1 */ _outb(LCR, 0x03); /* set 8,N,1 */
_outb(IER, 0x00); /* disable interrupts */ _outb(IER, 0x00); /* disable interrupts */
_outb(EIR, 0x07); /* enable FIFOs */ _outb(EIR, 0x07); /* enable FIFOs */