From 1da71afbf3de1f365743feebe7dbffa7accf28f3 Mon Sep 17 00:00:00 2001
From: Alexander Boettcher <alexander.boettcher@genode-labs.com>
Date: Tue, 21 Feb 2023 15:25:13 +0100
Subject: [PATCH] hw: add Serial re-init/resume support

Issue #4669
---
 repos/base-hw/src/core/kernel/main.cc         |  2 ++
 repos/base-hw/src/include/hw/spec/riscv/sbi.h |  2 ++
 repos/base/include/drivers/uart/imx.h         |  5 +++
 repos/base/include/drivers/uart/pl011.h       |  2 ++
 repos/base/include/drivers/uart/x86_pc.h      | 31 +++++++++++--------
 5 files changed, 29 insertions(+), 13 deletions(-)

diff --git a/repos/base-hw/src/core/kernel/main.cc b/repos/base-hw/src/core/kernel/main.cc
index f4beb07755..a3b4ccadd4 100644
--- a/repos/base-hw/src/core/kernel/main.cc
+++ b/repos/base-hw/src/core/kernel/main.cc
@@ -142,6 +142,8 @@ void Kernel::main_initialize_and_handle_kernel_entry()
 			if (kernel_initialized) {
 				nr_of_initialized_cpus = 0;
 				kernel_initialized     = false;
+
+				Main::_instance->_serial.init();
 			}
 
 			nr_of_initialized_cpus ++;
diff --git a/repos/base-hw/src/include/hw/spec/riscv/sbi.h b/repos/base-hw/src/include/hw/spec/riscv/sbi.h
index 1e839b3533..deac2b92d7 100644
--- a/repos/base-hw/src/include/hw/spec/riscv/sbi.h
+++ b/repos/base-hw/src/include/hw/spec/riscv/sbi.h
@@ -47,6 +47,8 @@ struct Hw::Riscv_uart
 	{
 		Sbi::console_put_char(c);
 	}
+
+	void init() { }
 };
 
 #endif /* _SRC__LIB__HW__SPEC__RISCV__SBI_H_ */
diff --git a/repos/base/include/drivers/uart/imx.h b/repos/base/include/drivers/uart/imx.h
index bcb6f102ce..0b88152c0b 100644
--- a/repos/base/include/drivers/uart/imx.h
+++ b/repos/base/include/drivers/uart/imx.h
@@ -247,6 +247,11 @@ class Genode::Imx_uart: Mmio
 		 * \param base  device MMIO base
 		 */
 		Imx_uart(addr_t base, uint32_t, uint32_t) : Mmio(base)
+		{
+			init();
+		}
+
+		void init()
 		{
 			write<Cr1>(Cr1::init_value());
 			write<Cr2>(Cr2::init_value());
diff --git a/repos/base/include/drivers/uart/pl011.h b/repos/base/include/drivers/uart/pl011.h
index 0fe1201852..2d25cc5a1b 100644
--- a/repos/base/include/drivers/uart/pl011.h
+++ b/repos/base/include/drivers/uart/pl011.h
@@ -126,6 +126,8 @@ class Genode::Pl011_uart : Mmio
 		 * Send ASCII char 'c' over the UART interface
 		 */
 		inline void put_char(char const c);
+
+		void init() { }
 };
 
 
diff --git a/repos/base/include/drivers/uart/x86_pc.h b/repos/base/include/drivers/uart/x86_pc.h
index 2d6719c423..3f509144ce 100644
--- a/repos/base/include/drivers/uart/x86_pc.h
+++ b/repos/base/include/drivers/uart/x86_pc.h
@@ -24,7 +24,8 @@ class Genode::X86_uart
 {
 	private:
 
-		uint16_t _port;
+		uint16_t const _port;
+		unsigned const _baud_rate;
 
 		enum {
 			COMPORT_DATA_OFFSET   = 0,
@@ -59,32 +60,36 @@ class Genode::X86_uart
 		X86_uart(uint16_t const port, unsigned /* clock */,
 		         unsigned const baud_rate)
 		:
-			_port(port)
+			_port(port), _baud_rate(baud_rate)
 		{
+			init();
+		}
 
+		void init()
+		{
 			/**
 			 * Initialize serial port
 			 *
 			 * Based on 'init_serial' of L4ka::Pistachio's 'kdb/platform/pc99/io.cc'
 			 */
 
-			if (!port)
+			if (!_port)
 				return;
 
 			uint16_t const
-				IER  = (uint16_t)(port + 1),
-				EIR  = (uint16_t)(port + 2),
-				LCR  = (uint16_t)(port + 3),
-				MCR  = (uint16_t)(port + 4),
-				LSR  = (uint16_t)(port + 5),
-				MSR  = (uint16_t)(port + 6),
-				DLLO = (uint16_t)(port + 0),
-				DLHI = (uint16_t)(port + 1);
+				IER  = (uint16_t)(_port + 1),
+				EIR  = (uint16_t)(_port + 2),
+				LCR  = (uint16_t)(_port + 3),
+				MCR  = (uint16_t)(_port + 4),
+				LSR  = (uint16_t)(_port + 5),
+				MSR  = (uint16_t)(_port + 6),
+				DLLO = (uint16_t)(_port + 0),
+				DLHI = (uint16_t)(_port + 1);
 
 			_outb(LCR, 0x80);  /* select bank 1 */
 			for (volatile int i = 10000000; i--; );
-			_outb(DLLO, (uint8_t)((115200/baud_rate) >> 0));
-			_outb(DLHI, (uint8_t)((115200/baud_rate) >> 8));
+			_outb(DLLO, (uint8_t)((115200/_baud_rate) >> 0));
+			_outb(DLHI, (uint8_t)((115200/_baud_rate) >> 8));
 			_outb(LCR, 0x03);  /* set 8,N,1 */
 			_outb(IER, 0x00);  /* disable interrupts */
 			_outb(EIR, 0x07);  /* enable FIFOs */