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5587476b4e
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1da71afbf3
@ -142,6 +142,8 @@ void Kernel::main_initialize_and_handle_kernel_entry()
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if (kernel_initialized) {
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nr_of_initialized_cpus = 0;
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kernel_initialized = false;
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Main::_instance->_serial.init();
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}
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nr_of_initialized_cpus ++;
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@ -47,6 +47,8 @@ struct Hw::Riscv_uart
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{
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Sbi::console_put_char(c);
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}
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void init() { }
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};
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#endif /* _SRC__LIB__HW__SPEC__RISCV__SBI_H_ */
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@ -247,6 +247,11 @@ class Genode::Imx_uart: Mmio
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* \param base device MMIO base
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*/
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Imx_uart(addr_t base, uint32_t, uint32_t) : Mmio(base)
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{
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init();
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}
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void init()
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{
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write<Cr1>(Cr1::init_value());
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write<Cr2>(Cr2::init_value());
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@ -126,6 +126,8 @@ class Genode::Pl011_uart : Mmio
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* Send ASCII char 'c' over the UART interface
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*/
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inline void put_char(char const c);
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void init() { }
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};
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@ -24,7 +24,8 @@ class Genode::X86_uart
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{
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private:
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uint16_t _port;
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uint16_t const _port;
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unsigned const _baud_rate;
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enum {
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COMPORT_DATA_OFFSET = 0,
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@ -59,32 +60,36 @@ class Genode::X86_uart
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X86_uart(uint16_t const port, unsigned /* clock */,
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unsigned const baud_rate)
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:
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_port(port)
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_port(port), _baud_rate(baud_rate)
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{
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init();
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}
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void init()
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{
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/**
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* Initialize serial port
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*
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* Based on 'init_serial' of L4ka::Pistachio's 'kdb/platform/pc99/io.cc'
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*/
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if (!port)
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if (!_port)
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return;
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uint16_t const
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IER = (uint16_t)(port + 1),
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EIR = (uint16_t)(port + 2),
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LCR = (uint16_t)(port + 3),
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MCR = (uint16_t)(port + 4),
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LSR = (uint16_t)(port + 5),
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MSR = (uint16_t)(port + 6),
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DLLO = (uint16_t)(port + 0),
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DLHI = (uint16_t)(port + 1);
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IER = (uint16_t)(_port + 1),
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EIR = (uint16_t)(_port + 2),
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LCR = (uint16_t)(_port + 3),
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MCR = (uint16_t)(_port + 4),
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LSR = (uint16_t)(_port + 5),
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MSR = (uint16_t)(_port + 6),
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DLLO = (uint16_t)(_port + 0),
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DLHI = (uint16_t)(_port + 1);
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_outb(LCR, 0x80); /* select bank 1 */
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for (volatile int i = 10000000; i--; );
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_outb(DLLO, (uint8_t)((115200/baud_rate) >> 0));
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_outb(DLHI, (uint8_t)((115200/baud_rate) >> 8));
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_outb(DLLO, (uint8_t)((115200/_baud_rate) >> 0));
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_outb(DLHI, (uint8_t)((115200/_baud_rate) >> 8));
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_outb(LCR, 0x03); /* set 8,N,1 */
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_outb(IER, 0x00); /* disable interrupts */
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_outb(EIR, 0x07); /* enable FIFOs */
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