mirror of
https://github.com/ggerganov/whisper.cpp.git
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149 lines
6.1 KiB
Plaintext
149 lines
6.1 KiB
Plaintext
#include "ssm-conv.cuh"
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template <size_t split_d_inner, size_t d_conv>
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static __global__ void ssm_conv_f32(const float * __restrict__ src0, const float * __restrict__ src1,
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const int src0_nb0, const int src0_nb1, const int src0_nb2, const int src1_nb1,
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float * __restrict__ dst, const int dst_nb0, const int dst_nb1, const int dst_nb2,
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const int64_t n_t) {
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GGML_UNUSED(src0_nb0);
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const int tid = threadIdx.x;
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const int bidx = blockIdx.x;
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const int bidy = blockIdx.y;
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const float * x_block = (const float *) ((const char *) src0 + bidx * src0_nb2 + bidy * split_d_inner * src0_nb1);
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const float * w_block = (const float *) ((const char *) src1 + bidy * split_d_inner * src1_nb1);
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float * y_block = (float *) ((char *) dst + bidx * dst_nb2 + bidy * split_d_inner * dst_nb0);
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const int stride_x = src0_nb1 / sizeof(float);
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const int stride_w = src1_nb1 / sizeof(float);
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const int stride_y = dst_nb1 / sizeof(float);
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float x[d_conv] = { 0.0f };
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float w[d_conv] = { 0.0f };
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#pragma unroll
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for (size_t j = 0; j < d_conv; j++) {
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w[j] = w_block[tid * stride_w + j];
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}
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for (int64_t i = 0; i < n_t; i++) {
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float sumf = 0.0f;
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if (i == 0) {
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for (size_t j = 0; j < d_conv; j++) {
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x[j] = x_block[tid * stride_x + j];
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}
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} else {
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x[(i - 1) % d_conv] = x_block[tid * stride_x + i + d_conv - 1];
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}
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#pragma unroll
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for (size_t j = 0; j < d_conv; j++) {
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sumf += x[(i + j) % d_conv] * w[j];
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}
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y_block[i * stride_y + tid] = sumf;
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}
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}
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template <size_t split_d_inner, size_t d_conv, int64_t split_n_t>
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static __global__ void ssm_conv_long_token_f32(const float * __restrict__ src0, const float * __restrict__ src1,
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const int src0_nb0, const int src0_nb1, const int src0_nb2,
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const int src1_nb1, float * __restrict__ dst, const int dst_nb0,
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const int dst_nb1, const int dst_nb2, const int64_t n_t) {
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const int tid = threadIdx.x;
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const int bidx = blockIdx.x;
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const int bidy = blockIdx.y;
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const int bidz = blockIdx.z;
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const float * x_block = (const float *) ((const char *) src0 + bidx * src0_nb2 + bidy * split_d_inner * src0_nb1 +
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bidz * split_n_t * src0_nb0);
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const float * w_block = (const float *) ((const char *) src1 + bidy * split_d_inner * src1_nb1);
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float * y_block =
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(float *) ((char *) dst + bidx * dst_nb2 + bidz * split_n_t * dst_nb1 + bidy * split_d_inner * dst_nb0);
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const int stride_x = src0_nb1 / sizeof(float);
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const int stride_w = src1_nb1 / sizeof(float);
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const int stride_y = dst_nb1 / sizeof(float);
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float x[d_conv] = { 0.0f };
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float w[d_conv] = { 0.0f };
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#pragma unroll
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for (size_t j = 0; j < d_conv; j++) {
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w[j] = w_block[tid * stride_w + j];
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}
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#pragma unroll
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for (int64_t i = 0; i < split_n_t; i++) {
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if (bidz * split_n_t + i < n_t) {
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float sumf = 0.0f;
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if (i == 0) {
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for (size_t j = 0; j < d_conv; j++) {
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x[j] = x_block[tid * stride_x + j];
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}
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} else {
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x[(i - 1) % d_conv] = x_block[tid * stride_x + i + d_conv - 1];
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}
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#pragma unroll
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for (size_t j = 0; j < d_conv; j++) {
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sumf += x[(i + j) % d_conv] * w[j];
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}
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y_block[i * stride_y + tid] = sumf;
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}
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}
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}
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static void ssm_conv_f32_cuda(const float * src0, const float * src1, const int src0_nb0, const int src0_nb1,
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const int src0_nb2, const int src1_nb1, float * dst, const int dst_nb0, const int dst_nb1,
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const int dst_nb2, const int64_t nc, const int64_t nr, const int64_t n_t,
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const int64_t n_s, cudaStream_t stream) {
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const int threads = 128;
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GGML_ASSERT(nr % threads == 0);
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if (n_t <= 32) {
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const dim3 blocks(n_s, (nr + threads - 1) / threads, 1);
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if (nc == 4) {
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ssm_conv_f32<threads, 4><<<blocks, threads, 0, stream>>>(src0, src1, src0_nb0, src0_nb1, src0_nb2, src1_nb1,
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dst, dst_nb0, dst_nb1, dst_nb2, n_t);
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} else {
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GGML_ABORT("Only support kernel size = 4 now.");
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}
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} else {
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if (nc == 4) {
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const int64_t split_n_t = 32;
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dim3 blocks(n_s, (nr + threads - 1) / threads, (n_t + split_n_t - 1) / split_n_t);
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ssm_conv_long_token_f32<threads, 4, split_n_t><<<blocks, threads, 0, stream>>>(
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src0, src1, src0_nb0, src0_nb1, src0_nb2, src1_nb1, dst, dst_nb0, dst_nb1, dst_nb2, n_t);
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} else {
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GGML_ABORT("Only support kernel size = 4 right now.");
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}
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}
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}
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void ggml_cuda_op_ssm_conv(ggml_backend_cuda_context & ctx, ggml_tensor * dst) {
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const struct ggml_tensor * src0 = dst->src[0]; // conv_x
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const struct ggml_tensor * src1 = dst->src[1]; // conv1d.weight
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const int64_t nc = src1->ne[0]; // d_conv
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const int64_t nr = src0->ne[1]; // d_inner
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const int64_t n_t = dst->ne[1]; // tokens per sequence
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const int64_t n_s = dst->ne[2]; // number of sequences in the batch
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GGML_ASSERT(dst->ne[0] == nr);
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GGML_ASSERT(src0->nb[0] == sizeof(float));
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GGML_ASSERT(src1->nb[0] == sizeof(float));
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GGML_ASSERT(src0->nb[1] == src0->ne[0] * sizeof(float));
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const float * src0_d = (const float *) src0->data;
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const float * src1_d = (const float *) src1->data;
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float * dst_d = (float *) dst->data;
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cudaStream_t stream = ctx.stream();
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GGML_ASSERT(src0->type == GGML_TYPE_F32);
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GGML_ASSERT(dst->type == GGML_TYPE_F32);
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ssm_conv_f32_cuda(src0_d, src1_d, src0->nb[0], src0->nb[1], src0->nb[2], src1->nb[1], dst_d, dst->nb[0], dst->nb[1],
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dst->nb[2], nc, nr, n_t, n_s, stream);
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}
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