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metal : use F32 prec in FA kernels (llama/12688)
* metal : use F32 prec in FA kernels ggml-ci * cont : fix FA vec kernel ggml-ci
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@ -4179,7 +4179,7 @@ static void ggml_metal_encode_node(
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// ne00*(nsg)
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// each simdgroup has a full f16 head vector in shared mem to accumulate results
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//
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#define FATTN_SMEM(nsg) (GGML_PAD((nqptg*(GGML_PAD(ne00, 128) + 2*ncpsg*(nsg)) + ne20*(nsg))*(sizeof(float)/2), 16))
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#define FATTN_SMEM(nsg) (GGML_PAD((nqptg*(GGML_PAD(ne00, 128) + 4*ncpsg*(nsg)) + ne20*(nsg))*(sizeof(float)/2), 16))
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int64_t nsgmax = 2;
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while (true) {
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@ -3184,8 +3184,8 @@ kernel void kernel_flash_attn_ext(
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threadgroup_barrier(mem_flags::mem_threadgroup);
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{
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half S[Q] = { [0 ... Q-1] = 0.0f };
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half M[Q] = { [0 ... Q-1] = -__FLT16_MAX__/2 };
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float S[Q] = { [0 ... Q-1] = 0.0f };
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float M[Q] = { [0 ... Q-1] = -__FLT16_MAX__/2 };
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// thread indices inside the simdgroup
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// TODO: see if we can utilize quad-group functions for better performance
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@ -3202,13 +3202,13 @@ kernel void kernel_flash_attn_ext(
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const bool has_mask = mask != q;
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half slope = 1.0f;
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float slope = 1.0f;
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// ALiBi
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if (args.max_bias > 0.0f) {
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const short h = iq2;
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const half base = h < args.n_head_log2 ? args.m0 : args.m1;
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const float base = h < args.n_head_log2 ? args.m0 : args.m1;
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const short exph = h < args.n_head_log2 ? h + 1 : 2*(h - args.n_head_log2) + 1;
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slope = pow(base, exph);
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@ -3224,14 +3224,14 @@ kernel void kernel_flash_attn_ext(
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if (has_mask) {
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// used to detect blocks full of -INF
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half smax = -INFINITY;
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float smax = -INFINITY;
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// load the mask in shared memory
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#pragma unroll(Q)
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for (short j = 0; j < Q; ++j) {
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device const half * pm = (device const half *) ((device const char *) mask + (iq1 + j)*args.nb31);
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const half m = pm[ic + tiisg];
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const float m = pm[ic + tiisg];
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ss[j*TS + C + tiisg] = m;
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smax = max(smax, m);
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@ -3327,10 +3327,10 @@ kernel void kernel_flash_attn_ext(
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// online softmax
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{
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for (ushort j = 0; j < Q; ++j) {
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const half m = M[j];
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const float m = M[j];
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// scale and apply the logitcap / mask
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half s = ss[j*TS + tiisg]*args.scale;
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float s = ss[j*TS + tiisg]*args.scale;
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if (args.logit_softcap != 0.0f) {
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s = args.logit_softcap*precise::tanh(s);
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@ -3341,8 +3341,8 @@ kernel void kernel_flash_attn_ext(
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M[j] = simd_max(max(M[j], s));
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const half ms = exp(m - M[j]);
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const half vs = exp(s - M[j]);
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const float ms = exp(m - M[j]);
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const float vs = exp(s - M[j]);
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S[j] = S[j]*ms + simd_sum(vs);
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@ -3444,8 +3444,8 @@ kernel void kernel_flash_attn_ext(
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// reduce the warps sequentially
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for (ushort sg = 1; sg < nsg; ++sg) {
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half S = { 0.0f };
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half M = { -__FLT16_MAX__/2 };
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float S = { 0.0f };
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float M = { -__FLT16_MAX__/2 };
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threadgroup_barrier(mem_flags::mem_threadgroup);
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@ -3461,16 +3461,16 @@ kernel void kernel_flash_attn_ext(
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// the first simdgroup accumulates the results from the other simdgroups
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if (sgitg == 0) {
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for (short j = 0; j < Q; ++j) {
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const half S0 = ss[j*TS + 0];
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const half S1 = ss[j*TS + sg*SH + 0];
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const float S0 = ss[j*TS + 0];
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const float S1 = ss[j*TS + sg*SH + 0];
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const half M0 = ss[j*TS + 1];
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const half M1 = ss[j*TS + sg*SH + 1];
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const float M0 = ss[j*TS + 1];
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const float M1 = ss[j*TS + sg*SH + 1];
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M = max(M0, M1);
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const half ms0 = exp(M0 - M);
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const half ms1 = exp(M1 - M);
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const float ms0 = exp(M0 - M);
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const float ms1 = exp(M1 - M);
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S = S0*ms0 + S1*ms1;
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@ -3646,16 +3646,16 @@ kernel void kernel_flash_attn_ext_vec(
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constexpr short DV4 = DV/4;
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constexpr short NW = N_SIMDWIDTH;
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constexpr short NL = NW/NE; // note: this can be adjusted to support different head sizes and simdgroup work loads
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constexpr short SH = 2*C; // shared memory per simdgroup
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constexpr short SH = 4*C; // shared memory per simdgroup
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const short T = DK + nsg*SH; // shared memory size per query in (half)
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//threadgroup q_t * sq = (threadgroup q_t *) (shmem_f16 + 0*DK); // holds the query data
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threadgroup q4_t * sq4 = (threadgroup q4_t *) (shmem_f16 + 0*DK); // same as above but in q4_t
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threadgroup s_t * ss = (threadgroup s_t *) (shmem_f16 + sgitg*SH + Q*DK); // scratch buffer for attention
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threadgroup s4_t * ss4 = (threadgroup s4_t *) (shmem_f16 + sgitg*SH + Q*DK); // same as above but in s4_t
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threadgroup half * sm = (threadgroup half *) (shmem_f16 + sgitg*SH + C + Q*DK); // scratch buffer for mask
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threadgroup o4_t * sr4 = (threadgroup o4_t *) (shmem_f16 + sgitg*DV + Q*T); // scratch buffer for the results
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//threadgroup q_t * sq = (threadgroup q_t *) (shmem_f16 + 0*DK); // holds the query data
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threadgroup q4_t * sq4 = (threadgroup q4_t *) (shmem_f16 + 0*DK); // same as above but in q4_t
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threadgroup s_t * ss = (threadgroup s_t *) (shmem_f16 + sgitg*SH + Q*DK); // scratch buffer for attention
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threadgroup s4_t * ss4 = (threadgroup s4_t *) (shmem_f16 + sgitg*SH + Q*DK); // same as above but in s4_t
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threadgroup float * sm = (threadgroup float *) (shmem_f16 + sgitg*SH + 2*C + Q*DK); // scratch buffer for mask
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threadgroup o4_t * sr4 = (threadgroup o4_t *) (shmem_f16 + sgitg*DV + Q*T); // scratch buffer for the results
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// store the result for all queries in local memory (the O matrix from the paper)
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o4_t lo[DV4/NL];
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@ -3684,8 +3684,8 @@ kernel void kernel_flash_attn_ext_vec(
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threadgroup_barrier(mem_flags::mem_threadgroup);
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{
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half S = 0.0f;
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half M = -__FLT16_MAX__/2;
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float S = 0.0f;
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float M = -__FLT16_MAX__/2;
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// thread indices inside the simdgroup
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const short tx = tiisg%NL;
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@ -3703,13 +3703,13 @@ kernel void kernel_flash_attn_ext_vec(
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// pointer to the mask
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device const half * pm = (device const half *) (mask + iq1*args.nb31);
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half slope = 1.0f;
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float slope = 1.0f;
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// ALiBi
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if (args.max_bias > 0.0f) {
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const short h = iq2;
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const half base = h < args.n_head_log2 ? args.m0 : args.m1;
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const float base = h < args.n_head_log2 ? args.m0 : args.m1;
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const short exph = h < args.n_head_log2 ? h + 1 : 2*(h - args.n_head_log2) + 1;
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slope = pow(base, exph);
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@ -3799,13 +3799,13 @@ kernel void kernel_flash_attn_ext_vec(
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// online softmax
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{
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const half m = M;
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const half s = ss[tiisg];
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const float m = M;
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const float s = ss[tiisg];
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M = simd_max(max(M, s));
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const half ms = exp(m - M);
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const half vs = exp(s - M);
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const float ms = exp(m - M);
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const float vs = exp(s - M);
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S = S*ms + simd_sum(vs);
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@ -3836,7 +3836,7 @@ kernel void kernel_flash_attn_ext_vec(
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v4_t mv;
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deq_v_t4(pv4 + i/nl_v, i%nl_v, mv);
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lo[ii/NL] += mv*ms;
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lo[ii/NL] += o4_t(float4(mv)*float4(ms));
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}
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}
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}
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@ -3907,18 +3907,18 @@ kernel void kernel_flash_attn_ext_vec(
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// parallel reduce
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for (short r = nsg/2; r > 0; r >>= 1) {
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if (sgitg < r) {
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const half S0 = ss[ 0];
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const half S1 = ss[r*SH + 0];
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const float S0 = ss[ 0];
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const float S1 = ss[r*(SH/2) + 0];
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const half M0 = ss[ 1];
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const half M1 = ss[r*SH + 1];
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const float M0 = ss[ 1];
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const float M1 = ss[r*(SH/2) + 1];
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const half M = max(M0, M1);
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const float M = max(M0, M1);
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const half ms0 = exp(M0 - M);
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const half ms1 = exp(M1 - M);
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const float ms0 = exp(M0 - M);
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const float ms1 = exp(M1 - M);
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const half S = S0*ms0 + S1*ms1;
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const float S = S0*ms0 + S1*ms1;
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if (tiisg == 0) {
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ss[0] = S;
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@ -3950,11 +3950,11 @@ kernel void kernel_flash_attn_ext_vec(
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// in the other (non-vec) kernel, we need s_t to also be float because we scale during the soft_max
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//
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#define FA_TYPES \
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half4, \
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half4, \
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half4, \
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float, \
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half, half4, \
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half4, \
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half4, \
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half4, \
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float, \
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float, float4, \
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half4
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typedef decltype(kernel_flash_attn_ext_vec<FA_TYPES, half4, 1, dequantize_f16_t4, half4, 1, dequantize_f16_t4, 128, 128, 4>) flash_attn_ext_vec_t;
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