Martin Blumenstingl 2683cca592 lantiq: dts: vr9: Add missing properties to the CPU port on the switch ... The CPU port should define the phy-mode and and a PHY phandle or fixed-link to indicate how the CPU port is connected to the SoC's Ethernet controller. On xRX200 this is all internal connection, so use phy-mode = "internal" along with a fixed-link that matches the definition inside &eth0. Linux 6.0 shows a warning since upstream commit e09e9873152e3f ("net: dsa: make phylink-related OF properties mandatory on DSA and CPU ports"). when these properties are missing. Adding the properties before OpenWrt is updated to Linux 6.0 is harmless. Suggested-by: Martin Schiller <ms@dev.tdt.de> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>		2022-10-10 21:51:05 +02:00
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arch/mips/boot/dts/lantiq	lantiq: dts: vr9: Add missing properties to the CPU port on the switch	2022-10-10 21:51:05 +02:00
firmware/lantiq	lantiq: rename gphy firmware	2018-02-20 19:25:17 +01:00