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cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
136 lines
4.7 KiB
Diff
136 lines
4.7 KiB
Diff
From 6f23cfed09dc50e532a5d6a535bb992102d03cab Mon Sep 17 00:00:00 2001
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From: Sandor Yu <Sandor.yu@nxp.com>
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Date: Wed, 27 Nov 2019 19:08:42 +0800
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Subject: [PATCH] LF-94: drm: hdmi: imx: Add hdmi phy video mode valid function
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Add hdmi phy video mode valid function to filter the video modes.
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Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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Reviewed-by: Robby Cai <robby.cai@nxp.com>
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---
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drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c | 8 +++++++-
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drivers/gpu/drm/imx/cdn-mhdp-hdmi-phy.c | 23 +++++++++++++++++++++++
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drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c | 2 ++
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drivers/gpu/drm/imx/cdn-mhdp-phy.h | 2 ++
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include/drm/bridge/cdns-mhdp-common.h | 2 ++
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5 files changed, 36 insertions(+), 1 deletion(-)
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--- a/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c
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+++ b/drivers/gpu/drm/bridge/cadence/cdns-hdmi-core.c
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@@ -352,7 +352,9 @@ static enum drm_mode_status
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cdns_hdmi_bridge_mode_valid(struct drm_bridge *bridge,
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const struct drm_display_mode *mode)
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{
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+ struct cdns_mhdp_device *mhdp = bridge->driver_private;
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enum drm_mode_status mode_status = MODE_OK;
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+ int ret;
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/* We don't support double-clocked and Interlaced modes */
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if (mode->flags & DRM_MODE_FLAG_DBLCLK ||
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@@ -367,6 +369,11 @@ cdns_hdmi_bridge_mode_valid(struct drm_b
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if (mode->hdisplay > 3840 || mode->vdisplay > 2160)
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return MODE_BAD_HVALUE;
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+ mhdp->valid_mode = mode;
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+ ret = cdns_mhdp_plat_call(mhdp, phy_video_valid);
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+ if (ret == false)
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+ return MODE_CLOCK_RANGE;
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+
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return mode_status;
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}
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@@ -375,7 +382,6 @@ static void cdns_hdmi_bridge_mode_set(st
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const struct drm_display_mode *mode)
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{
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struct cdns_mhdp_device *mhdp = bridge->driver_private;
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- struct drm_display_info *display_info = &mhdp->connector.base.display_info;
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struct video_info *video = &mhdp->video_info;
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video->v_sync_polarity = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
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--- a/drivers/gpu/drm/imx/cdn-mhdp-hdmi-phy.c
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+++ b/drivers/gpu/drm/imx/cdn-mhdp-hdmi-phy.c
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@@ -683,6 +683,17 @@ static int hdmi_phy_power_up(struct cdns
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return 0;
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}
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+bool cdns_hdmi_phy_video_valid_imx8mq(struct cdns_mhdp_device *mhdp)
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+{
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+ u32 rate = mhdp->valid_mode->clock;
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+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(imx8mq_ctrl_table); i++)
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+ if(rate == imx8mq_ctrl_table[i].pixel_clk_freq_min)
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+ return true;
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+ return false;
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+}
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+
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int cdns_hdmi_phy_set_imx8mq(struct cdns_mhdp_device *mhdp)
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{
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struct drm_display_mode *mode = &mhdp->mode;
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@@ -711,6 +722,18 @@ int cdns_hdmi_phy_set_imx8mq(struct cdns
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return true;
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}
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+bool cdns_hdmi_phy_video_valid_imx8qm(struct cdns_mhdp_device *mhdp)
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+{
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+ u32 rate = mhdp->valid_mode->clock;
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+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(imx8qm_ctrl_table); i++)
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+ if(rate >= imx8qm_ctrl_table[i].pixel_clk_freq_min &&
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+ rate <= imx8qm_ctrl_table[i].pixel_clk_freq_max)
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+ return true;
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+ return false;
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+}
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+
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int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *mhdp)
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{
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struct drm_display_mode *mode = &mhdp->mode;
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--- a/drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c
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+++ b/drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c
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@@ -58,6 +58,7 @@ static struct cdns_plat_data imx8mq_hdmi
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.bind = cdns_hdmi_bind,
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.unbind = cdns_hdmi_unbind,
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.phy_set = cdns_hdmi_phy_set_imx8mq,
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+ .phy_video_valid = cdns_hdmi_phy_video_valid_imx8mq,
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.bus_type = BUS_TYPE_NORMAL_APB,
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};
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@@ -74,6 +75,7 @@ static struct cdns_plat_data imx8qm_hdmi
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.bind = cdns_hdmi_bind,
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.unbind = cdns_hdmi_unbind,
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.phy_set = cdns_hdmi_phy_set_imx8qm,
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+ .phy_video_valid = cdns_hdmi_phy_video_valid_imx8qm,
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.power_on = cdns_mhdp_power_on_imx8qm,
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.firmware_init = cdns_mhdp_firmware_init_imx8qm,
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.pclk_rate = cdns_mhdp_pclk_rate_imx8qm,
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--- a/drivers/gpu/drm/imx/cdn-mhdp-phy.h
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+++ b/drivers/gpu/drm/imx/cdn-mhdp-phy.h
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@@ -148,6 +148,8 @@
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int cdns_dp_phy_set_imx8mq(struct cdns_mhdp_device *hdp);
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int cdns_dp_phy_set_imx8qm(struct cdns_mhdp_device *hdp);
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+bool cdns_hdmi_phy_video_valid_imx8mq(struct cdns_mhdp_device *hdp);
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+bool cdns_hdmi_phy_video_valid_imx8qm(struct cdns_mhdp_device *hdp);
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int cdns_hdmi_phy_set_imx8mq(struct cdns_mhdp_device *hdp);
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int cdns_hdmi_phy_set_imx8qm(struct cdns_mhdp_device *hdp);
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#endif /* _CDNS_MHDP_PHY_H */
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--- a/include/drm/bridge/cdns-mhdp-common.h
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+++ b/include/drm/bridge/cdns-mhdp-common.h
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@@ -643,6 +643,7 @@ struct cdns_plat_data {
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void (*plat_deinit)(struct cdns_mhdp_device *mhdp);
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int (*phy_set)(struct cdns_mhdp_device *mhdp);
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+ bool (*phy_video_valid)(struct cdns_mhdp_device *mhdp);
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int (*firmware_init)(struct cdns_mhdp_device *mhdp);
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void (*pclk_rate)(struct cdns_mhdp_device *mhdp);
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@@ -675,6 +676,7 @@ struct cdns_mhdp_device {
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struct video_info video_info;
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struct drm_display_mode mode;
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+ const struct drm_display_mode *valid_mode;
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unsigned int fw_version;
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struct drm_dp_mst_topology_mgr mst_mgr;
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