mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 06:33:41 +00:00
4d1515070b
Refreshed patches for all supported targets. Compiled & tested on cns3xxx & imx6 Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
96 lines
2.8 KiB
Diff
96 lines
2.8 KiB
Diff
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -649,6 +649,7 @@
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#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18)
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#define AR933X_BOOTSTRAP_EEPBUSY BIT(4)
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+#define AR933X_BOOTSTRAP_USB_MODE_HOST BIT(3)
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#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
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#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23)
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@@ -678,6 +679,8 @@
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#define QCA956X_BOOTSTRAP_REF_CLK_40 BIT(2)
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+#define AR933X_USB_CONFIG_HOST_ONLY BIT(8)
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+
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#define AR934X_PCIE_WMAC_INT_WMAC_MISC BIT(0)
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#define AR934X_PCIE_WMAC_INT_WMAC_TX BIT(1)
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#define AR934X_PCIE_WMAC_INT_WMAC_RXLP BIT(2)
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--- a/arch/mips/ath79/dev-usb.c
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+++ b/arch/mips/ath79/dev-usb.c
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@@ -19,6 +19,9 @@
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#include <linux/platform_device.h>
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#include <linux/usb/ehci_pdriver.h>
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#include <linux/usb/ohci_pdriver.h>
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+#include <linux/usb/otg.h>
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+#include <linux/usb/chipidea.h>
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+#include <linux/usb/usb_phy_generic.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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@@ -170,6 +173,54 @@ static void __init ar913x_usb_setup(void
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&ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
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}
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+static void __init ar933x_usb_setup_ctrl_config(void)
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+{
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+ void __iomem *usb_ctrl_base, *usb_config_reg;
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+ u32 usb_config;
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+
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+ usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE);
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+ usb_config_reg = usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG;
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+ usb_config = __raw_readl(usb_config_reg);
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+ usb_config &= ~AR933X_USB_CONFIG_HOST_ONLY;
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+ __raw_writel(usb_config, usb_config_reg);
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+ iounmap(usb_ctrl_base);
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+}
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+
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+static void __init ar933x_ci_usb_setup(void)
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+{
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+ u32 bootstrap;
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+ enum usb_dr_mode dr_mode;
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+ struct ci_hdrc_platform_data ci_pdata;
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+ struct platform_device *phy;
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+
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+ bootstrap = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
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+ if (bootstrap & AR933X_BOOTSTRAP_USB_MODE_HOST) {
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+ dr_mode = USB_DR_MODE_HOST;
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+ } else {
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+ dr_mode = USB_DR_MODE_PERIPHERAL;
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+ ar933x_usb_setup_ctrl_config();
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+ }
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+
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+ memset(&ci_pdata, 0, sizeof(ci_pdata));
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+ ci_pdata.name = "ci_hdrc_ar933x";
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+ ci_pdata.capoffset = DEF_CAPOFFSET;
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+ ci_pdata.dr_mode = dr_mode;
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+ ci_pdata.flags = CI_HDRC_DUAL_ROLE_NOT_OTG | CI_HDRC_DP_ALWAYS_PULLUP;
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+ ci_pdata.vbus_extcon.edev = ERR_PTR(-ENODEV);
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+ ci_pdata.id_extcon.edev = ERR_PTR(-ENODEV);
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+ ci_pdata.itc_setting = 1;
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+
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+ /* register a nop PHY */
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+ phy = usb_phy_generic_register();
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+ if (IS_ERR(phy))
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+ return;
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+
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+ ath79_usb_register("ci_hdrc", -1,
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+ AR933X_EHCI_BASE, AR933X_EHCI_SIZE,
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+ ATH79_CPU_IRQ(3),
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+ &ci_pdata, sizeof(ci_pdata));
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+}
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+
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static void __init ar933x_usb_setup(void)
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{
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ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE);
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@@ -185,6 +236,8 @@ static void __init ar933x_usb_setup(void
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AR933X_EHCI_BASE, AR933X_EHCI_SIZE,
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ATH79_CPU_IRQ(3),
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&ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
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+
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+ ar933x_ci_usb_setup();
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}
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static void enable_tx_tx_idp_violation_fix(unsigned base)
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