openwrt/target/linux/ar71xx/patches-4.4/920-usb-chipidea-AR933x-platform-support.patch

--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -649,6 +649,7 @@
 
 #define AR933X_BOOTSTRAP_MDIO_GPIO_EN	BIT(18)
 #define AR933X_BOOTSTRAP_EEPBUSY	BIT(4)
+#define AR933X_BOOTSTRAP_USB_MODE_HOST	BIT(3)
 #define AR933X_BOOTSTRAP_REF_CLK_40	BIT(0)
 
 #define AR934X_BOOTSTRAP_SW_OPTION8	BIT(23)
@@ -678,6 +679,8 @@
 
 #define QCA956X_BOOTSTRAP_REF_CLK_40	BIT(2)
 
+#define AR933X_USB_CONFIG_HOST_ONLY   BIT(8)
+
 #define AR934X_PCIE_WMAC_INT_WMAC_MISC		BIT(0)
 #define AR934X_PCIE_WMAC_INT_WMAC_TX		BIT(1)
 #define AR934X_PCIE_WMAC_INT_WMAC_RXLP		BIT(2)
--- a/arch/mips/ath79/dev-usb.c
+++ b/arch/mips/ath79/dev-usb.c
@@ -19,6 +19,9 @@
 #include <linux/platform_device.h>
 #include <linux/usb/ehci_pdriver.h>
 #include <linux/usb/ohci_pdriver.h>
+#include <linux/usb/otg.h>
+#include <linux/usb/chipidea.h>
+#include <linux/usb/usb_phy_generic.h>
 
 #include <asm/mach-ath79/ath79.h>
 #include <asm/mach-ath79/ar71xx_regs.h>
@@ -170,6 +173,54 @@ static void __init ar913x_usb_setup(void
 			   &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
 }
 
+static void __init ar933x_usb_setup_ctrl_config(void)
+{
+	void __iomem *usb_ctrl_base, *usb_config_reg;
+	u32 usb_config;
+
+	usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE);
+	usb_config_reg = usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG;
+	usb_config = __raw_readl(usb_config_reg);
+	usb_config &= ~AR933X_USB_CONFIG_HOST_ONLY;
+	__raw_writel(usb_config, usb_config_reg);
+	iounmap(usb_ctrl_base);
+}
+
+static void __init ar933x_ci_usb_setup(void)
+{
+	u32 bootstrap;
+	enum usb_dr_mode dr_mode;
+	struct ci_hdrc_platform_data ci_pdata;
+	struct platform_device *phy;
+
+	bootstrap = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
+	if (bootstrap & AR933X_BOOTSTRAP_USB_MODE_HOST) {
+		dr_mode = USB_DR_MODE_HOST;
+	} else {
+		dr_mode = USB_DR_MODE_PERIPHERAL;
+		ar933x_usb_setup_ctrl_config();
+	}
+
+	memset(&ci_pdata, 0, sizeof(ci_pdata));
+	ci_pdata.name = "ci_hdrc_ar933x";
+	ci_pdata.capoffset = DEF_CAPOFFSET;
+	ci_pdata.dr_mode = dr_mode;
+	ci_pdata.flags = CI_HDRC_DUAL_ROLE_NOT_OTG | CI_HDRC_DP_ALWAYS_PULLUP;
+	ci_pdata.vbus_extcon.edev = ERR_PTR(-ENODEV);
+	ci_pdata.id_extcon.edev = ERR_PTR(-ENODEV);
+	ci_pdata.itc_setting = 1;
+
+	/* register a nop PHY */
+	phy = usb_phy_generic_register();
+	if (IS_ERR(phy))
+		return;
+
+	ath79_usb_register("ci_hdrc", -1,
+			   AR933X_EHCI_BASE, AR933X_EHCI_SIZE,
+			   ATH79_CPU_IRQ(3),
+			   &ci_pdata, sizeof(ci_pdata));
+}
+
 static void __init ar933x_usb_setup(void)
 {
 	ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE);
@@ -185,6 +236,8 @@ static void __init ar933x_usb_setup(void
 			   AR933X_EHCI_BASE, AR933X_EHCI_SIZE,
 			   ATH79_CPU_IRQ(3),
 			   &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2));
+
+	ar933x_ci_usb_setup();
 }
 
 static void enable_tx_tx_idp_violation_fix(unsigned base)