openwrt/target
Daniel Golle ecc9d0195b mediatek: mt7988: fix clk for 2nd PCIe port
Due to what seems to be an undocumented oddity in MediaTek's MT7988
SoC design the CLK_INFRA_PCIE_PERI_26M_CK_P2 clock requires
CLK_INFRA_PCIE_PERI_26M_CK_P3 to be enabled.

This currently leads to PCIe port 2 not working in Linux.

Reflect the apparent relationship in the clk driver to make sure PCIe
port 2 of the MT7988 SoC works.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2024-03-11 19:14:14 +00:00
..
imagebuilder Revert "build: align SOURCE path for build system and SDK" 2024-02-12 19:03:17 +00:00
linux mediatek: mt7988: fix clk for 2nd PCIe port 2024-03-11 19:14:14 +00:00
llvm-bpf
sdk tools: add ledumon and ledhwbmon packages 2023-12-12 19:35:03 +01:00
toolchain
Config.in
Makefile build: add $(STAGING_DIR) and $(BIN_DIR) preparation to target and package subdir compile dependencies 2024-03-03 23:13:59 +01:00