mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 17:18:59 +00:00
cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
45 lines
1.3 KiB
Diff
45 lines
1.3 KiB
Diff
From 0d9bc2f22dc418c4573ded86278e55f97d029dca Mon Sep 17 00:00:00 2001
|
|
From: Viorel Suman <viorel.suman@nxp.com>
|
|
Date: Fri, 9 Feb 2018 11:39:58 +0200
|
|
Subject: [PATCH] MLK-17528-3: ASoC: fsl_sai: Set clock rate in "set_sysclk"
|
|
API
|
|
|
|
Set the requested clock rate in "set_sysclk" for specified clock id.
|
|
|
|
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
|
|
Suggested-by: Shengjiu Wang <shengjiu.wang@nxp.com>
|
|
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
|
|
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
|
|
---
|
|
sound/soc/fsl/fsl_sai.c | 19 +++++++++++++++++++
|
|
1 file changed, 19 insertions(+)
|
|
|
|
--- a/sound/soc/fsl/fsl_sai.c
|
|
+++ b/sound/soc/fsl/fsl_sai.c
|
|
@@ -245,6 +245,25 @@ static int fsl_sai_set_dai_sysclk(struct
|
|
return 0;
|
|
}
|
|
|
|
+ if (freq > 0) {
|
|
+ if (clk_id < 0 || clk_id >= FSL_SAI_MCLK_MAX) {
|
|
+ dev_err(cpu_dai->dev, "Unknown clock id: %d\n", clk_id);
|
|
+ return -EINVAL;
|
|
+ }
|
|
+
|
|
+ if (IS_ERR_OR_NULL(sai->mclk_clk[clk_id])) {
|
|
+ dev_err(cpu_dai->dev, "Unassigned clock: %d\n", clk_id);
|
|
+ return -EINVAL;
|
|
+ }
|
|
+
|
|
+ ret = clk_set_rate(sai->mclk_clk[clk_id], freq);
|
|
+ if (ret < 0) {
|
|
+ dev_err(cpu_dai->dev, "failed to set clock rate (%u): %d\n",
|
|
+ freq, ret);
|
|
+ return ret;
|
|
+ }
|
|
+ }
|
|
+
|
|
ret = fsl_sai_set_dai_sysclk_tr(cpu_dai, clk_id, freq,
|
|
FSL_FMT_TRANSMITTER);
|
|
if (ret) {
|