mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 15:32:33 +00:00
cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
36 lines
1.3 KiB
Diff
36 lines
1.3 KiB
Diff
From 8e515a39805c013229698e1a142e16701f07edf9 Mon Sep 17 00:00:00 2001
|
|
From: Alex Marginean <alexandru.marginean@nxp.com>
|
|
Date: Tue, 7 Jan 2020 16:50:31 +0200
|
|
Subject: [PATCH] drivers: net: phy: don't crash in phy_read/_write_mmd without
|
|
a PHY driver
|
|
|
|
The APIs can be used by Ethernet drivers to configure internal PHYs
|
|
without actually loading a PHY driver. Check that drv is not NULL before
|
|
reading from it.
|
|
|
|
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
|
|
---
|
|
drivers/net/phy/phy-core.c | 4 ++--
|
|
1 file changed, 2 insertions(+), 2 deletions(-)
|
|
|
|
--- a/drivers/net/phy/phy-core.c
|
|
+++ b/drivers/net/phy/phy-core.c
|
|
@@ -379,7 +379,7 @@ int __phy_read_mmd(struct phy_device *ph
|
|
if (regnum > (u16)~0 || devad > 32)
|
|
return -EINVAL;
|
|
|
|
- if (phydev->drv->read_mmd) {
|
|
+ if (phydev->drv && phydev->drv->read_mmd) {
|
|
val = phydev->drv->read_mmd(phydev, devad, regnum);
|
|
} else if (phydev->is_c45) {
|
|
u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff);
|
|
@@ -436,7 +436,7 @@ int __phy_write_mmd(struct phy_device *p
|
|
if (regnum > (u16)~0 || devad > 32)
|
|
return -EINVAL;
|
|
|
|
- if (phydev->drv->write_mmd) {
|
|
+ if (phydev->drv && phydev->drv->write_mmd) {
|
|
ret = phydev->drv->write_mmd(phydev, devad, regnum, val);
|
|
} else if (phydev->is_c45) {
|
|
u32 addr = MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff);
|