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cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
57 lines
1.9 KiB
Diff
57 lines
1.9 KiB
Diff
From ebfedac745f6d747df2214e11a89ba44742b3def Mon Sep 17 00:00:00 2001
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From: Alex Marginean <alexandru.marginean@nxp.com>
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Date: Fri, 27 Dec 2019 21:44:46 +0200
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Subject: [PATCH] net: phy: vsc8514: enable in-band SGMII auto-negotiation
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setting
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The default in-band AN setting for the VSC8514 PHY is not very reliable:
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its out-of-reset state is with SerDes AN disabled, but certain boot
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firmware (such as U-Boot) enables it during the boot process.
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So its final state as seen by Linux depends on whether the U-Boot PHY
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driver has run or not.
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If SGMII auto-negotiation is enabled but not acknowledged by the MAC,
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the PHY does not pass traffic.
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But otherwise, it is able to pass traffic both with AN disabled, and
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with AN enabled.
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We would like to make this explicitly configurable rather than hardcoded
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as "on" as we are doing right now, but we'd rather hardcode it in LSDK
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and wait until a solution lands upstream, than invent a solution for
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this here.
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Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
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Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
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---
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drivers/net/phy/mscc.c | 10 ++++++++++
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1 file changed, 10 insertions(+)
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--- a/drivers/net/phy/mscc.c
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+++ b/drivers/net/phy/mscc.c
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@@ -176,6 +176,8 @@ enum rgmii_rx_clock_delay {
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#define SECURE_ON_PASSWD_LEN_4 0x4000
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/* Extended Page 3 Registers */
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+#define MSCC_PHY_SERDES_CON 16
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+#define MSCC_PHY_SERDES_ANEG BIT(7)
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#define MSCC_PHY_SERDES_TX_VALID_CNT 21
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#define MSCC_PHY_SERDES_TX_CRC_ERR_CNT 22
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#define MSCC_PHY_SERDES_RX_VALID_CNT 28
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@@ -2131,6 +2133,14 @@ static int vsc8514_config_init(struct ph
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mutex_unlock(&phydev->mdio.bus->mdio_lock);
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+ ret = phy_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_EXTENDED_3);
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+ if (ret)
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+ return ret;
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+
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+ ret = phy_set_bits(phydev, MSCC_PHY_SERDES_CON, MSCC_PHY_SERDES_ANEG);
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+ if (ret)
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+ return ret;
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+
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ret = phy_write(phydev, MSCC_EXT_PAGE_ACCESS, MSCC_PHY_PAGE_STANDARD);
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if (ret)
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