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b18fe2ecc4
Some patches were slightly cleaned up. One things worth mentioning is
that adding:
phy-mode = "rgmii"
broke SF2 driver. It made it access random register breaking switch
setup.
That's why this commit also adds a quick sf2 fix.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 05dbfe616d)
135 lines
3.1 KiB
Diff
135 lines
3.1 KiB
Diff
From 3c321ba794ca6383a4aa68ea803e18cc6ad44412 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Fri, 19 Feb 2021 06:50:26 +0100
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Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe USB PHY
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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BCM4908 uses slightly modified STB family USB PHY. It handles OHCI/EHCI
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and XHCI. It requires powering up using the PMB.
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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.../bcm4908/bcm4906-netgear-r8000p.dts | 17 +++++++++++++
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.../bcm4908/bcm4908-asus-gt-ac5300.dts | 17 +++++++++++++
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.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 25 ++++++++++++++++---
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3 files changed, 55 insertions(+), 4 deletions(-)
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--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
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+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
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@@ -26,6 +26,23 @@
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};
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};
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+&usb_phy {
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+ brcm,ioc = <1>;
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+ status = "okay";
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+};
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+
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+&ehci {
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+ status = "okay";
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+};
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+
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+&ohci {
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+ status = "okay";
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+};
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+
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+&xhci {
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+ status = "okay";
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+};
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+
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&nandcs {
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
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+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
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@@ -44,6 +44,23 @@
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};
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};
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+&usb_phy {
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+ brcm,ioc = <1>;
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+ status = "okay";
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+};
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+
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+&ehci {
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+ status = "okay";
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+};
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+
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+&ohci {
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+ status = "okay";
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+};
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+
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+&xhci {
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+ status = "okay";
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+};
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+
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&ports {
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port@0 {
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label = "lan2";
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--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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@@ -2,6 +2,8 @@
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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+#include <dt-bindings/phy/phy.h>
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+#include <dt-bindings/soc/bcm-pmb.h>
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/dts-v1/;
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@@ -110,24 +112,39 @@
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#size-cells = <1>;
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ranges = <0x00 0x00 0x80000000 0x281000>;
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- usb@c300 {
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+ usb_phy: usb-phy@c200 {
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+ compatible = "brcm,bcm4908-usb-phy";
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+ reg = <0xc200 0x100>;
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+ reg-names = "ctrl";
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+ power-domains = <&pmb BCM_PMB_HOST_USB>;
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+ dr_mode = "host";
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+ brcm,has-xhci;
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+ brcm,has-eohci;
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+ #phy-cells = <1>;
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+ status = "disabled";
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+ };
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+
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+ ehci: usb@c300 {
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compatible = "generic-ehci";
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reg = <0xc300 0x100>;
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
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+ phys = <&usb_phy PHY_TYPE_USB2>;
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status = "disabled";
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};
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- usb@c400 {
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+ ohci: usb@c400 {
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compatible = "generic-ohci";
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reg = <0xc400 0x100>;
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interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
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+ phys = <&usb_phy PHY_TYPE_USB2>;
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status = "disabled";
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};
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- usb@d000 {
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+ xhci: usb@d000 {
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compatible = "generic-xhci";
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reg = <0xd000 0x8c8>;
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interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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+ phys = <&usb_phy PHY_TYPE_USB3>;
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status = "disabled";
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};
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@@ -222,7 +239,7 @@
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#address-cells = <1>;
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#size-cells = <1>;
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- power-controller@2800c0 {
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+ pmb: power-controller@2800c0 {
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compatible = "brcm,bcm4908-pmb";
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reg = <0x2800c0 0x40>;
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#power-domain-cells = <1>;
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