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bcm4908: use accepted 5.13 DTS patches

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Some patches were slightly cleaned up. One things worth mentioning is
that adding:
phy-mode = "rgmii"
broke SF2 driver. It made it access random register breaking switch
setup.

That's why this commit also adds a quick sf2 fix.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
(cherry picked from commit 05dbfe616d551bce1a19d3846c8949c047325624)
This commit is contained in:
Rafał Miłecki 2021-03-14 19:22:18 +01:00
parent 6a217d6d72
commit b18fe2ecc4
12 changed files with 238 additions and 50 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
target/linux/bcm4908/patches-5.4/031-v5.12-0005-arm64-dts-broadcom-bcm4908-describe-internal-switch.patch
View File

@ -1,4 +1,4 @@
From 961c38974fa5b34d6232d7485120e4392d279ab4 Mon Sep 17 00:00:00 2001
From 527a3ac9bdf81da4b7160ce3cea57f28a0e5eb64 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 13 Jan 2021 12:14:06 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe internal switch
@ -58,22 +58,22 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+
+&mdio {
+ /* lan8 */
+ phy@0 {
+ ethernet-phy@0 {
+ reg = <0>;
+ };
+
+ /* lan7 */
+ phy@1 {
+ ethernet-phy@1 {
+ reg = <1>;
+ };
+
+ /* lan4 */
+ phy@2 {
+ ethernet-phy@2 {
+ reg = <2>;
+ };
+
+ /* lan3 */
+ phy@3 {
+ ethernet-phy@3 {
+ reg = <3>;
+ };
+};
@ -97,13 +97,13 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
status = "disabled";
};
+
+ switch@80000 {
+ ethernet-switch@80000 {
+ compatible = "simple-bus";
+ #size-cells = <1>;
+ #address-cells = <1>;
+ ranges = <0 0x80000 0x50000>;
+
+ switch@0 {
+ ethernet-switch@0 {
+ compatible = "brcm,bcm4908-switch";
+ reg = <0x0 0x40000>,
+ <0x40000 0x110>,
@ -155,26 +155,26 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+ compatible = "brcm,unimac-mdio";
+ reg = <0x405c0 0x8>;
+ reg-names = "mdio";
+ #size-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #address-cells = <1>;
+
+ phy8: phy@8 {
+ phy8: ethernet-phy@8 {
+ reg = <8>;
+ };
+
+ phy9: phy@9 {
+ phy9: ethernet-phy@9 {
+ reg = <9>;
+ };
+
+ phy10: phy@a {
+ phy10: ethernet-phy@a {
+ reg = <10>;
+ };
+
+ phy11: phy@b {
+ phy11: ethernet-phy@b {
+ reg = <11>;
+ };
+
+ phy12: phy@c {
+ phy12: ethernet-phy@c {
+ reg = <12>;
+ };
+ };

6
target/linux/bcm4908/patches-5.4/130-0001-arm64-dts-broadcom-bcm4908-describe-USB-PHY.patch → target/linux/bcm4908/patches-5.4/032-v5.13-0001-arm64-dts-broadcom-bcm4908-describe-USB-PHY.patch
View File

@ -1,5 +1,6 @@
From 3c321ba794ca6383a4aa68ea803e18cc6ad44412 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Feb 2021 19:46:54 +0100
Date: Fri, 19 Feb 2021 06:50:26 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe USB PHY
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@ -9,6 +10,7 @@ BCM4908 uses slightly modified STB family USB PHY. It handles OHCI/EHCI
and XHCI. It requires powering up using the PMB.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../bcm4908/bcm4906-netgear-r8000p.dts | 17 +++++++++++++
.../bcm4908/bcm4908-asus-gt-ac5300.dts | 17 +++++++++++++
@ -86,7 +88,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+ usb_phy: usb-phy@c200 {
+ compatible = "brcm,bcm4908-usb-phy";
+ reg = <0xc200 0x100>;
+ reg-names = "crtl";
+ reg-names = "ctrl";
+ power-domains = <&pmb BCM_PMB_HOST_USB>;
+ dr_mode = "host";
+ brcm,has-xhci;

11
target/linux/bcm4908/patches-5.4/130-0002-arm64-dts-broadcom-bcm4908-describe-Ethernet-control.patch → target/linux/bcm4908/patches-5.4/032-v5.13-0002-arm64-dts-broadcom-bcm4908-describe-Ethernet-control.patch
View File

@ -1,5 +1,6 @@
From b1bbe48eec190b6a35f400c5a3ec6b0fc8fc3fe6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Feb 2021 19:51:26 +0100
Date: Fri, 19 Feb 2021 06:50:27 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe Ethernet controller
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@ -8,9 +9,10 @@ Content-Transfer-Encoding: 8bit
BCM4908 SoCs have an integrated Ethernet controller.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@ -29,7 +31,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
usb_phy: usb-phy@c200 {
compatible = "brcm,bcm4908-usb-phy";
reg = <0xc200 0x100>;
@@ -199,6 +207,18 @@
@@ -199,6 +207,17 @@
phy-mode = "internal";
phy-handle = <&phy11>;
};
@ -38,7 +40,6 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+ reg = <8>;
+ phy-mode = "internal";
+ ethernet = <&enet>;
+ brcm,use-bcm-hdr;
+
+ fixed-link {
+ speed = <1000>;

4
target/linux/bcm4908/patches-5.4/130-0003-arm64-dts-broadcom-bcm4908-describe-Netgear-R8000P-s.patch → target/linux/bcm4908/patches-5.4/032-v5.13-0003-arm64-dts-broadcom-bcm4908-describe-Netgear-R8000P-s.patch
View File

@ -1,5 +1,6 @@
From 406e98afffe975982f63ea5d21bf9a47a81b56ee Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Feb 2021 19:52:58 +0100
Date: Fri, 19 Feb 2021 06:50:28 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe Netgear R8000P switch
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@ -8,6 +9,7 @@ Content-Transfer-Encoding: 8bit
R8000P model has 4 LAN ports and 1 WAN port.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../bcm4908/bcm4906-netgear-r8000p.dts | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)

27
target/linux/bcm4908/patches-5.4/130-0004-arm64-dts-broadcom-bcm4908-add-remaining-Netgear-R80.patch → target/linux/bcm4908/patches-5.4/032-v5.13-0004-arm64-dts-broadcom-bcm4908-add-remaining-Netgear-R80.patch
View File

@ -1,5 +1,6 @@
From 6224415c0389ba6661825746312163a64ece8f3a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Feb 2021 20:05:41 +0100
Date: Fri, 19 Feb 2021 06:50:29 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add remaining Netgear R8000P
LEDs
MIME-Version: 1.0
@ -10,9 +11,10 @@ There are a few more GPIO connected LEDs there didn't get described
initially.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../bcm4908/bcm4906-netgear-r8000p.dts | 48 +++++++++++++++++++
1 file changed, 48 insertions(+)
.../bcm4908/bcm4906-netgear-r8000p.dts | 50 ++++++++++++++++++-
1 file changed, 49 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
@ -20,55 +22,56 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
leds {
compatible = "gpio-leds";
+ power-white {
- wps {
+ led-power-white {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+ };
+
+ power-amber {
+ led-power-amber {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_AMBER>;
+ gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+ };
+
wps {
+ led-wps {
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_WHITE>;
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
};
+
+ 2ghz {
+ led-2ghz {
+ function = "2ghz";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+ };
+
+ 5ghz-1 {
+ led-5ghz-1 {
+ function = "5ghz-1";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ };
+
+ 5ghz-2 {
+ led-5ghz-2 {
+ function = "5ghz-2";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+ };
+
+ usb2 {
+ led-usb2 {
+ function = "usb2";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+ };
+
+ usb3 {
+ led-usb3 {
+ function = "usb3";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+ };
+
+ wifi {
+ led-wifi {
+ function = "wifi";
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 56 GPIO_ACTIVE_LOW>;

4
target/linux/bcm4908/patches-5.4/130-0005-arm64-dts-broadcom-bcm4908-describe-firmware-partiti.patch → target/linux/bcm4908/patches-5.4/032-v5.13-0005-arm64-dts-broadcom-bcm4908-describe-firmware-partiti.patch
View File

@ -1,5 +1,6 @@
From cbaca2c467dc25a163107e14a53b7925214eab17 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Feb 2021 20:30:09 +0100
Date: Fri, 19 Feb 2021 06:50:30 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: describe firmware partitions
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@ -9,6 +10,7 @@ BCM4908 bootloader supports multiple firmware partitions and has its own
bindings defined for them.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts | 1 +
.../dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 12 +++++++++++-

30
target/linux/bcm4908/patches-5.4/032-v5.13-0006-arm64-dts-broadcom-bcm4908-fix-switch-parent-node-na.patch Normal file
View File

@ -0,0 +1,30 @@
From a348ff97ffb840b9d74b0e64b3e0e6002187d224 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 9 Mar 2021 19:44:09 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: fix switch parent node name
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Ethernet switch and MDIO are grouped using "simple-bus". It's not
allowed to use "ethernet-switch" node name as it isn't a switch. Replace
it with "bus".
Fixes: 527a3ac9bdf8 ("arm64: dts: broadcom: bcm4908: describe internal switch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -156,7 +156,7 @@
status = "disabled";
};
- ethernet-switch@80000 {
+ bus@80000 {
compatible = "simple-bus";
#size-cells = <1>;
#address-cells = <1>;

8
target/linux/bcm4908/patches-5.4/131-0001-dt-bindings-arm-bcm-document-TP-Link-Archer-C2300-bi.patch → target/linux/bcm4908/patches-5.4/032-v5.13-0007-dt-bindings-arm-bcm-document-TP-Link-Archer-C2300-bi.patch
View File

@ -1,10 +1,16 @@
From b3de2a12d1a61d90a4d86c9840acc7d05066137f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 5 Mar 2021 13:34:03 +0100
Date: Wed, 10 Mar 2021 08:46:02 +0100
Subject: [PATCH] dt-bindings: arm: bcm: document TP-Link Archer C2300 binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
One more BCM4906 based device.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
Documentation/devicetree/bindings/arm/bcm/brcm,bcm4908.yaml | 1 +
1 file changed, 1 insertion(+)

31
target/linux/bcm4908/patches-5.4/131-0002-arm64-dts-broadcom-bcm4908-add-TP-Link-Archer-C2300-.patch → target/linux/bcm4908/patches-5.4/032-v5.13-0008-arm64-dts-broadcom-bcm4908-add-TP-Link-Archer-C2300-.patch
View File

@ -1,12 +1,17 @@
From 6a30934a5470a0ce7ea32b0c6b600accfae94b1a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 5 Mar 2021 13:36:25 +0100
Date: Wed, 10 Mar 2021 08:46:03 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add TP-Link Archer C2300 V1
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Archer C2300 V1 is a home router based on the BCM4906 (2 CPU cores). It
has 512 MiB of RAM, NAND flash, USB 2.0 and USB 3.0 ports, 4 LAN ports,
1 WAN port.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 1 +
.../bcm4906-tplink-archer-c2300-v1.dts | 182 ++++++++++++++++++
@ -43,61 +48,61 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+ leds {
+ compatible = "gpio-leds";
+
+ power-white {
+ led-power {
+ function = LED_FUNCTION_POWER;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+ };
+
+ 2ghz {
+ led-2ghz {
+ function = "2ghz";
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+ };
+
+ 5ghz {
+ led-5ghz {
+ function = "5ghz";
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+ };
+
+ wan-amber {
+ led-wan-amber {
+ function = LED_FUNCTION_WAN;
+ color = <LED_COLOR_ID_AMBER>;
+ gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+ };
+
+ wan-blue {
+ led-wan-blue {
+ function = LED_FUNCTION_WAN;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
+ };
+
+ lan {
+ led-lan {
+ function = LED_FUNCTION_LAN;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
+ };
+
+ wps {
+ led-wps {
+ function = LED_FUNCTION_WPS;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+ };
+
+ usb-high-white {
+ function = "usbup";
+ led-usb2 {
+ function = "usb2";
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ };
+
+ usb-low-white {
+ function = "usbdown";
+ led-usb3 {
+ function = "usbd3";
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+ };
+
+ brightness {
+ led-brightness {
+ function = LED_FUNCTION_BACKLIGHT;
+ color = <LED_COLOR_ID_WHITE>;
+ gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;

28
target/linux/bcm4908/patches-5.4/032-v5.13-0009-arm64-dts-broadcom-bcm4908-set-Asus-GT-AC5300-port-7.patch Normal file
View File

@ -0,0 +1,28 @@
From 5ccb9f9cf05bbd729430c6d6d30d40c96a15c56a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 12 Mar 2021 12:01:20 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: set Asus GT-AC5300 port 7 PHY
mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Port 7 is connected to the external BCM53134S switch using RGMII.
Fixes: 527a3ac9bdf8 ("arm64: dts: broadcom: bcm4908: describe internal switch")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 1 +
1 file changed, 1 insertion(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
@@ -82,6 +82,7 @@
port@7 {
label = "sw";
reg = <7>;
+ phy-mode = "rgmii";
fixed-link {
speed = <1000>;

2
target/linux/bcm4908/patches-5.4/300-arm64-dts-broadcom-bcm4908-limit-amount-of-GPIOs.patch
View File

@ -12,7 +12,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
@@ -281,7 +281,7 @@
@@ -280,7 +280,7 @@
gpio0: gpio-controller@500 {
compatible = "brcm,bcm6345-gpio";
reg-names = "dirout", "dat";

109
target/linux/bcm4908/patches-5.4/702-net-dsa-bcm_sf2-quick-fix-for-RGMII-reg-access-on-BC.patch Normal file
View File

@ -0,0 +1,109 @@
From 7e2dc41c745f6d9c571919d98abed2d783fce8fb Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Sun, 14 Mar 2021 22:43:32 +0100
Subject: [PATCH] net: dsa: bcm_sf2: quick fix for RGMII reg access on BCM4908
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM4908 has only 1 RGMII register and it's used for port 7.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/net/dsa/bcm_sf2.c | 30 +++++++++++++++++++++++-------
drivers/net/dsa/bcm_sf2_regs.h | 1 +
2 files changed, 24 insertions(+), 7 deletions(-)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -543,10 +543,19 @@ static void bcm_sf2_sw_mac_config(struct
struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
u32 id_mode_dis = 0, port_mode;
u32 reg, offset;
+ u32 rgmii_ctrl;
if (port == core_readl(priv, CORE_IMP0_PRT_ID))
return;
+ if (priv->type == BCM4908_DEVICE_ID) {
+ if (port != 7)
+ return;
+ rgmii_ctrl = REG_RGMII_11_CNTRL;
+ } else {
+ rgmii_ctrl = REG_RGMII_CNTRL_P(port);
+ }
+
if (priv->type == BCM4908_DEVICE_ID ||
priv->type == BCM7445_DEVICE_ID)
offset = CORE_STS_OVERRIDE_GMIIP_PORT(port);
@@ -574,7 +583,7 @@ static void bcm_sf2_sw_mac_config(struct
/* Clear id_mode_dis bit, and the existing port mode, let
* RGMII_MODE_EN bet set by mac_link_{up,down}
*/
- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port));
+ reg = reg_readl(priv, rgmii_ctrl);
reg &= ~ID_MODE_DIS;
reg &= ~(PORT_MODE_MASK << PORT_MODE_SHIFT);
reg &= ~(RX_PAUSE_EN | TX_PAUSE_EN);
@@ -589,7 +598,7 @@ static void bcm_sf2_sw_mac_config(struct
reg |= RX_PAUSE_EN;
}
- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port));
+ reg_writel(priv, reg, rgmii_ctrl);
force_link:
/* Force link settings detected from the PHY */
@@ -615,6 +624,7 @@ static void bcm_sf2_sw_mac_link_set(stru
phy_interface_t interface, bool link)
{
struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
+ u32 rgmii_ctrl;
u32 reg;
if (!phy_interface_mode_is_rgmii(interface) &&
@@ -622,13 +632,21 @@ static void bcm_sf2_sw_mac_link_set(stru
interface != PHY_INTERFACE_MODE_REVMII)
return;
+ if (priv->type == BCM4908_DEVICE_ID) {
+ if (port != 7)
+ return;
+ rgmii_ctrl = REG_RGMII_11_CNTRL;
+ } else {
+ rgmii_ctrl = REG_RGMII_CNTRL_P(port);
+ }
+
/* If the link is down, just disable the interface to conserve power */
- reg = reg_readl(priv, REG_RGMII_CNTRL_P(port));
+ reg = reg_readl(priv, rgmii_ctrl);
if (link)
reg |= RGMII_MODE_EN;
else
reg &= ~RGMII_MODE_EN;
- reg_writel(priv, reg, REG_RGMII_CNTRL_P(port));
+ reg_writel(priv, reg, rgmii_ctrl);
}
static void bcm_sf2_sw_mac_link_down(struct dsa_switch *ds, int port,
@@ -999,9 +1017,7 @@ static const u16 bcm_sf2_4908_reg_offset
[REG_PHY_REVISION] = 0x14,
[REG_SPHY_CNTRL] = 0x24,
[REG_CROSSBAR] = 0xc8,
- [REG_RGMII_0_CNTRL] = 0xe0,
- [REG_RGMII_1_CNTRL] = 0xec,
- [REG_RGMII_2_CNTRL] = 0xf8,
+ [REG_RGMII_11_CNTRL] = 0x014c,
[REG_LED_0_CNTRL] = 0x40,
[REG_LED_1_CNTRL] = 0x4c,
[REG_LED_2_CNTRL] = 0x58,
--- a/drivers/net/dsa/bcm_sf2_regs.h
+++ b/drivers/net/dsa/bcm_sf2_regs.h
@@ -21,6 +21,7 @@ enum bcm_sf2_reg_offs {
REG_RGMII_0_CNTRL,
REG_RGMII_1_CNTRL,
REG_RGMII_2_CNTRL,
+ REG_RGMII_11_CNTRL,
REG_LED_0_CNTRL,
REG_LED_1_CNTRL,
REG_LED_2_CNTRL,