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c60dd7bef9
The patches in the ath79 target have not been sorted for a long time and they are very chaotic now. This patch sorts them again according to the OpenWrt naming rules[1], so that we can better manage them. [1] https://openwrt.org/docs/guide-developer/toolchain/use-patches-with-buildsystem#naming_patches Signed-off-by: Shiji Yang <yangshiji66@qq.com>
63 lines
2.0 KiB
Diff
63 lines
2.0 KiB
Diff
From ebe33e5a98dcf14a9630845f3f10c193584ac054 Mon Sep 17 00:00:00 2001
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From: Oskari Lemmela <oskari@lemmela.net>
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Date: Wed, 22 Dec 2021 07:59:57 +0200
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Subject: [PATCH] spi: ar934x: fix transfer size
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If bits_per_word is configured, transfer only word amount
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of data per iteration.
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Signed-off-by: Oskari Lemmela <oskari@lemmela.net>
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Link: https://lore.kernel.org/r/20211222055958.1383233-2-oskari@lemmela.net
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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drivers/spi/spi-ar934x.c | 16 +++++++++++-----
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1 file changed, 11 insertions(+), 5 deletions(-)
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--- a/drivers/spi/spi-ar934x.c
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+++ b/drivers/spi/spi-ar934x.c
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@@ -82,7 +82,7 @@ static int ar934x_spi_transfer_one_messa
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struct spi_device *spi = m->spi;
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unsigned long trx_done, trx_cur;
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int stat = 0;
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- u8 term = 0;
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+ u8 bpw, term = 0;
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int div, i;
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u32 reg;
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const u8 *tx_buf;
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@@ -90,6 +90,11 @@ static int ar934x_spi_transfer_one_messa
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m->actual_length = 0;
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list_for_each_entry(t, &m->transfers, transfer_list) {
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+ if (t->bits_per_word >= 8 && t->bits_per_word < 32)
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+ bpw = t->bits_per_word >> 3;
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+ else
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+ bpw = 4;
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+
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if (t->speed_hz)
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div = ar934x_spi_clk_div(sp, t->speed_hz);
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else
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@@ -105,10 +110,10 @@ static int ar934x_spi_transfer_one_messa
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iowrite32(reg, sp->base + AR934X_SPI_REG_CTRL);
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iowrite32(0, sp->base + AR934X_SPI_DATAOUT);
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- for (trx_done = 0; trx_done < t->len; trx_done += 4) {
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+ for (trx_done = 0; trx_done < t->len; trx_done += bpw) {
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trx_cur = t->len - trx_done;
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- if (trx_cur > 4)
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- trx_cur = 4;
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+ if (trx_cur > bpw)
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+ trx_cur = bpw;
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else if (list_is_last(&t->transfer_list, &m->transfers))
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term = 1;
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@@ -193,7 +198,8 @@ static int ar934x_spi_probe(struct platf
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ctlr->mode_bits = SPI_LSB_FIRST;
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ctlr->setup = ar934x_spi_setup;
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ctlr->transfer_one_message = ar934x_spi_transfer_one_message;
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- ctlr->bits_per_word_mask = SPI_BPW_MASK(8);
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+ ctlr->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(24) |
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+ SPI_BPW_MASK(16) | SPI_BPW_MASK(8);
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ctlr->dev.of_node = pdev->dev.of_node;
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ctlr->num_chipselect = 3;
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