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5e86877f36
The TL-WR841ND v8 feature a WiFi switch instead of a button.
This adds the corresponding input-type to prevent booting into
failsafe regularly.
This has been defined correctly in ar71xx, but was overlooked
when migrating to ath79. In contrast, the TL-WR842ND v2, which
has the key set up as switch in ar71xx, actually has a button.
The TL-MR3420 v2 has a button as well and is set up correctly
for both targets. (Information based on TP-Link user guide)
Note:
While looking into this, I found that support PR for TL-MR3420 v2
switched reset button to ACTIVE_HIGH. However, the other two
device still use ACTIVE_LOW. This seems strange, but I cannot
verify it lacking the affected devices.
Fixes: FS#2733
Fixes: 9601d94138 ("add support for TP-Link TL-WR841N/ND v8")
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
102 lines
1.6 KiB
Plaintext
102 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include "ar9341_tplink.dtsi"
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/ {
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model = "TP-Link TL-WR842N/ND v2";
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compatible = "tplink,tl-wr842n-v2", "qca,ar9341";
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keys {
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compatible = "gpio-keys";
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rfkill {
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label = "WiFi";
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linux,code = <KEY_RFKILL>;
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gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
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debounce-interval = <60>;
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};
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reset {
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label = "Reset";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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gpio-export {
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compatible = "gpio-export";
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gpio_usb_power {
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gpio-export,name = "tp-link:power:usb";
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gpio-export,output = <1>;
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gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&leds {
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usb {
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label = "tp-link:green:usb";
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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trigger-sources = <&hub_port>;
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linux,default-trigger = "usbport";
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};
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};
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&spi {
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status = "okay";
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num-cs = <1>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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uboot: partition@0 {
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label = "u-boot";
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reg = <0x000000 0x020000>;
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read-only;
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};
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partition@20000 {
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compatible = "tplink,firmware";
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label = "firmware";
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reg = <0x020000 0x7d0000>;
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};
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art: partition@7f0000 {
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label = "art";
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reg = <0x7f0000 0x010000>;
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read-only;
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};
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};
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};
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};
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&usb {
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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hub_port: port@1 {
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reg = <1>;
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#trigger-source-cells = <0>;
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};
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};
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&usb_phy {
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status = "okay";
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};
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ð1 {
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phy-handle = <&swphy4>;
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};
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