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6bbb75dfdc
bmips has all the dt-bindings includes inside each SoC .dtsi files, so let's move the new includes there instead of adding them to each board .dts files. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
244 lines
3.4 KiB
Plaintext
244 lines
3.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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#include "bcm63268.dtsi"
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/ {
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model = "Comtrend VR-3032u";
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compatible = "comtrend,vr-3032u", "brcm,bcm63168", "brcm,bcm63268";
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aliases {
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led-boot = &led_power_green;
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led-failsafe = &led_power_green;
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led-running = &led_power_green;
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led-upgrade = &led_power_green;
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <100>;
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reset {
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label = "reset";
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gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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debounce-interval = <60>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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debounce-interval = <60>;
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};
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};
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};
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&ehci {
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status = "okay";
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};
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ðernet {
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status = "okay";
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nvmem-cells = <&macaddr_cferom_6a0>;
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nvmem-cell-names = "mac-address";
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};
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&leds {
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status = "okay";
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brcm,serial-leds;
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brcm,serial-dat-low;
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brcm,serial-shift-inv;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_serial_led>;
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led@0 {
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/* GPHY0 Spd 0 */
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reg = <0>;
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brcm,hardware-controlled;
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brcm,link-signal-sources = <0>;
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};
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led@1 {
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/* GPHY0 Spd 1 */
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reg = <1>;
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brcm,hardware-controlled;
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brcm,link-signal-sources = <1>;
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};
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led@2 {
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reg = <2>;
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active-low;
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label = "red:internet";
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};
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led@3 {
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reg = <3>;
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active-low;
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label = "green:dsl";
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};
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led@4 {
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reg = <4>;
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active-low;
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function = LED_FUNCTION_USB;
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color = <LED_COLOR_ID_GREEN>;
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};
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led@7 {
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reg = <7>;
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active-low;
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function = LED_FUNCTION_WPS;
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color = <LED_COLOR_ID_GREEN>;
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};
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led@8 {
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reg = <8>;
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active-low;
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label = "green:internet";
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};
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led@9 {
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/* EPHY0 Act */
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reg = <9>;
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brcm,hardware-controlled;
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};
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led@10 {
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/* EPHY1 Act */
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reg = <10>;
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brcm,hardware-controlled;
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};
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led@11 {
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/* EPHY2 Act */
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reg = <11>;
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brcm,hardware-controlled;
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};
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led@12 {
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/* GPHY0 Act */
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reg = <12>;
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brcm,hardware-controlled;
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};
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led@13 {
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/* EPHY0 Spd */
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reg = <13>;
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brcm,hardware-controlled;
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};
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led@14 {
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/* EPHY1 Spd */
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reg = <14>;
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brcm,hardware-controlled;
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};
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led@15 {
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/* EPHY2 Spd */
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reg = <15>;
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brcm,hardware-controlled;
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};
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led_power_green: led@20 {
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reg = <20>;
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active-low;
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_GREEN>;
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};
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};
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&nflash {
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status = "okay";
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nandcs@0 {
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compatible = "brcm,nandcs";
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reg = <0>;
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nand-ecc-step-size = <512>;
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nand-ecc-strength = <15>;
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nand-on-flash-bbt;
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brcm,nand-oob-sector-size = <64>;
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#address-cells = <1>;
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#size-cells = <1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "cferom";
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reg = <0x0000000 0x0020000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_cferom_6a0: macaddr@6a0 {
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reg = <0x6a0 0x6>;
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};
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};
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};
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partition@20000 {
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compatible = "brcm,wfi-split";
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label = "wfi";
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reg = <0x0020000 0x7ac0000>;
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};
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};
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};
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};
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&ohci {
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status = "okay";
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};
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&switch0 {
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ports {
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port@0 {
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reg = <0>;
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label = "lan2";
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phy-handle = <&phy1>;
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phy-mode = "mii";
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};
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port@1 {
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reg = <1>;
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label = "lan3";
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phy-handle = <&phy2>;
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phy-mode = "mii";
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};
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port@2 {
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reg = <2>;
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label = "lan4";
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phy-handle = <&phy3>;
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phy-mode = "mii";
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};
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port@3 {
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reg = <3>;
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label = "lan1";
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phy-handle = <&phy4>;
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phy-mode = "mii";
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&usbh {
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status = "okay";
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};
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