mirror of
https://github.com/openwrt/openwrt.git
synced 2025-01-10 15:03:07 +00:00
812046971e
During port to gluon, I saw that the primary mac is not correct. Updated DTS accordingly.
Signed-off-by: Roland Reinl <reinlroland+github@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/17429
(cherry picked from commit 616621120b)
Link: https://github.com/openwrt/openwrt/pull/17449
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
379 lines
6.3 KiB
Plaintext
379 lines
6.3 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
|
|
|
|
/dts-v1/;
|
|
#include <dt-bindings/input/input.h>
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/leds/common.h>
|
|
|
|
#include "mt7986a.dtsi"
|
|
|
|
/ {
|
|
model = "D-Link AQUILA PRO AI M60 A1";
|
|
compatible = "dlink,aquila-pro-ai-m60-a1", "mediatek,mt7986a";
|
|
|
|
aliases {
|
|
serial0 = &uart0;
|
|
led-boot = &led_status_white;
|
|
led-failsafe = &led_status_red;
|
|
led-running = &led_status_white;
|
|
led-upgrade = &led_status_blue;
|
|
label-mac-device = &gmac0;
|
|
};
|
|
|
|
chosen {
|
|
stdout-path = "serial0:115200n8";
|
|
};
|
|
|
|
memory@40000000 {
|
|
reg = <0 0x40000000 0 0x20000000>;
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
|
|
button-reset {
|
|
label = "reset";
|
|
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_RESTART>;
|
|
};
|
|
|
|
button-wps {
|
|
label = "wps";
|
|
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
};
|
|
|
|
button-leds-on-off {
|
|
label = "leds-on-off";
|
|
linux,code = <KEY_LIGHTS_TOGGLE>;
|
|
gpios = <&pio 47 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
};
|
|
|
|
ð {
|
|
status = "okay";
|
|
|
|
gmac0: mac@0 {
|
|
compatible = "mediatek,eth-mac";
|
|
reg = <0>;
|
|
phy-mode = "2500base-x";
|
|
|
|
nvmem-cells = <&macaddr_odm 1>;
|
|
nvmem-cell-names = "mac-address";
|
|
fixed-link {
|
|
speed = <2500>;
|
|
full-duplex;
|
|
pause;
|
|
};
|
|
};
|
|
|
|
gmac1: mac@1 {
|
|
compatible = "mediatek,eth-mac";
|
|
reg = <1>;
|
|
phy-mode = "2500base-x";
|
|
phy-handle = <&phy6>;
|
|
nvmem-cells = <&macaddr_odm 0>;
|
|
nvmem-cell-names = "mac-address";
|
|
label = "internet";
|
|
};
|
|
|
|
mdio: mdio-bus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
|
|
reset-delay-us = <1500000>;
|
|
reset-post-delay-us = <1000000>;
|
|
|
|
phy6: phy@6 {
|
|
compatible = "maxlinear,gpy211", "ethernet-phy-ieee802.3-c45";
|
|
reg = <6>;
|
|
phy-mode = "2500base-x";
|
|
};
|
|
|
|
switch@1f {
|
|
compatible = "mediatek,mt7531";
|
|
reg = <31>;
|
|
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
interrupt-parent = <&pio>;
|
|
interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
label = "lan1";
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
label = "lan2";
|
|
};
|
|
|
|
port@2 {
|
|
reg = <2>;
|
|
label = "lan3";
|
|
};
|
|
|
|
port@3 {
|
|
reg = <3>;
|
|
label = "lan4";
|
|
};
|
|
|
|
port@6 {
|
|
reg = <6>;
|
|
label = "cpu";
|
|
ethernet = <&gmac0>;
|
|
phy-mode = "2500base-x";
|
|
|
|
fixed-link {
|
|
speed = <2500>;
|
|
full-duplex;
|
|
pause;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pio {
|
|
spi_flash_pins: spi-flash-pins-33-to-38 {
|
|
mux {
|
|
function = "spi";
|
|
groups = "spi0", "spi0_wp_hold";
|
|
};
|
|
conf-pu {
|
|
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
|
|
drive-strength = <8>;
|
|
mediatek,pull-up-adv = <0>; /* bias-disable */
|
|
};
|
|
conf-pd {
|
|
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
|
|
drive-strength = <8>;
|
|
mediatek,pull-down-adv = <0>; /* bias-disable */
|
|
};
|
|
};
|
|
|
|
wf_2g_5g_pins: wf_2g_5g-pins {
|
|
mux {
|
|
function = "wifi";
|
|
groups = "wf_2g", "wf_5g";
|
|
};
|
|
conf {
|
|
pins =
|
|
"WF0_HB2",
|
|
"WF0_HB3",
|
|
"WF0_HB4",
|
|
"WF0_HB0",
|
|
"WF0_HB0_B",
|
|
"WF0_HB5",
|
|
"WF0_HB6",
|
|
"WF0_HB7",
|
|
"WF0_HB8",
|
|
"WF0_HB9",
|
|
"WF0_HB10",
|
|
"WF0_TOP_CLK",
|
|
"WF0_TOP_DATA",
|
|
"WF1_HB1",
|
|
"WF1_HB2",
|
|
"WF1_HB3",
|
|
"WF1_HB4",
|
|
"WF1_HB0",
|
|
"WF1_HB5",
|
|
"WF1_HB6",
|
|
"WF1_HB7",
|
|
"WF1_HB8",
|
|
"WF1_TOP_CLK",
|
|
"WF1_TOP_DATA";
|
|
drive-strength = <4>;
|
|
};
|
|
};
|
|
|
|
i2c_pins_3_4: i2c-pins-3-4 {
|
|
mux {
|
|
function = "i2c";
|
|
groups = "i2c";
|
|
};
|
|
};
|
|
};
|
|
|
|
&spi0 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&spi_flash_pins>;
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "spi-nand";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
reg = <0>;
|
|
|
|
spi-max-frequency = <20000000>;
|
|
spi-tx-bus-width = <4>;
|
|
spi-rx-bus-width = <4>;
|
|
|
|
mediatek,nmbm;
|
|
mediatek,bmt-max-ratio = <1>;
|
|
mediatek,bmt-max-reserved-blocks = <64>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "BL2";
|
|
reg = <0x000000 0x100000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@100000 {
|
|
label = "u-boot-env";
|
|
reg = <0x100000 0x80000>;
|
|
};
|
|
|
|
partition@180000 {
|
|
label = "Factory";
|
|
reg = <0x180000 0x200000>;
|
|
read-only;
|
|
|
|
nvmem-layout {
|
|
compatible = "fixed-layout";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
eeprom_factory_0: eeprom@0 {
|
|
reg = <0x0 0x1000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
partition@380000 {
|
|
label = "FIP";
|
|
reg = <0x380000 0x200000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@580000 {
|
|
label = "ubi";
|
|
reg = <0x580000 0x3200000>;
|
|
};
|
|
|
|
partition@3780000 {
|
|
label = "ubi1";
|
|
reg = <0x3780000 0x3200000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@6980000 {
|
|
label = "Odm";
|
|
reg = <0x6980000 0x40000>;
|
|
read-only;
|
|
|
|
nvmem-layout {
|
|
compatible = "fixed-layout";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
macaddr_odm: macaddr@81 {
|
|
compatible = "mac-base";
|
|
reg = <0x81 0x6>;
|
|
#nvmem-cell-cells = <1>;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
partition@69c0000 {
|
|
label = "Config1";
|
|
reg = <0x69c0000 0x80000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@6a40000 {
|
|
label = "Config2";
|
|
reg = <0x6a40000 0x80000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@6ac0000 {
|
|
label = "Storage";
|
|
reg = <0x6ac0000 0xA00000>;
|
|
read-only;
|
|
};
|
|
|
|
};
|
|
};
|
|
};
|
|
|
|
&wifi {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&wf_2g_5g_pins>;
|
|
|
|
|
|
nvmem-cells = <&eeprom_factory_0>;
|
|
nvmem-cell-names = "eeprom";
|
|
|
|
band@0 {
|
|
/* 2.4 GHz */
|
|
reg = <0>;
|
|
nvmem-cells = <&macaddr_odm 2>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
band@1 {
|
|
/* 5 GHz */
|
|
reg = <1>;
|
|
nvmem-cells = <&macaddr_odm 5>;
|
|
nvmem-cell-names = "mac-address";
|
|
};
|
|
};
|
|
|
|
&uart0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&watchdog {
|
|
status = "okay";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c_pins_3_4>;
|
|
|
|
gca230718@40 {
|
|
compatible = "unknown,gca230718";
|
|
reg = <0x40>;
|
|
|
|
led_status_red: led@0 {
|
|
color = <LED_COLOR_ID_RED>;
|
|
function = LED_FUNCTION_STATUS;
|
|
reg = <0>;
|
|
};
|
|
|
|
led@1 {
|
|
color = <LED_COLOR_ID_GREEN>;
|
|
function = LED_FUNCTION_STATUS;
|
|
reg = <1>;
|
|
};
|
|
|
|
led_status_blue: led@2 {
|
|
color = <LED_COLOR_ID_BLUE>;
|
|
function = LED_FUNCTION_STATUS;
|
|
reg = <2>;
|
|
};
|
|
|
|
led_status_white: led@3 {
|
|
color = <LED_COLOR_ID_WHITE>;
|
|
function = LED_FUNCTION_STATUS;
|
|
reg = <3>;
|
|
};
|
|
};
|
|
};
|