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95d5a99537
The following adds the Aerohive BR200-WP router to OpenWrt under
the mpc85xx/p1010 subtarget.
Hardware:
- SoC: Freescale P1011
- NOR: Intel JS28F512M29EWH 64MB
- Memory: 2x Nanya NT5TU64M16GG-AC 128MB (Total of 256MB)
- 2.4GHz WiFi: Atheros AR9390-AL1A
- Eth1: Atheros AR8035-A PoE
- 2x LEDs
- 1x Button
- PoE PSE
Flashing:
1. Hook into UART (9600 baud) and enter U-Boot. You may need to enter a
password of administrator or AhNf?d@ta06 if prompted.
2. Once in U-Boot, tftp boot the initramfs image:
dhcp; setenv serverip 192.168.1.3;
tftpboot 0x2004000 openwrt-mpc85xx-p1010-aerohive_br200-wp-initramfs-kernel.bin;
bootm 0x2004000;
3. Once booted, scp over the sysupgrade file and sysupgrade the device
to flash LEDE to the NOR.
Note:
MAC assigns are taken from stock firmware:
Name MAC addr Mode State Chan(Width) VLAN Radio Hive SSID
-------- -------------- -------- ----- ----------- ---- ---------- ---------- ---------
Mgt0 08ea:44XX:XXc0 - U - 1 - hive0 -
Eth0 08ea:44XX:XXc0 wan U - - - - -
Eth1 08ea:44XX:XXc2 access D - - - hive0 -
Eth2 08ea:44XX:XXc3 access D - - - hive0 -
Eth3 08ea:44XX:XXc4 access D - - - hive0 -
Eth4 08ea:44XX:XXc5 access D - - - hive0 -
Wifi0 08ea:44XX:XXd0 access U 1(20MHz) - radio_ng0 - -
Wifi0.1 08ea:44XX:XXd4 access D 1(20MHz) - radio_ng0 hive0 -
Note2:
PoE PSE could be managed with `realtek-poe` package. Example port
config:
config port
option enable '1'
option id '4'
option name 'lan2'
option poe_plus '0'
option priority '2'
config port
option enable '1'
option id '3'
option name 'lan1'
option poe_plus '0'
option priority '1'
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
(switch@0 -> switch@10, Device's quickstart says LEDs are
amber and white => add function+color properties but keep
labels around, use pr_info)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
43 lines
1.5 KiB
Diff
43 lines
1.5 KiB
Diff
From d43ab14605510d9d2bd257a8cd70f24ada4621b0 Mon Sep 17 00:00:00 2001
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From: David Bauer <mail@david-bauer.net>
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Date: Sat, 29 Feb 2020 14:27:04 +0100
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Subject: [PATCH] powerpc: bootwrapper: disable uImage generation
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Due to CONFIG_KERNEL_XZ symbol, the bootwrapper code tries to
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instruct the mkimage to use the xz compression, which isn't
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supported. This disables the uImage generation, as OpenWrt
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generates individual uImages for each board using it's own
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toolchain.
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Signed-off-by: David Bauer <mail@david-bauer.net>
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---
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arch/powerpc/boot/Makefile | 9 ---------
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1 file changed, 9 deletions(-)
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--- a/arch/powerpc/boot/Makefile
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+++ b/arch/powerpc/boot/Makefile
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@@ -274,7 +274,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
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image-$(CONFIG_PPC_EFIKA) += zImage.chrp
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image-$(CONFIG_PPC_PMAC) += zImage.pmac
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image-$(CONFIG_PPC_HOLLY) += dtbImage.holly
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-image-$(CONFIG_DEFAULT_UIMAGE) += uImage
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image-$(CONFIG_EPAPR_BOOT) += zImage.epapr
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#
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@@ -409,15 +408,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits
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$(obj)/vmlinux.strip: vmlinux
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$(STRIP) -s -R .comment $< -o $@
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-$(obj)/uImage: vmlinux $(wrapperbits) FORCE
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- $(call if_changed,wrap,uboot)
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-
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-$(obj)/uImage.initrd.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE
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- $(call if_changed,wrap,uboot-$*,,$(obj)/dts/$*.dtb,$(obj)/ramdisk.image.gz)
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-
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-$(obj)/uImage.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE
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- $(call if_changed,wrap,uboot-$*,,$(obj)/dts/$*.dtb)
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-
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$(obj)/cuImage.initrd.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE
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$(call if_changed,wrap,cuboot-$*,,$(obj)/dts/$*.dtb,$(obj)/ramdisk.image.gz)
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