openwrt/target
Sven Eckelmann b1d57dadb2 ar71xx: disable 40Mhz refclk for QCA953x
The "QCA9531 v2.0 802.11n 2x2 2.4 GHz Premium SOC for WLAN Platforms"
datasheet (80-Y7991-1 Rev. C - October 2014) doesn't specify support for a
40 Mhz reference clock. The register description for "Bootstrap Options"
(page 31) defines following states for the bit 4 (REF_CLK):

* 0 - CLK25 (default)
* 1 - (reserved)

Devices like the TP-Link CPE210 v2 has this bit set to 1 but is using a 25
Mhz reference clock. OpenWrt is still interpreted this bit as 40 Mhz and
then break the bootup of the system due to this incorrect interpretation.

Signed-off-by: Sven Eckelmann <sven@narfation.org>
[refreshed patches]
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
2018-02-22 18:53:22 +01:00
..
imagebuilder imagebuilder: fix reference to removed VERSION_SED variable 2018-02-02 14:41:35 +01:00
linux ar71xx: disable 40Mhz refclk for QCA953x 2018-02-22 18:53:22 +01:00
sdk sdk: change base feed fallback to git.openwrt.org 2018-01-11 18:20:07 +01:00
toolchain merge: etc: update remaining files 2017-12-08 19:41:18 +01:00
Config.in config: set ARCH if powerpc64 is selected in the configuration 2017-10-24 13:24:04 +02:00
Makefile build: make <subdir>/install opt-in, use it for target/ only 2017-02-09 13:51:35 +01:00