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cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
247 lines
7.2 KiB
Diff
247 lines
7.2 KiB
Diff
From 70eb620ed6d38e171e5619313e99d31688d25010 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Horia=20Geant=C4=83?= <horia.geanta@nxp.com>
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Date: Wed, 10 Oct 2018 16:07:50 +0300
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Subject: [PATCH] crypto: caam/qi2 - add OPR (Order Preservation) support
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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During driver upstreaming OPR was removed due to lacking users.
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Add OPR back, since in LSDK / LSDK-based ADKs there is at least
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one user (ASF / VortiQa IPsec).
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Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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---
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drivers/crypto/caam/dpseci.c | 85 ++++++++++++++++++++++++++++++++++++++++
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drivers/crypto/caam/dpseci.h | 26 +++++++++++-
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drivers/crypto/caam/dpseci_cmd.h | 51 ++++++++++++++++++++++++
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3 files changed, 160 insertions(+), 2 deletions(-)
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--- a/drivers/crypto/caam/dpseci.c
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+++ b/drivers/crypto/caam/dpseci.c
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@@ -5,6 +5,7 @@
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*/
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#include <linux/fsl/mc.h>
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+#include <soc/fsl/dpaa2-io.h>
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#include "dpseci.h"
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#include "dpseci_cmd.h"
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@@ -675,6 +676,90 @@ int dpseci_get_api_version(struct fsl_mc
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return 0;
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}
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+
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+/**
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+ * dpseci_set_opr() - Set Order Restoration configuration
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @token: Token of DPSECI object
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+ * @index: The queue index
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+ * @options: Configuration mode options; can be OPR_OPT_CREATE or
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+ * OPR_OPT_RETIRE
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+ * @cfg: Configuration options for the OPR
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_set_opr(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, u8 index,
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+ u8 options, struct opr_cfg *cfg)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ struct dpseci_cmd_opr *cmd_params;
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+
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+ cmd.header = mc_encode_cmd_header(
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+ DPSECI_CMDID_SET_OPR,
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+ cmd_flags,
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+ token);
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+ cmd_params = (struct dpseci_cmd_opr *)cmd.params;
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+ cmd_params->index = index;
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+ cmd_params->options = options;
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+ cmd_params->oloe = cfg->oloe;
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+ cmd_params->oeane = cfg->oeane;
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+ cmd_params->olws = cfg->olws;
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+ cmd_params->oa = cfg->oa;
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+ cmd_params->oprrws = cfg->oprrws;
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+
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+ return mc_send_command(mc_io, &cmd);
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+}
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+
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+/**
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+ * dpseci_get_opr() - Retrieve Order Restoration config and query
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+ * @mc_io: Pointer to MC portal's I/O object
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+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
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+ * @token: Token of DPSECI object
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+ * @index: The queue index
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+ * @cfg: Returned OPR configuration
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+ * @qry: Returned OPR query
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+ *
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+ * Return: '0' on success, error code otherwise
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+ */
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+int dpseci_get_opr(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, u8 index,
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+ struct opr_cfg *cfg, struct opr_qry *qry)
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+{
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+ struct fsl_mc_command cmd = { 0 };
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+ struct dpseci_cmd_opr *cmd_params;
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+ struct dpseci_rsp_get_opr *rsp_params;
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+ int err;
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+
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+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_OPR,
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+ cmd_flags,
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+ token);
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+ cmd_params = (struct dpseci_cmd_opr *)cmd.params;
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+ cmd_params->index = index;
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+ err = mc_send_command(mc_io, &cmd);
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+ if (err)
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+ return err;
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+
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+ rsp_params = (struct dpseci_rsp_get_opr *)cmd.params;
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+ qry->rip = dpseci_get_field(rsp_params->flags, OPR_RIP);
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+ qry->enable = dpseci_get_field(rsp_params->flags, OPR_ENABLE);
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+ cfg->oloe = rsp_params->oloe;
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+ cfg->oeane = rsp_params->oeane;
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+ cfg->olws = rsp_params->olws;
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+ cfg->oa = rsp_params->oa;
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+ cfg->oprrws = rsp_params->oprrws;
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+ qry->nesn = le16_to_cpu(rsp_params->nesn);
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+ qry->ndsn = le16_to_cpu(rsp_params->ndsn);
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+ qry->ea_tseq = le16_to_cpu(rsp_params->ea_tseq);
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+ qry->tseq_nlis = dpseci_get_field(rsp_params->tseq_nlis, OPR_TSEQ_NLIS);
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+ qry->ea_hseq = le16_to_cpu(rsp_params->ea_hseq);
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+ qry->hseq_nlis = dpseci_get_field(rsp_params->hseq_nlis, OPR_HSEQ_NLIS);
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+ qry->ea_hptr = le16_to_cpu(rsp_params->ea_hptr);
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+ qry->ea_tptr = le16_to_cpu(rsp_params->ea_tptr);
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+ qry->opr_vid = le16_to_cpu(rsp_params->opr_vid);
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+ qry->opr_id = le16_to_cpu(rsp_params->opr_id);
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+
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+ return 0;
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+}
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/**
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* dpseci_set_congestion_notification() - Set congestion group
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--- a/drivers/crypto/caam/dpseci.h
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+++ b/drivers/crypto/caam/dpseci.h
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@@ -12,6 +12,8 @@
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*/
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struct fsl_mc_io;
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+struct opr_cfg;
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+struct opr_qry;
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/**
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* General DPSECI macros
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@@ -38,9 +40,21 @@ int dpseci_close(struct fsl_mc_io *mc_io
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#define DPSECI_OPT_HAS_CG 0x000020
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/**
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+ * Enable the Order Restoration support
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+ */
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+#define DPSECI_OPT_HAS_OPR 0x000040
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+
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+/**
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+ * Order Point Records are shared for the entire DPSECI
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+ */
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+#define DPSECI_OPT_OPR_SHARED 0x000080
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+
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+/**
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* struct dpseci_cfg - Structure representing DPSECI configuration
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- * @options: Any combination of the following flags:
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+ * @options: Any combination of the following options:
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* DPSECI_OPT_HAS_CG
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+ * DPSECI_OPT_HAS_OPR
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+ * DPSECI_OPT_OPR_SHARED
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* @num_tx_queues: num of queues towards the SEC
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* @num_rx_queues: num of queues back from the SEC
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* @priorities: Priorities for the SEC hardware processing;
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@@ -93,8 +107,10 @@ int dpseci_clear_irq_status(struct fsl_m
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* @id: DPSECI object ID
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* @num_tx_queues: number of queues towards the SEC
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* @num_rx_queues: number of queues back from the SEC
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- * @options: any combination of the following flags:
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+ * @options: any combination of the following options:
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* DPSECI_OPT_HAS_CG
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+ * DPSECI_OPT_HAS_OPR
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+ * DPSECI_OPT_OPR_SHARED
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*/
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struct dpseci_attr {
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int id;
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@@ -301,6 +317,12 @@ int dpseci_get_sec_counters(struct fsl_m
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int dpseci_get_api_version(struct fsl_mc_io *mc_io, u32 cmd_flags,
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u16 *major_ver, u16 *minor_ver);
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+int dpseci_set_opr(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, u8 index,
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+ u8 options, struct opr_cfg *cfg);
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+
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+int dpseci_get_opr(struct fsl_mc_io *mc_io, u32 cmd_flags, u16 token, u8 index,
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+ struct opr_cfg *cfg, struct opr_qry *qry);
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+
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/**
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* enum dpseci_congestion_unit - DPSECI congestion units
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* @DPSECI_CONGESTION_UNIT_BYTES: bytes units
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--- a/drivers/crypto/caam/dpseci_cmd.h
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+++ b/drivers/crypto/caam/dpseci_cmd.h
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@@ -54,6 +54,8 @@
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#define DPSECI_CMDID_GET_TX_QUEUE DPSECI_CMD_V1(0x197)
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#define DPSECI_CMDID_GET_SEC_ATTR DPSECI_CMD_V2(0x198)
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#define DPSECI_CMDID_GET_SEC_COUNTERS DPSECI_CMD_V1(0x199)
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+#define DPSECI_CMDID_SET_OPR DPSECI_CMD_V1(0x19A)
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+#define DPSECI_CMDID_GET_OPR DPSECI_CMD_V1(0x19B)
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#define DPSECI_CMDID_SET_CONGESTION_NOTIFICATION DPSECI_CMD_V1(0x170)
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#define DPSECI_CMDID_GET_CONGESTION_NOTIFICATION DPSECI_CMD_V1(0x171)
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@@ -189,6 +191,55 @@ struct dpseci_rsp_get_api_version {
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__le16 minor;
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};
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+struct dpseci_cmd_opr {
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+ __le16 pad;
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+ u8 index;
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+ u8 options;
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+ u8 pad1[7];
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+ u8 oloe;
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+ u8 oeane;
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+ u8 olws;
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+ u8 oa;
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+ u8 oprrws;
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+};
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+
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+#define DPSECI_OPR_RIP_SHIFT 0
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+#define DPSECI_OPR_RIP_SIZE 1
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+#define DPSECI_OPR_ENABLE_SHIFT 1
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+#define DPSECI_OPR_ENABLE_SIZE 1
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+#define DPSECI_OPR_TSEQ_NLIS_SHIFT 0
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+#define DPSECI_OPR_TSEQ_NLIS_SIZE 1
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+#define DPSECI_OPR_HSEQ_NLIS_SHIFT 0
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+#define DPSECI_OPR_HSEQ_NLIS_SIZE 1
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+
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+struct dpseci_rsp_get_opr {
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+ __le64 pad;
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+ u8 flags;
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+ u8 pad0[2];
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+ u8 oloe;
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+ u8 oeane;
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+ u8 olws;
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+ u8 oa;
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+ u8 oprrws;
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+ __le16 nesn;
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+ __le16 pad1;
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+ __le16 ndsn;
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+ __le16 pad2;
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+ __le16 ea_tseq;
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+ u8 tseq_nlis;
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+ u8 pad3;
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+ __le16 ea_hseq;
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+ u8 hseq_nlis;
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+ u8 pad4;
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+ __le16 ea_hptr;
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+ __le16 pad5;
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+ __le16 ea_tptr;
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+ __le16 pad6;
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+ __le16 opr_vid;
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+ __le16 pad7;
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+ __le16 opr_id;
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+};
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+
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#define DPSECI_CGN_DEST_TYPE_SHIFT 0
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#define DPSECI_CGN_DEST_TYPE_SIZE 4
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#define DPSECI_CGN_UNITS_SHIFT 4
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