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cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
269 lines
8.4 KiB
Diff
269 lines
8.4 KiB
Diff
From 020578dd022e5d869db52e79c5aba95c1f1a84ec Mon Sep 17 00:00:00 2001
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From: Abel Vesa <abel.vesa@nxp.com>
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Date: Wed, 11 Dec 2019 09:21:23 +0200
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Subject: [PATCH] LF-794-3 gpu: cdn: imx8qm: Add firmware loading support
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This allows the HDP i.MX8QM driver to load the firmware on init
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and resume. In order to have backward compatibility, if there is
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no firmware-name property defined in the hdmi node, the driver
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probing sequence skips the firmware loading.
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Also, if u-boot has loaded already a firmware, we run with that
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but when probing the driver, the request_firmware_nowait is used
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to locate and keep safe the firmware for when suspend/resume happens.
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This leads to 4 possible scenarios:
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1. u-boot loads the firmware, the kernel driver finds the firmware
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when rootfs is mounted. This is the most desirable scenario. Also
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this is the only scenario that allows the hdmi to work after resume.
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2. u-boot loads the firmware, the kernel driver _doesn't_ find
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the firmware in rootfs. If there is no suspend ever happening,
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the kernel driver will keep using the firmware that was loaded by
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u-boot. On the first suspend/resume, the firmware is lost
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because the HDMI IP gets powered down.
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3. u-boot doesn't load the firmare, the kernel driver probing
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tries to load the firmware, assuming this is available
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(see CONFIG_EXTRA_FIRMWARE).
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4. u-boot doesn't load the firmware and the kernel driver is not
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able to find it either. The probing fails and there is no HDMI
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available in linux.
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Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
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Reviewed-by: Sandor Yu <sandor.yu@nxp.com>
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Acked-by: Wen He <wen.he_1@nxp.com>
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Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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---
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drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c | 78 +++++++++++++++++++++++++++++++++--
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drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c | 30 ++++++++++++++
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drivers/gpu/drm/imx/cdns-mhdp-imx.h | 4 ++
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include/drm/bridge/cdns-mhdp-common.h | 3 ++
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4 files changed, 111 insertions(+), 4 deletions(-)
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--- a/drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c
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+++ b/drivers/gpu/drm/imx/cdn-mhdp-imx8qm.c
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@@ -7,12 +7,17 @@
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*/
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#include <dt-bindings/firmware/imx/rsrc.h>
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#include <linux/firmware/imx/sci.h>
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+#include <linux/firmware.h>
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#include <linux/pm_domain.h>
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#include <linux/clk.h>
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#include <drm/drmP.h>
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#include "cdns-mhdp-imx.h"
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+#define FW_IRAM_OFFSET 0x2000
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+#define FW_IRAM_SIZE 0x10000
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+#define FW_DRAM_SIZE 0x8000
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+
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#define PLL_800MHZ (800000000)
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#define HDP_DUAL_MODE_MIN_PCLK_RATE 300000 /* KHz */
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@@ -517,24 +522,69 @@ void cdns_mhdp_pclk_rate_imx8qm(struct c
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imx8qm_pixel_link_mux(imx_mhdp);
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}
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-int cdns_mhdp_firmware_init_imx8qm(struct cdns_mhdp_device *mhdp)
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+static void cdns_mhdp_firmware_load_cont(const struct firmware *fw, void *context)
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{
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- struct imx_mhdp_device *imx_mhdp =
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- container_of(mhdp, struct imx_mhdp_device, mhdp);
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+ struct imx_mhdp_device *imx_mhdp = context;
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+
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+ imx_mhdp->fw = fw;
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+}
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+
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+static int cdns_mhdp_load_firmware_imx8qm(struct imx_mhdp_device *imx_mhdp)
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+{
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+ const u8 *iram;
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+ const u8 *dram;
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u32 rate;
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int ret;
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/* configure HDMI/DP core clock */
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rate = clk_get_rate(imx_mhdp->clks.clk_core);
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- if (mhdp->is_ls1028a)
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+ if (imx_mhdp->mhdp.is_ls1028a)
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rate = rate / 4;
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cdns_mhdp_set_fw_clk(&imx_mhdp->mhdp, rate);
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+ /* skip fw loading if none is specified */
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+ if (!imx_mhdp->firmware_name)
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+ goto out;
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+
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+ if (!imx_mhdp->fw) {
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+ ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_NOHOTPLUG,
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+ imx_mhdp->firmware_name,
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+ imx_mhdp->mhdp.dev, GFP_KERNEL,
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+ imx_mhdp,
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+ cdns_mhdp_firmware_load_cont);
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+ if (ret < 0) {
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+ DRM_ERROR("failed to load firmware\n");
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+ return -ENOENT;
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+ }
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+ } else {
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+ iram = imx_mhdp->fw->data + FW_IRAM_OFFSET;
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+ dram = iram + FW_IRAM_SIZE;
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+
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+ cdns_mhdp_load_firmware(&imx_mhdp->mhdp,
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+ (const u32 *) iram, FW_IRAM_SIZE,
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+ (const u32 *) dram, FW_DRAM_SIZE);
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+ }
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+
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+out:
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/* un-reset ucpu */
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cdns_mhdp_bus_write(0, &imx_mhdp->mhdp, APB_CTRL);
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DRM_INFO("Started firmware!\n");
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+ return 0;
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+}
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+
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+int cdns_mhdp_firmware_init_imx8qm(struct cdns_mhdp_device *mhdp)
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+{
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+ struct imx_mhdp_device *imx_mhdp =
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+ container_of(mhdp, struct imx_mhdp_device, mhdp);
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+ int ret;
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+
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+ /* load firmware */
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+ ret = cdns_mhdp_load_firmware_imx8qm(imx_mhdp);
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+ if (ret)
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+ return ret;
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+
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ret = cdns_mhdp_check_alive(&imx_mhdp->mhdp);
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if (ret == false) {
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DRM_ERROR("NO HDMI FW running\n");
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@@ -550,3 +600,23 @@ int cdns_mhdp_firmware_init_imx8qm(struc
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return 0;
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}
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+
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+int cdns_mhdp_suspend_imx8qm(struct cdns_mhdp_device *mhdp)
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+{
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+ struct imx_mhdp_device *imx_mhdp =
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+ container_of(mhdp, struct imx_mhdp_device, mhdp);
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+
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+ imx8qm_pixel_clk_disable(imx_mhdp);
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+
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+ return 0;
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+}
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+
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+int cdns_mhdp_resume_imx8qm(struct cdns_mhdp_device *mhdp)
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+{
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+ struct imx_mhdp_device *imx_mhdp =
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+ container_of(mhdp, struct imx_mhdp_device, mhdp);
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+
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+ imx8qm_pixel_clk_enable(imx_mhdp);
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+
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+ return cdns_mhdp_firmware_init_imx8qm(mhdp);
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+}
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--- a/drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c
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+++ b/drivers/gpu/drm/imx/cdn-mhdp-imxdrv.c
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@@ -82,6 +82,8 @@ static struct cdns_plat_data imx8qm_hdmi
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.phy_video_valid = cdns_hdmi_phy_video_valid_imx8qm,
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.power_on = cdns_mhdp_power_on_imx8qm,
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.firmware_init = cdns_mhdp_firmware_init_imx8qm,
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+ .resume = cdns_mhdp_resume_imx8qm,
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+ .suspend = cdns_mhdp_suspend_imx8qm,
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.pclk_rate = cdns_mhdp_pclk_rate_imx8qm,
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.plat_init = cdns_mhdp_plat_init_imx8qm,
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.plat_deinit = cdns_mhdp_plat_deinit_imx8qm,
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@@ -96,6 +98,8 @@ static struct cdns_plat_data imx8qm_dp_d
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.phy_set = cdns_dp_phy_set_imx8qm,
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.power_on = cdns_mhdp_power_on_imx8qm,
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.firmware_init = cdns_mhdp_firmware_init_imx8qm,
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+ .resume = cdns_mhdp_resume_imx8qm,
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+ .suspend = cdns_mhdp_suspend_imx8qm,
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.pclk_rate = cdns_mhdp_pclk_rate_imx8qm,
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.plat_init = cdns_mhdp_plat_init_imx8qm,
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.plat_deinit = cdns_mhdp_plat_deinit_imx8qm,
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@@ -157,6 +161,9 @@ static int cdns_mhdp_imx_bind(struct dev
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encoder = &imx_mhdp->encoder;
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encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
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+
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+ ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
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+ &imx_mhdp->firmware_name);
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/*
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* If we failed to find the CRTC(s) which this encoder is
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* supposed to be connected to, it's because the CRTC has
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@@ -198,6 +205,24 @@ static const struct component_ops cdns_m
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.unbind = cdns_mhdp_imx_unbind,
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};
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+static int cdns_mhdp_imx_suspend(struct device *dev)
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+{
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+ struct imx_mhdp_device *imx_mhdp = dev_get_drvdata(dev);
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+
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+ cdns_mhdp_plat_call(&imx_mhdp->mhdp, suspend);
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+
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+ return 0;
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+}
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+
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+static int cdns_mhdp_imx_resume(struct device *dev)
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+{
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+ struct imx_mhdp_device *imx_mhdp = dev_get_drvdata(dev);
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+
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+ cdns_mhdp_plat_call(&imx_mhdp->mhdp, resume);
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+
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+ return 0;
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+}
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+
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static int cdns_mhdp_imx_probe(struct platform_device *pdev)
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{
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return component_add(&pdev->dev, &cdns_mhdp_imx_ops);
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@@ -210,12 +235,17 @@ static int cdns_mhdp_imx_remove(struct p
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return 0;
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}
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+static const struct dev_pm_ops cdns_mhdp_imx_pm_ops = {
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+ SET_LATE_SYSTEM_SLEEP_PM_OPS(cdns_mhdp_imx_suspend, cdns_mhdp_imx_resume)
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+};
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+
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static struct platform_driver cdns_mhdp_imx_platform_driver = {
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.probe = cdns_mhdp_imx_probe,
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.remove = cdns_mhdp_imx_remove,
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.driver = {
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.name = "cdns-mhdp-imx",
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.of_match_table = cdns_mhdp_imx_dt_ids,
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+ .pm = &cdns_mhdp_imx_pm_ops,
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},
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};
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--- a/drivers/gpu/drm/imx/cdns-mhdp-imx.h
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+++ b/drivers/gpu/drm/imx/cdns-mhdp-imx.h
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@@ -50,6 +50,8 @@ struct imx_mhdp_device {
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bool active;
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bool suspended;
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struct imx_hdp_clks clks;
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+ const struct firmware *fw;
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+ const char *firmware_name;
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int bus_type;
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@@ -65,6 +67,8 @@ void cdns_mhdp_plat_init_imx8qm(struct c
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void cdns_mhdp_plat_deinit_imx8qm(struct cdns_mhdp_device *mhdp);
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void cdns_mhdp_pclk_rate_imx8qm(struct cdns_mhdp_device *mhdp);
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int cdns_mhdp_firmware_init_imx8qm(struct cdns_mhdp_device *mhdp);
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+int cdns_mhdp_resume_imx8qm(struct cdns_mhdp_device *mhdp);
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+int cdns_mhdp_suspend_imx8qm(struct cdns_mhdp_device *mhdp);
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int cdns_mhdp_power_on_imx8qm(struct cdns_mhdp_device *mhdp);
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int cdns_mhdp_power_on_ls1028a(struct cdns_mhdp_device *mhdp);
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void cdns_mhdp_pclk_rate_ls1028a(struct cdns_mhdp_device *mhdp);
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--- a/include/drm/bridge/cdns-mhdp-common.h
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+++ b/include/drm/bridge/cdns-mhdp-common.h
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@@ -645,6 +645,9 @@ struct cdns_plat_data {
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int (*firmware_init)(struct cdns_mhdp_device *mhdp);
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void (*pclk_rate)(struct cdns_mhdp_device *mhdp);
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+ int (*suspend)(struct cdns_mhdp_device *mhdp);
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+ int (*resume)(struct cdns_mhdp_device *mhdp);
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+
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int (*power_on)(struct cdns_mhdp_device *mhdp);
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int (*power_off)(struct cdns_mhdp_device *mhdp);
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