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9703a2adcc
Refresh all patches on top of kernel 5.10.138. The following patches were applied upstream: bcm27xx/patches-5.10/950-0311-drm-vc4-Adopt-the-dma-configuration-from-the-HVS-or-.patch bcm27xx/patches-5.10/950-0317-vc4_hdmi-Remove-firmware-logic-for-MAI-threshold-set.patch bcm27xx/patches-5.10/950-0346-drm-vc4-A-present-but-empty-dmas-disables-audio.patch bcm27xx/patches-5.10/950-0354-drm-vc4-Add-the-2711-HVS-as-a-suitable-DMA-node.patch bcm27xx/patches-5.10/950-0413-drm-vc4-hdmi-Don-t-access-the-connector-state-in-res.patch bcm27xx/patches-5.10/950-0505-vc4-drm-Avoid-full-hdmi-audio-fifo-writes.patch bcm27xx/patches-5.10/950-0512-vc4-drm-vc4_plane-Remove-subpixel-positioning-check.patch bcm27xx/patches-5.10/950-0560-drm-vc4-drv-Remove-the-DSI-pointer-in-vc4_drv.patch bcm27xx/patches-5.10/950-0561-drm-vc4-dsi-Use-snprintf-for-the-PHY-clocks-instead-.patch bcm27xx/patches-5.10/950-0562-drm-vc4-dsi-Introduce-a-variant-structure.patch bcm27xx/patches-5.10/950-0565-drm-vc4-Correct-pixel-order-for-DSI0.patch bcm27xx/patches-5.10/950-0566-drm-vc4-Register-dsi0-as-the-correct-vc4-encoder-typ.patch bcm27xx/patches-5.10/950-0567-drm-vc4-Fix-dsi0-interrupt-support.patch bcm27xx/patches-5.10/950-0568-drm-vc4-Add-correct-stop-condition-to-vc4_dsi_encode.patch bcm27xx/patches-5.10/950-0647-drm-vc4-Fix-timings-for-interlaced-modes.patch bcm27xx/patches-5.10/950-0695-drm-vc4-Fix-margin-calculations-for-the-right-bottom.patch Upstream sets the pixel clock to 340MHz now, do not set it to 600MHz any more. bcm27xx/patches-5.10/950-0576-drm-vc4-hdmi-Raise-the-maximum-clock-rate.patch Fixes:89956c6532
("kernel: bump 5.10 to 5.10.138") Fixes:4209c33ae2
("kernel: bump 5.10 to 5.10.137") Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
110 lines
4.3 KiB
Diff
110 lines
4.3 KiB
Diff
From d584fdf44b251f77cc29330d17b60be078acb440 Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Mon, 7 Dec 2020 16:57:11 +0100
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Subject: [PATCH] drm/vc4: hvs: Align the HVS atomic hooks to the new
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API
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Since the CRTC setup in vc4 is split between the PixelValves/TXP and the
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HVS, only the PV/TXP atomic hooks were updated in the previous commits, but
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it makes sense to update the HVS ones too.
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Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/gpu/drm/vc4/vc4_crtc.c | 4 +---
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drivers/gpu/drm/vc4/vc4_drv.h | 4 ++--
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drivers/gpu/drm/vc4/vc4_hvs.c | 8 +++++---
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drivers/gpu/drm/vc4/vc4_txp.c | 8 ++------
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4 files changed, 10 insertions(+), 14 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_crtc.c
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+++ b/drivers/gpu/drm/vc4/vc4_crtc.c
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@@ -522,8 +522,6 @@ static void vc4_crtc_atomic_disable(stru
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static void vc4_crtc_atomic_enable(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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- struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
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- crtc);
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struct drm_device *dev = crtc->dev;
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struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
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struct drm_encoder *encoder = vc4_get_crtc_encoder(crtc);
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@@ -536,7 +534,7 @@ static void vc4_crtc_atomic_enable(struc
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*/
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drm_crtc_vblank_on(crtc);
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- vc4_hvs_atomic_enable(crtc, old_state);
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+ vc4_hvs_atomic_enable(crtc, state);
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if (vc4_encoder->pre_crtc_configure)
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vc4_encoder->pre_crtc_configure(encoder);
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--- a/drivers/gpu/drm/vc4/vc4_drv.h
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+++ b/drivers/gpu/drm/vc4/vc4_drv.h
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@@ -925,8 +925,8 @@ extern struct platform_driver vc4_hvs_dr
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void vc4_hvs_stop_channel(struct drm_device *dev, unsigned int output);
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int vc4_hvs_get_fifo_from_output(struct drm_device *dev, unsigned int output);
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int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_crtc_state *state);
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-void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
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-void vc4_hvs_atomic_disable(struct drm_crtc *crtc, struct drm_crtc_state *old_state);
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+void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state);
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+void vc4_hvs_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state);
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void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
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struct drm_atomic_state *state);
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void vc4_hvs_dump_state(struct drm_device *dev);
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--- a/drivers/gpu/drm/vc4/vc4_hvs.c
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+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
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@@ -430,11 +430,12 @@ static void vc4_hvs_update_dlist(struct
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}
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void vc4_hvs_atomic_enable(struct drm_crtc *crtc,
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- struct drm_crtc_state *old_state)
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+ struct drm_atomic_state *state)
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{
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struct drm_device *dev = crtc->dev;
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struct vc4_dev *vc4 = to_vc4_dev(dev);
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- struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
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+ struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
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+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(new_crtc_state);
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struct drm_display_mode *mode = &crtc->state->adjusted_mode;
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bool oneshot = vc4_state->feed_txp;
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@@ -443,9 +444,10 @@ void vc4_hvs_atomic_enable(struct drm_cr
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}
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void vc4_hvs_atomic_disable(struct drm_crtc *crtc,
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- struct drm_crtc_state *old_state)
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+ struct drm_atomic_state *state)
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{
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struct drm_device *dev = crtc->dev;
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+ struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state, crtc);
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struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(old_state);
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unsigned int chan = vc4_state->assigned_channel;
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--- a/drivers/gpu/drm/vc4/vc4_txp.c
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+++ b/drivers/gpu/drm/vc4/vc4_txp.c
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@@ -412,23 +412,19 @@ static int vc4_txp_atomic_check(struct d
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static void vc4_txp_atomic_enable(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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- struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
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- crtc);
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drm_crtc_vblank_on(crtc);
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- vc4_hvs_atomic_enable(crtc, old_state);
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+ vc4_hvs_atomic_enable(crtc, state);
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}
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static void vc4_txp_atomic_disable(struct drm_crtc *crtc,
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struct drm_atomic_state *state)
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{
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- struct drm_crtc_state *old_state = drm_atomic_get_old_crtc_state(state,
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- crtc);
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struct drm_device *dev = crtc->dev;
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/* Disable vblank irq handling before crtc is disabled. */
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drm_crtc_vblank_off(crtc);
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- vc4_hvs_atomic_disable(crtc, old_state);
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+ vc4_hvs_atomic_disable(crtc, state);
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/*
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* Make sure we issue a vblank event after disabling the CRTC if
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