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9703a2adcc
Refresh all patches on top of kernel 5.10.138. The following patches were applied upstream: bcm27xx/patches-5.10/950-0311-drm-vc4-Adopt-the-dma-configuration-from-the-HVS-or-.patch bcm27xx/patches-5.10/950-0317-vc4_hdmi-Remove-firmware-logic-for-MAI-threshold-set.patch bcm27xx/patches-5.10/950-0346-drm-vc4-A-present-but-empty-dmas-disables-audio.patch bcm27xx/patches-5.10/950-0354-drm-vc4-Add-the-2711-HVS-as-a-suitable-DMA-node.patch bcm27xx/patches-5.10/950-0413-drm-vc4-hdmi-Don-t-access-the-connector-state-in-res.patch bcm27xx/patches-5.10/950-0505-vc4-drm-Avoid-full-hdmi-audio-fifo-writes.patch bcm27xx/patches-5.10/950-0512-vc4-drm-vc4_plane-Remove-subpixel-positioning-check.patch bcm27xx/patches-5.10/950-0560-drm-vc4-drv-Remove-the-DSI-pointer-in-vc4_drv.patch bcm27xx/patches-5.10/950-0561-drm-vc4-dsi-Use-snprintf-for-the-PHY-clocks-instead-.patch bcm27xx/patches-5.10/950-0562-drm-vc4-dsi-Introduce-a-variant-structure.patch bcm27xx/patches-5.10/950-0565-drm-vc4-Correct-pixel-order-for-DSI0.patch bcm27xx/patches-5.10/950-0566-drm-vc4-Register-dsi0-as-the-correct-vc4-encoder-typ.patch bcm27xx/patches-5.10/950-0567-drm-vc4-Fix-dsi0-interrupt-support.patch bcm27xx/patches-5.10/950-0568-drm-vc4-Add-correct-stop-condition-to-vc4_dsi_encode.patch bcm27xx/patches-5.10/950-0647-drm-vc4-Fix-timings-for-interlaced-modes.patch bcm27xx/patches-5.10/950-0695-drm-vc4-Fix-margin-calculations-for-the-right-bottom.patch Upstream sets the pixel clock to 340MHz now, do not set it to 600MHz any more. bcm27xx/patches-5.10/950-0576-drm-vc4-hdmi-Raise-the-maximum-clock-rate.patch Fixes: |
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.. | ||
base-files | ||
bcm2708 | ||
bcm2709 | ||
bcm2710 | ||
bcm2711 | ||
image | ||
modules | ||
patches-5.10 | ||
Makefile | ||
modules.mk |