openwrt/target/linux/bcm27xx/patches-5.10/950-0355-xhci-quirks-add-link-TRB-quirk-for-VL805.patch
Hauke Mehrtens ee67afeda9 kernel: Refresh patches for all targets
This refreshes the patches on top of kernel 5.4.127.

Deleted (upstreamed):
bcm27xx/patches-5.10/950-0005-Revert-mailbox-avoid-timer-start-from-callback.patch [0]
bcm27xx/patches-5.10/950-0678-bcm2711_thermal-Don-t-clamp-temperature-at-zero.patch [1]

Needed manual modifications:
bcm27xx/patches-5.10/950-0410-drm-atomic-Pass-the-full-state-to-CRTC-atomic-begin-.patch

[0]: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.127&id=bb2220e0672b7433a9a42618599cd261b2629240
[1]: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.127&id=83603802954068ccd1b8a3f2ccbbaf5e0862acb0

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2022-07-03 18:54:04 +02:00

62 lines
2.2 KiB
Diff

From be6ae78e28ff92b6da6af988f3013420af957481 Mon Sep 17 00:00:00 2001
From: Jonathan Bell <jonathan@raspberrypi.org>
Date: Mon, 26 Oct 2020 14:03:35 +0000
Subject: [PATCH] xhci: quirks: add link TRB quirk for VL805
The VL805 controller can't cope with the TR Dequeue Pointer for an endpoint
being set to a Link TRB. The hardware-maintained endpoint context ends up
stuck at the address of the Link TRB, leading to erroneous ring expansion
events whenever the enqueue pointer wraps to the dequeue position.
If the search for the end of the current TD and ring cycle state lands on
a Link TRB, move to the next segment.
See: https://github.com/raspberrypi/linux/issues/3919
Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
---
drivers/usb/host/xhci-pci.c | 1 +
drivers/usb/host/xhci-ring.c | 10 ++++++++++
drivers/usb/host/xhci.h | 1 +
3 files changed, 12 insertions(+)
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -299,6 +299,7 @@ static void xhci_pci_quirks(struct devic
if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) {
xhci->quirks |= XHCI_LPM_SUPPORT;
xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS;
+ xhci->quirks |= XHCI_AVOID_DQ_ON_LINK;
}
if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -666,6 +666,16 @@ void xhci_find_new_dequeue_state(struct
} while (!cycle_found || !td_last_trb_found);
+ /*
+ * Quirk: the xHC does not correctly parse link TRBs if the HW Dequeue
+ * pointer is set to one. Advance to the next TRB (and next segment).
+ */
+ if (xhci->quirks & XHCI_AVOID_DQ_ON_LINK && trb_is_link(new_deq)) {
+ if (link_trb_toggles_cycle(new_deq))
+ state->new_cycle_state ^= 0x1;
+ next_trb(xhci, ep_ring, &new_seg, &new_deq);
+ }
+
state->new_deq_seg = new_seg;
state->new_deq_ptr = new_deq;
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1888,6 +1888,7 @@ struct xhci_hcd {
#define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(39)
#define XHCI_NO_SOFT_RETRY BIT_ULL(40)
#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)
+#define XHCI_AVOID_DQ_ON_LINK BIT_ULL(43)
unsigned int num_active_eps;
unsigned int limit_active_eps;