mirror of
https://github.com/openwrt/openwrt.git
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61878706f9
Radxa ROCK 3B is a Pico-ITX form factor SBC[1] using the Rockchip RK3568(J). Hardware -------- - Rockchip RK3568(J) SoC - Quad A55 CPU - Mali-G52 GPU - 1 TOPS @ INT8 NPU - 2GB/4GB/8GB LPDDR4 RAM - eMMC connector - Micro SD Card slot - NVMe SSD through the M.2 M Key (2-lane PCIe 3.0) - SPI Flash for bootloader - 2x Gigabit ethernet port (one supports PoE with add-on PoE HAT) - 1x M.2 E Key socket with SDIO, UART and USB interfaces - 1x M.2 B Key socket with PCIe, SATA, and USB interfaces - 1x SIM card socket - 1x USB 3.0 Type-A HOST port - 1x USB 3.0 Type-A OTG port - 2x USB 2.0 Type-A HOST ports - 40 Pin GPIO header [1] https://radxa.com/products/rock3/3b Installation ------------ Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://github.com/openwrt/openwrt/pull/16185 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
816 lines
18 KiB
Diff
816 lines
18 KiB
Diff
From 846ef7748fa9124c8eea76e2d5e833fa69b3ef7c Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Thu, 27 Jun 2024 21:17:31 +0000
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Subject: [PATCH] arm64: dts: rockchip: Add Radxa ROCK 3B
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The Radxa ROCK 3B is a single-board computer based on the Pico-ITX form
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factor (100mm x 75mm). Two versions of the ROCK 3B exists, a community
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version based on the RK3568 SoC and an industrial version based on the
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RK3568J SoC.
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Add initial support for eMMC, SD-card, Ethernet, HDMI, PCIe and USB.
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Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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Link: https://lore.kernel.org/r/20240627211737.1985549-3-jonas@kwiboo.se
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../boot/dts/rockchip/rk3568-rock-3b.dts | 781 ++++++++++++++++++
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2 files changed, 782 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-rock-3b.dts
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -100,6 +100,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-od
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-radxa-e25.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-roc-pc.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3b.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6a-io.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-edgeble-neu6b-io.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb1-v10.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3b.dts
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@@ -0,0 +1,781 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+/dts-v1/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include <dt-bindings/soc/rockchip,vop2.h>
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+#include "rk3568.dtsi"
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+
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+/ {
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+ model = "Radxa ROCK 3B";
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+ compatible = "radxa,rock-3b", "rockchip,rk3568";
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+
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+ aliases {
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+ ethernet0 = &gmac0;
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+ ethernet1 = &gmac1;
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+ mmc0 = &sdhci;
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+ mmc1 = &sdmmc0;
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+ mmc2 = &sdmmc2;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ hdmi-con {
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+ compatible = "hdmi-connector";
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+ type = "a";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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+ ir-receiver {
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+ compatible = "gpio-ir-receiver";
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+ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pwm3_ir>;
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&led>;
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+
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+ led-0 {
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+ color = <LED_COLOR_ID_GREEN>;
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+ default-state = "on";
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+ function = LED_FUNCTION_HEARTBEAT;
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+ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ };
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+ };
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+
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+ /* pi6c pcie clock generator */
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+ vcc3v3_pi6c_03: regulator-3v3-vcc-pi6c-03 {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie_pwren_h>;
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+ regulator-name = "vcc3v3_pi6c_03";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ startup-delay-us = <10000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc3v3_sys: regulator-3v3-vcc-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc3v3_sys2: regulator-3v3-vcc-sys2 {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_sys2";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_sys: regulator-5v0-vcc-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc5v0_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+
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+ vcc5v0_usb_host: regulator-5v0-vcc-usb-host {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&usb_host_pwren_h>;
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+ regulator-name = "vcc5v0_usb_host";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ vcc5v0_usb_otg: regulator-5v0-vcc-usb-otg {
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+ compatible = "regulator-fixed";
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+ enable-active-high;
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+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&usb_otg_pwren_h>;
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+ regulator-name = "vcc5v0_usb_otg";
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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+
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+ sdio_pwrseq: sdio-pwrseq {
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+ compatible = "mmc-pwrseq-simple";
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+ clocks = <&rk809 1>;
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+ clock-names = "ext_clock";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&wifi_reg_on_h>;
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+ post-power-on-delay-ms = <100>;
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+ power-off-delay-us = <5000000>;
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+ reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ sound {
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+ compatible = "simple-audio-card";
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+ simple-audio-card,format = "i2s";
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+ simple-audio-card,name = "Analog RK809";
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+ simple-audio-card,mclk-fs = <256>;
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+
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+ simple-audio-card,cpu {
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+ sound-dai = <&i2s1_8ch>;
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+ };
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+
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+ simple-audio-card,codec {
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+ sound-dai = <&rk809>;
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+ };
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+ };
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+};
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+
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+&combphy0 {
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+ status = "okay";
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+};
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+
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+&combphy1 {
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+ status = "okay";
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+};
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+
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+&combphy2 {
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+ status = "okay";
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&gmac0 {
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+ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
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+ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
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+ clock_in_out = "input";
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+ phy-handle = <&rgmii_phy0>;
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+ phy-mode = "rgmii-id";
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+ phy-supply = <&vcc_3v3>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&gmac0_miim
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+ &gmac0_tx_bus2
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+ &gmac0_rx_bus2
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+ &gmac0_rgmii_clk
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+ &gmac0_rgmii_bus
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+ &gmac0_clkinout>;
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+ status = "okay";
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+};
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+
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+&gmac1 {
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+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
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+ clock_in_out = "input";
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+ phy-handle = <&rgmii_phy1>;
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+ phy-mode = "rgmii-id";
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+ phy-supply = <&vcc_3v3>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&gmac1m1_miim
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+ &gmac1m1_tx_bus2
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+ &gmac1m1_rx_bus2
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+ &gmac1m1_rgmii_clk
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+ &gmac1m1_rgmii_bus
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+ &gmac1m1_clkinout>;
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+ status = "okay";
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ avdd-0v9-supply = <&vdda0v9_image>;
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+ avdd-1v8-supply = <&vcca1v8_image>;
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+ status = "okay";
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+};
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+
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+&hdmi_in {
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+ hdmi_in_vp0: endpoint {
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+ remote-endpoint = <&vp0_out_hdmi>;
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+ };
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+};
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+
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+&hdmi_out {
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+ hdmi_out_con: endpoint {
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+ remote-endpoint = <&hdmi_con_in>;
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+ };
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+};
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+
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+&hdmi_sound {
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+
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+ vdd_cpu: regulator@1c {
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+ compatible = "tcs,tcs4525";
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+ reg = <0x1c>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-name = "vdd_cpu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <800000>;
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+ regulator-max-microvolt = <1150000>;
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+ regulator-ramp-delay = <2300>;
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+ vin-supply = <&vcc5v0_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ rk809: pmic@20 {
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+ compatible = "rockchip,rk809";
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+ reg = <0x20>;
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+ assigned-clocks = <&cru I2S1_MCLKOUT_TX>;
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+ assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>;
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+ #clock-cells = <1>;
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+ clocks = <&cru I2S1_MCLKOUT_TX>;
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+ clock-names = "mclk";
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+ clock-output-names = "rk809-clkout1", "rk809-clkout2";
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>;
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+ #sound-dai-cells = <0>;
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+ system-power-controller;
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+ wakeup-source;
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+
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+ vcc1-supply = <&vcc3v3_sys>;
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+ vcc2-supply = <&vcc3v3_sys>;
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+ vcc3-supply = <&vcc3v3_sys>;
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+ vcc4-supply = <&vcc3v3_sys>;
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+ vcc5-supply = <&vcc3v3_sys>;
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+ vcc6-supply = <&vcc3v3_sys>;
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+ vcc7-supply = <&vcc3v3_sys>;
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+ vcc8-supply = <&vcc3v3_sys>;
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+ vcc9-supply = <&vcc3v3_sys>;
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-name = "vdd_logic";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdd_gpu: DCDC_REG2 {
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+ regulator-name = "vdd_gpu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vdd_npu: DCDC_REG4 {
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+ regulator-name = "vdd_npu";
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_1v8: DCDC_REG5 {
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+ regulator-name = "vcc_1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdda0v9_image: LDO_REG1 {
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+ regulator-name = "vdda0v9_image";
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdda_0v9: LDO_REG2 {
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+ regulator-name = "vdda_0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdda0v9_pmu: LDO_REG3 {
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+ regulator-name = "vdda0v9_pmu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <900000>;
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+ };
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+ };
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+
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+ vccio_acodec: LDO_REG4 {
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+ regulator-name = "vccio_acodec";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vccio_sd: LDO_REG5 {
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+ regulator-name = "vccio_sd";
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+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_pmu: LDO_REG6 {
|
|
+ regulator-name = "vcc3v3_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <3300000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <3300000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca_1v8: LDO_REG7 {
|
|
+ regulator-name = "vcca_1v8";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_pmu: LDO_REG8 {
|
|
+ regulator-name = "vcca1v8_pmu";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-on-in-suspend;
|
|
+ regulator-suspend-microvolt = <1800000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcca1v8_image: LDO_REG9 {
|
|
+ regulator-name = "vcca1v8_image";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <1800000>;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc_3v3: SWITCH_REG1 {
|
|
+ regulator-name = "vcc_3v3";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ vcc3v3_sd: SWITCH_REG2 {
|
|
+ regulator-name = "vcc3v3_sd";
|
|
+ regulator-always-on;
|
|
+ regulator-boot-on;
|
|
+
|
|
+ regulator-state-mem {
|
|
+ regulator-off-in-suspend;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2c5 {
|
|
+ status = "okay";
|
|
+
|
|
+ hym8563: rtc@51 {
|
|
+ compatible = "haoyu,hym8563";
|
|
+ reg = <0x51>;
|
|
+ interrupt-parent = <&gpio0>;
|
|
+ interrupts = <RK_PD3 IRQ_TYPE_LEVEL_LOW>;
|
|
+ #clock-cells = <0>;
|
|
+ clock-output-names = "rtcic_32kout";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&rtcic_int_l>;
|
|
+ wakeup-source;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2s0_8ch {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&i2s1_8ch {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&i2s1m0_sclktx
|
|
+ &i2s1m0_lrcktx
|
|
+ &i2s1m0_sdi0
|
|
+ &i2s1m0_sdo0>;
|
|
+ rockchip,trcm-sync-tx-only;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&mdio0 {
|
|
+ rgmii_phy0: ethernet-phy@1 {
|
|
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
+ reg = <1>;
|
|
+ reset-assert-us = <20000>;
|
|
+ reset-deassert-us = <50000>;
|
|
+ reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&mdio1 {
|
|
+ rgmii_phy1: ethernet-phy@1 {
|
|
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
+ reg = <1>;
|
|
+ reset-assert-us = <20000>;
|
|
+ reset-deassert-us = <50000>;
|
|
+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pcie2x1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie20m1_pins>;
|
|
+ reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
|
|
+ vpcie3v3-supply = <&vcc3v3_sys2>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie30phy {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pcie3x2 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&pcie30x2m1_pins>;
|
|
+ reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ bluetooth {
|
|
+ bt_reg_on_h: bt-reg-on-h {
|
|
+ rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ bt_wake_host_h: bt-wake-host-h {
|
|
+ rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ host_wake_bt_h: host-wake-bt-h {
|
|
+ rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ ir-receiver {
|
|
+ pwm3_ir: pwm3-ir {
|
|
+ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ leds {
|
|
+ led: led {
|
|
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie {
|
|
+ pcie_pwren_h: pcie-pwren-h {
|
|
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie20 {
|
|
+ pcie20m1_pins: pcie20m1-pins {
|
|
+ rockchip,pins =
|
|
+ <2 RK_PD0 4 &pcfg_pull_none>,
|
|
+ <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,
|
|
+ <2 RK_PD1 4 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcie30x2 {
|
|
+ pcie30x2m1_pins: pcie30x2m1-pins {
|
|
+ rockchip,pins =
|
|
+ <2 RK_PD4 4 &pcfg_pull_none>,
|
|
+ <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,
|
|
+ <2 RK_PD5 4 &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pmic {
|
|
+ pmic_int_l: pmic-int-l {
|
|
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rtc {
|
|
+ rtcic_int_l: rtcic-int-l {
|
|
+ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ usb {
|
|
+ usb_host_pwren_h: usb-host-pwren-h {
|
|
+ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ usb_otg_pwren_h: usb-otg-pwren-h {
|
|
+ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ wifi {
|
|
+ wifi_reg_on_h: wifi-reg-on-h {
|
|
+ rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ wifi_wake_host_h: wifi-wake-host-h {
|
|
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&pmu_io_domains {
|
|
+ pmuio1-supply = <&vcc3v3_pmu>;
|
|
+ pmuio2-supply = <&vcc3v3_pmu>;
|
|
+ vccio1-supply = <&vccio_acodec>;
|
|
+ vccio2-supply = <&vcc_1v8>;
|
|
+ vccio3-supply = <&vccio_sd>;
|
|
+ vccio4-supply = <&vcc_1v8>;
|
|
+ vccio5-supply = <&vcc_3v3>;
|
|
+ vccio6-supply = <&vcc_1v8>;
|
|
+ vccio7-supply = <&vcc_3v3>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&saradc {
|
|
+ vref-supply = <&vcca_1v8>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdhci {
|
|
+ bus-width = <8>;
|
|
+ cap-mmc-highspeed;
|
|
+ max-frequency = <200000000>;
|
|
+ mmc-hs200-1_8v;
|
|
+ non-removable;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
|
+ vmmc-supply = <&vcc_3v3>;
|
|
+ vqmmc-supply = <&vcc_1v8>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc0 {
|
|
+ bus-width = <4>;
|
|
+ cap-sd-highspeed;
|
|
+ disable-wp;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
|
+ vmmc-supply = <&vcc3v3_sd>;
|
|
+ vqmmc-supply = <&vccio_sd>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc2 {
|
|
+ bus-width = <4>;
|
|
+ cap-sd-highspeed;
|
|
+ cap-sdio-irq;
|
|
+ keep-power-in-suspend;
|
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
|
+ non-removable;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_clk &sdmmc2m0_cmd>;
|
|
+ sd-uhs-sdr104;
|
|
+ vmmc-supply = <&vcc3v3_sys2>;
|
|
+ vqmmc-supply = <&vcc_1v8>;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&sfc {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+
|
|
+ flash@0 {
|
|
+ compatible = "jedec,spi-nor";
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <104000000>;
|
|
+ spi-rx-bus-width = <4>;
|
|
+ spi-tx-bus-width = <1>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ rockchip,hw-tshut-mode = <1>;
|
|
+ rockchip,hw-tshut-polarity = <0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart8 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn &uart8m0_rtsn>;
|
|
+ uart-has-rtscts;
|
|
+ status = "disabled";
|
|
+};
|
|
+
|
|
+&usb_host0_ehci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_ohci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_xhci {
|
|
+ extcon = <&usb2phy0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_xhci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0_host {
|
|
+ phy-supply = <&vcc5v0_usb_host>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0_otg {
|
|
+ phy-supply = <&vcc5v0_usb_otg>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy1 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy1_otg {
|
|
+ phy-supply = <&vcc5v0_usb_host>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop {
|
|
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
|
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vp0 {
|
|
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
|
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
|
+ remote-endpoint = <&hdmi_in_vp0>;
|
|
+ };
|
|
+};
|