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9baca41064
Rearrange all voltage triplets for "opp_table0" to match the
specifications. "opp-microvolt" and "opp-microvolt-<name>" triplets
are in order of <target min max>, and NOT <min target max>.
Previously, the CPU would *always* spend its time at the "minimum"
voltage, ignoring the actual intended target. This is a regression
from previous behavior.
On an NBG6817 with a Qualcomm CPU of PVS bin #2...
(see &opp_table0 -> opp-1725000000 -> opp-microvolt-speed0-pvs2-v0)
* Before:
/usr/bin/tail -n +1 /sys/kernel/debug/opp/cpu0/opp\:1725000000/supply-0/u_volt_*
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_max <==
1260000
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_min <==
1200000
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_target <==
1140000
* After:
/usr/bin/tail -n +1 /sys/kernel/debug/opp/cpu0/opp\:1725000000/supply-0/u_volt_*
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_max <==
1260000
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_min <==
1140000
==> /sys/kernel/debug/opp/cpu0/opp:1725000000/supply-0/u_volt_target <==
1200000
To check voltages and frequencies at run time, use...
/bin/cat /sys/kernel/debug/regulator/regulator_summary &&
/bin/cat /sys/kernel/debug/clk/clk_summary | grep "hfpll"
See
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/tree/Documentation/devicetree/bindings/opp/opp.txt?h=v5.4.142#n91
Fixes: 1e25423be8 ("ipq806x: refresh dtsi patches")
Signed-off-by: Shane Synan <digitalcircuit36939@gmail.com>
Reviewed-by: Ansuel Smith <ansuelsmth@gmail.com>
[commit message style cleanup, another kernel refresh]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
47 lines
1.9 KiB
Diff
47 lines
1.9 KiB
Diff
From 84909e85881d67244240c9f40974ce12a51e3886 Mon Sep 17 00:00:00 2001
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From: Ansuel Smith <ansuelsmth@gmail.com>
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Date: Tue, 11 May 2021 23:09:45 +0200
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Subject: [PATCH] ARM: dts: qcom: reduce pci IO size to 64K
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The current value is probably a typo and is actually uncommon to find
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1MB IO space even on a x86 arch. Also with recent changes to the pci
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driver, pci1 and pci2 now fails to function as any connected device
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fails any reg read/write. Reduce this to 64K as it should be more than
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enough and 3 * 64K of total IO space doesn't exceed the IO_SPACE_LIMIT
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hardcoded for the ARM arch.
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Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
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---
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arch/arm/boot/dts/qcom-ipq8064.dtsi | 6 +++---
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1 file changed, 3 insertions(+), 3 deletions(-)
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -1088,7 +1088,7 @@
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#address-cells = <3>;
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#size-cells = <2>;
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- ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */
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+ ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000 /* downstream I/O */
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0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
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interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
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@@ -1139,7 +1139,7 @@
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#address-cells = <3>;
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#size-cells = <2>;
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- ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */
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+ ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000 /* downstream I/O */
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0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
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interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
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@@ -1190,7 +1190,7 @@
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#address-cells = <3>;
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#size-cells = <2>;
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- ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */
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+ ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000 /* downstream I/O */
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0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
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interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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