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Fix PCIe initialization on AR934x by clearing PLL_PWD bit in addition to PPL(PLL?)_RESET bit of AR724x. Refresh patches by `make target/linux/refresh`. Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com> Link: https://github.com/openwrt/openwrt/pull/15432 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>