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c60dd7bef9
The patches in the ath79 target have not been sorted for a long time and they are very chaotic now. This patch sorts them again according to the OpenWrt naming rules[1], so that we can better manage them. [1] https://openwrt.org/docs/guide-developer/toolchain/use-patches-with-buildsystem#naming_patches Signed-off-by: Shiji Yang <yangshiji66@qq.com>
60 lines
1.6 KiB
Diff
60 lines
1.6 KiB
Diff
From b3797d1a92afe97c173b00fdb7824cedba24eef0 Mon Sep 17 00:00:00 2001
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From: Chuanhong Guo <gch981213@gmail.com>
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Date: Sun, 20 Sep 2020 01:00:45 +0800
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Subject: [PATCH] ath79: ar8216: make switch register access atomic
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due to some unknown reason these register accesses sometimes fail
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on the integrated switch without this patch.
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THIS ONLY WORKS ON ATH79 AND MAY BREAK THE DRIVER ON OTHER PLATFORMS!
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The mdio bus on ath79 works in polling mode and doesn't rely on
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any interrupt. This patch breaks the driver on any mdio master
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with interrupts used.
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---
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--- a/drivers/net/phy/ar8216.c
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+++ b/drivers/net/phy/ar8216.c
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@@ -252,6 +252,7 @@ ar8xxx_mii_write32(struct ar8xxx_priv *p
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u32
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ar8xxx_read(struct ar8xxx_priv *priv, int reg)
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{
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+ unsigned long flags;
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struct mii_bus *bus = priv->mii_bus;
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u16 r1, r2, page;
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u32 val;
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@@ -259,11 +260,13 @@ ar8xxx_read(struct ar8xxx_priv *priv, in
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split_addr((u32) reg, &r1, &r2, &page);
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mutex_lock(&bus->mdio_lock);
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+ local_irq_save(flags);
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bus->write(bus, 0x18, 0, page);
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wait_for_page_switch();
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val = ar8xxx_mii_read32(priv, 0x10 | r2, r1);
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+ local_irq_restore(flags);
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mutex_unlock(&bus->mdio_lock);
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return val;
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@@ -272,17 +275,20 @@ ar8xxx_read(struct ar8xxx_priv *priv, in
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void
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ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val)
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{
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+ unsigned long flags;
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struct mii_bus *bus = priv->mii_bus;
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u16 r1, r2, page;
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split_addr((u32) reg, &r1, &r2, &page);
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mutex_lock(&bus->mdio_lock);
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+ local_irq_save(flags);
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bus->write(bus, 0x18, 0, page);
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wait_for_page_switch();
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ar8xxx_mii_write32(priv, 0x10 | r2, r1, val);
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+ local_irq_restore(flags);
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mutex_unlock(&bus->mdio_lock);
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}
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