openwrt/target/linux/armvirt/patches-5.15/702-net-dpaa2-mac-add-support-for-more-10G-modes.patch
Mathew McBride 182fb97d8f
armvirt: add 5.15 patches for NXP DPAA2 platform
This fixes an issue with NXP's DPAA2 platforms (LS1088/2088/LX2160)
* A deadlock issue when attempting to detach the SFP management from
  a PHY interface (e.g when trying to reboot). These issues were fixed
  in kernel 6.2[1], but it's version does not cleanly apply onto 5.15.

Signed-off-by: Mathew McBride <matt@traverse.com.au>

[1] - see patch series "Fix rtnl_mutex deadlock with DPAA2 and SFP modules",
https://patchwork.kernel.org/project/netdevbpf/cover/20221129141221.872653-1-vladimir.oltean@nxp.com/
2023-06-13 14:12:32 +02:00

35 lines
1.4 KiB
Diff

From c314138bd045e050432158ab021160de3ba51c5e Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@armlinux.org.uk>
Date: Thu, 30 Jan 2020 22:42:38 +0000
Subject: [PATCH 2/4] net: dpaa2-mac: add support for more 10G modes
Phylink documentation says:
* Note that the PHY may be able to transform from one connection
* technology to another, so, eg, don't clear 1000BaseX just
* because the MAC is unable to BaseX mode. This is more about
* clearing unsupported speeds and duplex settings. The port modes
* should not be cleared; phylink_set_port_modes() will help with this.
So add the missing 10G modes.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
@@ -140,6 +140,12 @@ static void dpaa2_mac_validate(struct ph
case PHY_INTERFACE_MODE_10GBASER:
case PHY_INTERFACE_MODE_USXGMII:
phylink_set(mask, 10000baseT_Full);
+ phylink_set(mask, 10000baseKR_Full);
+ phylink_set(mask, 10000baseCR_Full);
+ phylink_set(mask, 10000baseSR_Full);
+ phylink_set(mask, 10000baseLR_Full);
+ phylink_set(mask, 10000baseLRM_Full);
+ phylink_set(mask, 10000baseER_Full);
if (state->interface == PHY_INTERFACE_MODE_10GBASER)
break;
phylink_set(mask, 5000baseT_Full);