armvirt: add 5.15 patches for NXP DPAA2 platform

This fixes an issue with NXP's DPAA2 platforms (LS1088/2088/LX2160)
* A deadlock issue when attempting to detach the SFP management from
  a PHY interface (e.g when trying to reboot). These issues were fixed
  in kernel 6.2[1], but it's version does not cleanly apply onto 5.15.

Signed-off-by: Mathew McBride <matt@traverse.com.au>

[1] - see patch series "Fix rtnl_mutex deadlock with DPAA2 and SFP modules",
https://patchwork.kernel.org/project/netdevbpf/cover/20221129141221.872653-1-vladimir.oltean@nxp.com/
This commit is contained in:
Mathew McBride 2022-07-15 02:47:52 +00:00 committed by Petr Štetiar
parent 23ca9a1677
commit 182fb97d8f
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2 changed files with 108 additions and 0 deletions

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@ -0,0 +1,74 @@
From d5af37ae22f0364be9ded773d737dd6e5b207b10 Mon Sep 17 00:00:00 2001
From: Ioana Ciornei <ioana.ciornei@nxp.com>
Date: Thu, 21 Nov 2019 21:15:25 +0200
Subject: [PATCH 3/4] dpaa2-eth: do not hold rtnl_lock on phylink_create() or
_destroy()
The rtnl_lock should not be held when calling phylink_create() or
phylink_destroy() since it leads to the deadlock listed below:
[ 18.656576] rtnl_lock+0x18/0x20
[ 18.659798] sfp_bus_add_upstream+0x28/0x90
[ 18.663974] phylink_create+0x2cc/0x828
[ 18.667803] dpaa2_mac_connect+0x14c/0x2a8
[ 18.671890] dpaa2_eth_connect_mac+0x94/0xd8
Fix this by moving the _lock() and _unlock() calls just outside of
phylink_of_phy_connect() and phylink_disconnect_phy().
Fixes: 719479230893 ("dpaa2-eth: add MAC/PHY support through phylink")
Reported-by: Russell King <linux@armlinux.org.uk>
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c | 4 ----
drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 4 ++++
2 files changed, 4 insertions(+), 4 deletions(-)
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-eth.c
@@ -4217,12 +4217,10 @@ static irqreturn_t dpni_irq0_handler_thr
dpaa2_eth_set_mac_addr(netdev_priv(net_dev));
dpaa2_eth_update_tx_fqids(priv);
- rtnl_lock();
if (dpaa2_eth_has_mac(priv))
dpaa2_eth_disconnect_mac(priv);
else
dpaa2_eth_connect_mac(priv);
- rtnl_unlock();
}
return IRQ_HANDLED;
@@ -4516,9 +4514,7 @@ static int dpaa2_eth_remove(struct fsl_m
#endif
unregister_netdev(net_dev);
- rtnl_lock();
dpaa2_eth_disconnect_mac(priv);
- rtnl_unlock();
dpaa2_eth_dl_port_del(priv);
dpaa2_eth_dl_traps_unregister(priv);
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
@@ -351,7 +351,9 @@ int dpaa2_mac_connect(struct dpaa2_mac *
if (mac->pcs)
phylink_set_pcs(mac->phylink, &mac->pcs->pcs);
+ rtnl_lock();
err = phylink_fwnode_phy_connect(mac->phylink, dpmac_node, 0);
+ rtnl_unlock();
if (err) {
netdev_err(net_dev, "phylink_fwnode_phy_connect() = %d\n", err);
goto err_phylink_destroy;
@@ -372,7 +374,9 @@ void dpaa2_mac_disconnect(struct dpaa2_m
if (!mac->phylink)
return;
+ rtnl_lock();
phylink_disconnect_phy(mac->phylink);
+ rtnl_unlock();
phylink_destroy(mac->phylink);
dpaa2_pcs_destroy(mac);
}

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@ -0,0 +1,34 @@
From c314138bd045e050432158ab021160de3ba51c5e Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@armlinux.org.uk>
Date: Thu, 30 Jan 2020 22:42:38 +0000
Subject: [PATCH 2/4] net: dpaa2-mac: add support for more 10G modes
Phylink documentation says:
* Note that the PHY may be able to transform from one connection
* technology to another, so, eg, don't clear 1000BaseX just
* because the MAC is unable to BaseX mode. This is more about
* clearing unsupported speeds and duplex settings. The port modes
* should not be cleared; phylink_set_port_modes() will help with this.
So add the missing 10G modes.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
---
drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
@@ -140,6 +140,12 @@ static void dpaa2_mac_validate(struct ph
case PHY_INTERFACE_MODE_10GBASER:
case PHY_INTERFACE_MODE_USXGMII:
phylink_set(mask, 10000baseT_Full);
+ phylink_set(mask, 10000baseKR_Full);
+ phylink_set(mask, 10000baseCR_Full);
+ phylink_set(mask, 10000baseSR_Full);
+ phylink_set(mask, 10000baseLR_Full);
+ phylink_set(mask, 10000baseLRM_Full);
+ phylink_set(mask, 10000baseER_Full);
if (state->interface == PHY_INTERFACE_MODE_10GBASER)
break;
phylink_set(mask, 5000baseT_Full);