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4108c0c1b6
- Mark patches as upstream - Backport more upstream changes - Handle conflicts and refresh patches Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
181 lines
4.0 KiB
Diff
181 lines
4.0 KiB
Diff
From 8f053e5616352943e16966f195f5a7a161e6fe7d Mon Sep 17 00:00:00 2001
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From: Mantas Pucka <mantas@8devices.com>
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Date: Thu, 25 Jan 2024 11:04:12 +0200
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Subject: [PATCH] arm64: dts: qcom: ipq6018: add thermal zones
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Add thermal zones to make use of thermal sensors data. For CPU zone,
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add cooling device that uses CPU frequency scaling.
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Signed-off-by: Mantas Pucka <mantas@8devices.com>
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Link: https://lore.kernel.org/r/1706173452-1017-4-git-send-email-mantas@8devices.com
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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---
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arch/arm64/boot/dts/qcom/ipq6018.dtsi | 121 ++++++++++++++++++++++++++
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1 file changed, 121 insertions(+)
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--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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@@ -9,6 +9,7 @@
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#include <dt-bindings/clock/qcom,gcc-ipq6018.h>
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#include <dt-bindings/reset/qcom,gcc-ipq6018.h>
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#include <dt-bindings/clock/qcom,apss-ipq.h>
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+#include <dt-bindings/thermal/thermal.h>
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/ {
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#address-cells = <2>;
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@@ -43,6 +44,7 @@
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clock-names = "cpu";
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operating-points-v2 = <&cpu_opp_table>;
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cpu-supply = <&ipq6018_s2>;
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+ #cooling-cells = <2>;
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};
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CPU1: cpu@1 {
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@@ -55,6 +57,7 @@
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clock-names = "cpu";
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operating-points-v2 = <&cpu_opp_table>;
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cpu-supply = <&ipq6018_s2>;
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+ #cooling-cells = <2>;
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};
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CPU2: cpu@2 {
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@@ -67,6 +70,7 @@
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clock-names = "cpu";
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operating-points-v2 = <&cpu_opp_table>;
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cpu-supply = <&ipq6018_s2>;
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+ #cooling-cells = <2>;
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};
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CPU3: cpu@3 {
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@@ -79,6 +83,7 @@
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clock-names = "cpu";
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operating-points-v2 = <&cpu_opp_table>;
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cpu-supply = <&ipq6018_s2>;
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+ #cooling-cells = <2>;
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};
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L2_0: l2-cache {
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@@ -888,6 +893,122 @@
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};
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};
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+ thermal-zones {
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+ nss-top-thermal {
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+ polling-delay-passive = <250>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&tsens 4>;
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+
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+ trips {
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+ nss-top-critical {
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+ temperature = <125000>;
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+ hysteresis = <1000>;
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+ type = "critical";
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+ };
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+ };
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+ };
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+
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+ nss-thermal {
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+ polling-delay-passive = <250>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&tsens 5>;
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+
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+ trips {
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+ nss-critical {
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+ temperature = <125000>;
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+ hysteresis = <1000>;
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+ type = "critical";
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+ };
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+ };
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+ };
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+
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+ wcss-phya0-thermal {
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+ polling-delay-passive = <250>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&tsens 7>;
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+
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+ trips {
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+ wcss-phya0-critical {
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+ temperature = <125000>;
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+ hysteresis = <1000>;
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+ type = "critical";
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+ };
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+ };
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+ };
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+
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+ wcss-phya1-thermal {
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+ polling-delay-passive = <250>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&tsens 8>;
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+
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+ trips {
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+ wcss-phya1-critical {
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+ temperature = <125000>;
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+ hysteresis = <1000>;
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+ type = "critical";
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+ };
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+ };
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+ };
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+
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+ cpu-thermal {
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+ polling-delay-passive = <250>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&tsens 13>;
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+
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+ trips {
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+ cpu-critical {
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+ temperature = <125000>;
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+ hysteresis = <1000>;
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+ type = "critical";
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+ };
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+
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+ cpu_alert: cpu-passive {
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+ temperature = <110000>;
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+ hysteresis = <1000>;
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+ type = "passive";
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+ };
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+ };
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+
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+ cooling-maps {
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+ map0 {
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+ trip = <&cpu_alert>;
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+ cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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+ <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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+ };
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+ };
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+ };
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+
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+ lpass-thermal {
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+ polling-delay-passive = <250>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&tsens 14>;
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+
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+ trips {
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+ lpass-critical {
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+ temperature = <125000>;
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+ hysteresis = <1000>;
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+ type = "critical";
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+ };
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+ };
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+ };
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+
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+ ddrss-top-thermal {
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+ polling-delay-passive = <250>;
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+ polling-delay = <1000>;
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+ thermal-sensors = <&tsens 15>;
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+
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+ trips {
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+ ddrss-top-critical {
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+ temperature = <125000>;
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+ hysteresis = <1000>;
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+ type = "critical";
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+ };
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+ };
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+ };
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+ };
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+
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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