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4108c0c1b6
- Mark patches as upstream - Backport more upstream changes - Handle conflicts and refresh patches Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
57 lines
1.8 KiB
Diff
57 lines
1.8 KiB
Diff
From 20afb6751739264ea41993877de93923911dfdc3 Mon Sep 17 00:00:00 2001
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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Date: Thu, 6 Oct 2022 14:46:27 +0200
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Subject: [PATCH] arm64: dts: qcom: ipq6018: align TLMM pin configuration with
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DT schema
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DT schema expects TLMM pin configuration nodes to be named with
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'-state' suffix and their optional children with '-pins' suffix.
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Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Reviewed-by: Bjorn Andersson <andersson@kernel.org>
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Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20221006124659.217540-3-krzysztof.kozlowski@linaro.org
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---
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arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts | 4 ++--
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arch/arm64/boot/dts/qcom/ipq6018.dtsi | 4 ++--
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2 files changed, 4 insertions(+), 4 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
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+++ b/arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dts
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@@ -51,13 +51,13 @@
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};
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&tlmm {
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- i2c_1_pins: i2c-1-pins {
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+ i2c_1_pins: i2c-1-state {
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pins = "gpio42", "gpio43";
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function = "blsp2_i2c";
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drive-strength = <8>;
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};
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- spi_0_pins: spi-0-pins {
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+ spi_0_pins: spi-0-state {
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pins = "gpio38", "gpio39", "gpio40", "gpio41";
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function = "blsp0_spi";
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drive-strength = <8>;
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--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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@@ -218,14 +218,14 @@
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interrupt-controller;
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#interrupt-cells = <2>;
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- serial_3_pins: serial3-pinmux {
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+ serial_3_pins: serial3-state {
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pins = "gpio44", "gpio45";
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function = "blsp2_uart";
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drive-strength = <8>;
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bias-pull-down;
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};
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- qpic_pins: qpic-pins {
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+ qpic_pins: qpic-state {
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pins = "gpio1", "gpio3", "gpio4",
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"gpio5", "gpio6", "gpio7",
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"gpio8", "gpio10", "gpio11",
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