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cddd459140
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release which was tagged LSDK-20.04-V5.4. https://source.codeaurora.org/external/qoriq/qoriq-components/linux/ For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in LSDK, port the dts patches from 4.14. The patches are sorted into the following categories: 301-arch-xxxx 302-dts-xxxx 303-core-xxxx 701-net-xxxx 801-audio-xxxx 802-can-xxxx 803-clock-xxxx 804-crypto-xxxx 805-display-xxxx 806-dma-xxxx 807-gpio-xxxx 808-i2c-xxxx 809-jailhouse-xxxx 810-keys-xxxx 811-kvm-xxxx 812-pcie-xxxx 813-pm-xxxx 814-qe-xxxx 815-sata-xxxx 816-sdhc-xxxx 817-spi-xxxx 818-thermal-xxxx 819-uart-xxxx 820-usb-xxxx 821-vfio-xxxx Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
59 lines
2.1 KiB
Diff
59 lines
2.1 KiB
Diff
From 5961ca6738507031a64f8580ceb8ab0b630d47a5 Mon Sep 17 00:00:00 2001
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From: Vladimir Oltean <vladimir.oltean@nxp.com>
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Date: Wed, 27 Nov 2019 19:21:13 +0200
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Subject: [PATCH] enetc: Set MDIO_CFG_HOLD to the recommended value of 2
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This increases the MDIO hold time to 5 enet_clk cycles from the previous
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value of 0. This is actually the out-of-reset value, that the driver was
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previously overwriting with 0. Zero worked for the external MDIO, but
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breaks communication with the internal MDIO buses on which the PCS of
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ENETC SI's and Felix switch are found.
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Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
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---
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drivers/net/ethernet/freescale/enetc/enetc_mdio.c | 12 ++++++++----
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1 file changed, 8 insertions(+), 4 deletions(-)
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--- a/drivers/net/ethernet/freescale/enetc/enetc_mdio.c
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+++ b/drivers/net/ethernet/freescale/enetc/enetc_mdio.c
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@@ -31,15 +31,19 @@ static inline void _enetc_mdio_wr(struct
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_enetc_mdio_wr(mdio_priv, ENETC_##off, val)
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#define enetc_mdio_rd_reg(off) enetc_mdio_rd(mdio_priv, off)
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-#define ENETC_MDC_DIV 258
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-
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#define MDIO_CFG_CLKDIV(x) ((((x) >> 1) & 0xff) << 8)
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#define MDIO_CFG_BSY BIT(0)
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#define MDIO_CFG_RD_ER BIT(1)
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+#define MDIO_CFG_HOLD(x) (((x) << 2) & GENMASK(4, 2))
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#define MDIO_CFG_ENC45 BIT(6)
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/* external MDIO only - driven on neg MDC edge */
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#define MDIO_CFG_NEG BIT(23)
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+#define ENETC_EMDIO_CFG \
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+ (MDIO_CFG_HOLD(2) | \
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+ MDIO_CFG_CLKDIV(258) | \
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+ MDIO_CFG_NEG)
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+
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#define MDIO_CTL_DEV_ADDR(x) ((x) & 0x1f)
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#define MDIO_CTL_PORT_ADDR(x) (((x) & 0x1f) << 5)
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#define MDIO_CTL_READ BIT(15)
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@@ -61,7 +65,7 @@ int enetc_mdio_write(struct mii_bus *bus
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u16 dev_addr;
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int ret;
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- mdio_cfg = MDIO_CFG_CLKDIV(ENETC_MDC_DIV) | MDIO_CFG_NEG;
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+ mdio_cfg = ENETC_EMDIO_CFG;
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if (regnum & MII_ADDR_C45) {
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dev_addr = (regnum >> 16) & 0x1f;
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mdio_cfg |= MDIO_CFG_ENC45;
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@@ -108,7 +112,7 @@ int enetc_mdio_read(struct mii_bus *bus,
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u16 dev_addr, value;
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int ret;
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- mdio_cfg = MDIO_CFG_CLKDIV(ENETC_MDC_DIV) | MDIO_CFG_NEG;
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+ mdio_cfg = ENETC_EMDIO_CFG;
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if (regnum & MII_ADDR_C45) {
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dev_addr = (regnum >> 16) & 0x1f;
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mdio_cfg |= MDIO_CFG_ENC45;
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