mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-19 05:38:00 +00:00
6a0a6c45ed
Backport upstreamed dts updates for rk3588. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/16149 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
49 lines
1.8 KiB
Diff
49 lines
1.8 KiB
Diff
From bbd3778da16b3d448832b843f80bcde1aff26290 Mon Sep 17 00:00:00 2001
|
|
From: Sebastian Reichel <sebastian.reichel@collabora.com>
|
|
Date: Fri, 20 Oct 2023 16:11:42 +0200
|
|
Subject: [PATCH] arm64: dts: rockchip: rk3588s: Add USB3 host controller
|
|
|
|
RK3588 has three USB3 controllers. This adds the host-only controller,
|
|
which is using the naneng-combphy shared with PCIe and SATA.
|
|
|
|
The other two are dual-role and using a different PHY that is not yet
|
|
supported upstream.
|
|
|
|
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
|
|
Link: https://lore.kernel.org/r/20231020150022.48725-4-sebastian.reichel@collabora.com
|
|
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
|
---
|
|
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 21 +++++++++++++++++++++
|
|
1 file changed, 21 insertions(+)
|
|
|
|
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
|
|
@@ -443,6 +443,27 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
+ usb_host2_xhci: usb@fcd00000 {
|
|
+ compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
|
|
+ reg = <0x0 0xfcd00000 0x0 0x400000>;
|
|
+ interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH 0>;
|
|
+ clocks = <&cru REF_CLK_USB3OTG2>, <&cru SUSPEND_CLK_USB3OTG2>,
|
|
+ <&cru ACLK_USB3OTG2>, <&cru CLK_UTMI_OTG2>,
|
|
+ <&cru CLK_PIPEPHY2_PIPE_U3_G>;
|
|
+ clock-names = "ref_clk", "suspend_clk", "bus_clk", "utmi", "pipe";
|
|
+ dr_mode = "host";
|
|
+ phys = <&combphy2_psu PHY_TYPE_USB3>;
|
|
+ phy-names = "usb3-phy";
|
|
+ phy_type = "utmi_wide";
|
|
+ resets = <&cru SRST_A_USB3OTG2>;
|
|
+ snps,dis_enblslpm_quirk;
|
|
+ snps,dis-u2-freeclk-exists-quirk;
|
|
+ snps,dis-del-phy-power-chg-quirk;
|
|
+ snps,dis-tx-ipgap-linecheck-quirk;
|
|
+ snps,dis_rxdet_inp3_quirk;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
pmu1grf: syscon@fd58a000 {
|
|
compatible = "rockchip,rk3588-pmugrf", "syscon", "simple-mfd";
|
|
reg = <0x0 0xfd58a000 0x0 0x10000>;
|