mirror of
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73832e1a48
Hardware specification:
SoC: MediaTek MT7986A 4x A53
Flash: ESMT F50L1G41LB 128MB
RAM: MT40A512M16TB-062ER 1GB
Ethernet: 2x 2.5G, 4x 1G Lan
WiFi1: MT7976GN 2.4GHz 4T4R
WiFi2: MT7976AN 5.2GHz 4T4R
WiFi3: MT7915AN 5.8GHz 4T4R
Button: Reset, WPS, Turbo
USB: 1 x USB 3.0
Power: DC 12V 5A
Flash instructions:
1. Execute the following operation to open nc shell:
https://openwrt.org/inbox/toh/tp-link/xdr-6086#rooting
2. Replace the stock bootloader to OpenWrt's:
dd bs=131072 conv=sync of=/dev/mtdblock9 if=/tmp/xxx-preloader.bin
dd bs=131072 conv=sync of=/dev/mtdblock9 seek=28 if=/tmp/xxx-bl31-uboot.fip
3. Connect to your PC via the Gigabit port of the router,
set a static ip on the ethernet interface of your PC.
4. Download the initramfs image, and restart the router,
waiting for tftp recovery to complete.
5. After openwrt boots up, perform sysupgrade.
Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Link: https://github.com/openwrt/openwrt/pull/15930
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
391 lines
6.7 KiB
Plaintext
391 lines
6.7 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "mt7986a.dtsi"
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/ {
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model = "TP-Link TL-XTR8488";
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compatible = "tplink,tl-xtr8488", "mediatek,mt7986a";
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aliases {
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serial0 = &uart0;
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label-mac-device = &gmac0;
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led-boot = &led_status_green;
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led-failsafe = &led_status_red;
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led-running = &led_status_green;
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led-upgrade = &led_status_red;
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};
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chosen {
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bootargs = "root=/dev/fit0 rootwait";
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rootdisk = <&ubi_rootdisk>;
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stdout-path = "serial0:115200n8";
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};
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memory {
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reg = <0 0x40000000 0 0x40000000>;
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};
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reg_3p3v: regulator-3p3v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-3.3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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reg_5v: regulator-5v {
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compatible = "regulator-fixed";
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regulator-name = "fixed-5V";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-boot-on;
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regulator-always-on;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 15 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 16 GPIO_ACTIVE_LOW>;
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};
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turbo {
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label = "turbo";
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linux,code = <BTN_1>;
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gpios = <&pio 11 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status_red: status-red {
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
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};
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led_status_green: status-green {
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
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};
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turbo {
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label = "green:turbo";
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&pio 12 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&crypto {
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status = "okay";
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cells = <&macaddr_config_1c 0>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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gmac1: mac@1 {
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compatible = "mediatek,eth-mac";
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reg = <1>;
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phy-handle = <&phy7>;
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phy-mode = "2500base-x";
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nvmem-cells = <&macaddr_config_1c 1>;
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nvmem-cell-names = "mac-address";
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};
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mdio: mdio-bus {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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&mdio {
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phy5: phy@5 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <5>;
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realtek,aldps-enable;
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};
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phy7: phy@7 {
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compatible = "ethernet-phy-ieee802.3-c45";
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reg = <7>;
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realtek,aldps-enable;
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};
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switch: switch@1f {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <66 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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};
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port@5 {
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reg = <5>;
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label = "lan5";
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phy-handle = <&phy5>;
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phy-mode = "2500base-x";
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi_flash_pins>;
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status = "okay";
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flash@0 {
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compatible = "spi-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0>;
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spi-max-frequency = <20000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "bl2";
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reg = <0x000000 0x0100000>;
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read-only;
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};
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partition@100000 {
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label = "config";
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reg = <0x100000 0x0040000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_config_1c: macaddr@1c {
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compatible = "mac-base";
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reg = <0x1c 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@140000 {
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label = "factory";
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reg = <0x140000 0x0040000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x1000>;
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};
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eeprom_factory_1000: eeprom@1000 {
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reg = <0x1000 0xe00>;
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};
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};
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};
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partition@180000 {
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label = "reserved";
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reg = <0x180000 0x0200000>;
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read-only;
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};
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partition@380000 {
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label = "fip";
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reg = <0x380000 0x0200000>;
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read-only;
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};
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partition@580000 {
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compatible = "linux,ubi";
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reg = <0x580000 0x7800000>;
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label = "ubi";
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volumes {
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ubi_rootdisk: ubi-volume-fit {
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volname = "fit";
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};
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};
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};
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};
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};
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};
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&pcie {
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_pins>;
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status = "okay";
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pcie@0,0 {
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reg = <0x0000 0 0 0 0>;
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wifi@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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ieee80211-freq-limit = <5470000 5875000>;
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nvmem-cells = <&eeprom_factory_1000>, <&macaddr_config_1c 3>;
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nvmem-cell-names = "eeprom", "mac-address";
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};
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};
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};
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&pcie_phy {
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status = "okay";
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};
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&pio {
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pcie_pins: pcie-pins {
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mux {
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function = "pcie";
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groups = "pcie_clk", "pcie_wake", "pcie_pereset";
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};
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};
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spi_flash_pins: spi-flash-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
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drive-strength = <8>;
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mediatek,pull-up-adv = <0>; /* bias-disable */
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};
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conf-pd {
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pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
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drive-strength = <8>;
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mediatek,pull-down-adv = <0>; /* bias-disable */
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};
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};
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wf_2g_5g_pins: wf_2g_5g-pins {
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mux {
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function = "wifi";
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groups = "wf_2g", "wf_5g";
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};
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conf {
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pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
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"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
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"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
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"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
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"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
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"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
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"WF1_TOP_CLK", "WF1_TOP_DATA";
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drive-strength = <4>;
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};
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};
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};
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&ssusb {
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vusb33-supply = <®_3p3v>;
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vbus-supply = <®_5v>;
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status = "okay";
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};
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&trng {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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pinctrl-names = "default";
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pinctrl-0 = <&wf_2g_5g_pins>;
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ieee80211-freq-limit = <2400000 2500000>, <5170000 5350000>;
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nvmem-cells = <&eeprom_factory_0>, <&macaddr_config_1c 2>;
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nvmem-cell-names = "eeprom", "mac-address";
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status = "okay";
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};
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