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8384c6d796
Radxa ROCK 3C is a high-performance, low-cost SBC[1] using the Rockchip RK3566. Hardware -------- - Rockchip RK3566 SoC - Quad A55 CPU - Mali-G52-2EE GPU - 1 TOPS @ INT8 NPU - 1GB/2GB/4GB LPDDR4 RAM - eMMC connector - Micro SD Card slot - NVMe SSD through the M.2 M Key connector(2230) or M.2 Extension board(2232/2260/2280) - SATA through the Radxa Penta SATA HAT - 1x Gigabit ethernet port(supports PoE with add-on PoE HAT) - WiFi6/BT5.4 (not supported yet on OpenWrt) - 1x USB 3.0 Type-A HOST port - 2x USB 2.0 Type-A HOST ports - 1x USB 2.0 Type-A OTG port - 40 Pin GPIO header [1] https://radxa.com/products/rock3/3c Installation ------------ Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://github.com/openwrt/openwrt/pull/16185 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
179 lines
4.7 KiB
Diff
179 lines
4.7 KiB
Diff
From e6e82ce24d4e9d20c232db2a95b2d10faf8f2bcf Mon Sep 17 00:00:00 2001
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From: Maxim Moskalets <maximmosk4@gmail.com>
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Date: Thu, 8 Aug 2024 22:37:10 +0300
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Subject: [PATCH] board: rockchip: add Radxa ROCK 3 Model C
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Based on rock-3a-rk3568_defconfig.
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Tested on v1.31 revision.
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Board Specifications:
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- Rockchip RK3566
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- 1/2/4GB LPDDR4 2112MT/s
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- eMMC socket
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- uSD card slot
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- M.2 2230 Connector
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- GbE LAN with POE
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- 3.5mm jack with mic
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- HDMI 2.0, MIPI DSI/CSI
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- USB 3.0 Host, USB 2.0 Host/OTG
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- 40-pin GPIO expansion ports
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Signed-off-by: Maxim Moskalets <maximmosk4@gmail.com>
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Suggested-by: Jonas Karlman <jonas@kwiboo.se>
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Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
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Tested-by: FUKAUMI Naoki <naoki@radxa.com>
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Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
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---
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arch/arm/dts/rk3566-rock-3c-u-boot.dtsi | 18 +++++
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board/rockchip/evb_rk3568/MAINTAINERS | 7 ++
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configs/rock-3c-rk3566_defconfig | 97 +++++++++++++++++++++++++
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doc/board/rockchip/rockchip.rst | 1 +
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4 files changed, 123 insertions(+)
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create mode 100644 arch/arm/dts/rk3566-rock-3c-u-boot.dtsi
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create mode 100644 configs/rock-3c-rk3566_defconfig
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--- /dev/null
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+++ b/arch/arm/dts/rk3566-rock-3c-u-boot.dtsi
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@@ -0,0 +1,18 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+#include "rk356x-u-boot.dtsi"
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+
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+&sfc {
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+ flash@0 {
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+ bootph-pre-ram;
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+ bootph-some-ram;
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+ };
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+};
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+
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+/ {
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+ leds {
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+ led-0 {
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+ default-state = "on";
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+ };
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+ };
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+};
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--- a/board/rockchip/evb_rk3568/MAINTAINERS
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+++ b/board/rockchip/evb_rk3568/MAINTAINERS
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@@ -69,3 +69,10 @@ S: Maintained
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F: configs/rock-3a-rk3568_defconfig
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F: arch/arm/dts/rk3568-rock-3a.dts
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F: arch/arm/dts/rk3568-rock-3a-u-boot.dtsi
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+
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+ROCK-3C
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+M: Jonas Karlman <jonas@kwiboo.se>
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+M: Maxim Moskalets <maximmosk4@gmail.com>
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+S: Maintained
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+F: arch/arm/dts/rk3566-rock-3c-u-boot.dtsi
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+F: configs/rock-3c-rk3566_defconfig
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--- /dev/null
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+++ b/configs/rock-3c-rk3566_defconfig
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@@ -0,0 +1,97 @@
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+CONFIG_ARM=y
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+CONFIG_SKIP_LOWLEVEL_INIT=y
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+CONFIG_COUNTER_FREQUENCY=24000000
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+CONFIG_ARCH_ROCKCHIP=y
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+CONFIG_SF_DEFAULT_SPEED=24000000
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+CONFIG_SF_DEFAULT_MODE=0x2000
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+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-rock-3c"
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+CONFIG_ROCKCHIP_RK3568=y
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+CONFIG_ROCKCHIP_SPI_IMAGE=y
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+CONFIG_SPL_SERIAL=y
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+CONFIG_DEBUG_UART_BASE=0xFE660000
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+CONFIG_DEBUG_UART_CLOCK=24000000
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+CONFIG_SPL_SPI_FLASH_SUPPORT=y
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+CONFIG_SPL_SPI=y
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+CONFIG_SYS_LOAD_ADDR=0xc00800
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+CONFIG_PCI=y
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+CONFIG_DEBUG_UART=y
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+CONFIG_AHCI=y
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+CONFIG_FIT=y
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+CONFIG_FIT_VERBOSE=y
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+CONFIG_SPL_FIT_SIGNATURE=y
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+CONFIG_SPL_LOAD_FIT=y
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+CONFIG_LEGACY_IMAGE_FORMAT=y
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+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-rock-3c.dtb"
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+# CONFIG_DISPLAY_CPUINFO is not set
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+CONFIG_DISPLAY_BOARDINFO_LATE=y
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+CONFIG_SPL_MAX_SIZE=0x40000
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+CONFIG_SPL_PAD_TO=0x7f8000
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+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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+CONFIG_SPL_SPI_LOAD=y
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+CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000
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+CONFIG_SPL_ATF=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_I2C=y
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+CONFIG_CMD_MMC=y
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+CONFIG_CMD_PCI=y
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+CONFIG_CMD_POWEROFF=y
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+CONFIG_CMD_USB=y
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+# CONFIG_CMD_SETEXPR is not set
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+CONFIG_CMD_PMIC=y
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+CONFIG_CMD_REGULATOR=y
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+# CONFIG_SPL_DOS_PARTITION is not set
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+CONFIG_SPL_OF_CONTROL=y
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+CONFIG_OF_LIVE=y
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+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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+CONFIG_SPL_DM_SEQ_ALIAS=y
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+CONFIG_SPL_REGMAP=y
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+CONFIG_SPL_SYSCON=y
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+CONFIG_SCSI_AHCI=y
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+CONFIG_AHCI_PCI=y
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+CONFIG_SPL_CLK=y
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+CONFIG_ROCKCHIP_GPIO=y
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+CONFIG_SYS_I2C_ROCKCHIP=y
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+CONFIG_LED=y
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+CONFIG_LED_GPIO=y
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+CONFIG_MISC=y
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+CONFIG_SUPPORT_EMMC_RPMB=y
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+CONFIG_MMC_DW=y
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+CONFIG_MMC_DW_ROCKCHIP=y
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+CONFIG_MMC_SDHCI=y
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+CONFIG_MMC_SDHCI_SDMA=y
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+CONFIG_MMC_SDHCI_ROCKCHIP=y
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+CONFIG_SF_DEFAULT_BUS=4
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+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
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+CONFIG_SPI_FLASH_GIGADEVICE=y
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+CONFIG_SPI_FLASH_MACRONIX=y
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+CONFIG_SPI_FLASH_WINBOND=y
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+CONFIG_SPI_FLASH_XTX=y
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+CONFIG_PHY_REALTEK=y
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+CONFIG_DWC_ETH_QOS=y
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+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
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+CONFIG_NVME_PCI=y
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+CONFIG_PCIE_DW_ROCKCHIP=y
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+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
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+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
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+CONFIG_SPL_PINCTRL=y
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+CONFIG_DM_PMIC=y
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+CONFIG_PMIC_RK8XX=y
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+CONFIG_REGULATOR_RK8XX=y
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+CONFIG_SPL_RAM=y
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+CONFIG_SCSI=y
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+CONFIG_BAUDRATE=1500000
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+CONFIG_DEBUG_UART_SHIFT=2
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+CONFIG_SYS_NS16550_MEM32=y
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+CONFIG_ROCKCHIP_SFC=y
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+CONFIG_SYSRESET=y
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+CONFIG_USB=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_EHCI_HCD=y
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+CONFIG_USB_EHCI_GENERIC=y
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+CONFIG_USB_OHCI_HCD=y
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+CONFIG_USB_OHCI_GENERIC=y
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+CONFIG_USB_DWC3=y
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+CONFIG_USB_DWC3_GENERIC=y
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+CONFIG_ERRNO_STR=y
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--- a/doc/board/rockchip/rockchip.rst
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+++ b/doc/board/rockchip/rockchip.rst
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@@ -106,6 +106,7 @@ List of mainline supported Rockchip boar
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- Pine64 SOQuartz on Model A (soquartz-model-a-rk3566)
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- Powkiddy X55 (powkiddy-x55-rk3566)
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- Radxa CM3 IO Board (radxa-cm3-io-rk3566)
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+ - Radxa ROCK 3C (rock-3c-rk3566)
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* rk3568
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- Rockchip Evb-RK3568 (evb-rk3568)
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