mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-24 07:46:48 +00:00
e8e7b3c106
This is an automatically generated commit which aids following Kernel patch history, as git will see the move and copy as a rename thus defeating the purpose. See: https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html for the original discussion. Signed-off-by: Robert Marko <robimarko@gmail.com>
156 lines
4.0 KiB
Diff
156 lines
4.0 KiB
Diff
From 125681433c8e526356947acf572fe8ca8ad32291 Mon Sep 17 00:00:00 2001
|
|
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
|
|
Date: Sat, 30 Jan 2021 10:50:05 +0530
|
|
Subject: [PATCH] remoteproc: qcom: Add PRNG proxy clock
|
|
|
|
PRNG clock is needed by the secure PIL, support for the same
|
|
is added in subsequent patches.
|
|
|
|
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
|
|
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
|
|
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
|
|
---
|
|
drivers/remoteproc/qcom_q6v5_wcss.c | 65 +++++++++++++++++++++--------
|
|
1 file changed, 47 insertions(+), 18 deletions(-)
|
|
|
|
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
|
|
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
|
|
@@ -91,19 +91,6 @@ enum {
|
|
WCSS_QCS404,
|
|
};
|
|
|
|
-struct wcss_data {
|
|
- const char *firmware_name;
|
|
- unsigned int crash_reason_smem;
|
|
- u32 version;
|
|
- bool aon_reset_required;
|
|
- bool wcss_q6_reset_required;
|
|
- const char *ssr_name;
|
|
- const char *sysmon_name;
|
|
- int ssctl_id;
|
|
- const struct rproc_ops *ops;
|
|
- bool requires_force_stop;
|
|
-};
|
|
-
|
|
struct q6v5_wcss {
|
|
struct device *dev;
|
|
|
|
@@ -128,6 +115,7 @@ struct q6v5_wcss {
|
|
struct clk *qdsp6ss_xo_cbcr;
|
|
struct clk *qdsp6ss_core_gfmux;
|
|
struct clk *lcc_bcr_sleep;
|
|
+ struct clk *prng_clk;
|
|
struct regulator *cx_supply;
|
|
struct qcom_sysmon *sysmon;
|
|
|
|
@@ -151,6 +139,21 @@ struct q6v5_wcss {
|
|
struct qcom_rproc_ssr ssr_subdev;
|
|
};
|
|
|
|
+struct wcss_data {
|
|
+ int (*init_clock)(struct q6v5_wcss *wcss);
|
|
+ int (*init_regulator)(struct q6v5_wcss *wcss);
|
|
+ const char *firmware_name;
|
|
+ unsigned int crash_reason_smem;
|
|
+ u32 version;
|
|
+ bool aon_reset_required;
|
|
+ bool wcss_q6_reset_required;
|
|
+ const char *ssr_name;
|
|
+ const char *sysmon_name;
|
|
+ int ssctl_id;
|
|
+ const struct rproc_ops *ops;
|
|
+ bool requires_force_stop;
|
|
+};
|
|
+
|
|
static int q6v5_wcss_reset(struct q6v5_wcss *wcss)
|
|
{
|
|
int ret;
|
|
@@ -240,6 +243,12 @@ static int q6v5_wcss_start(struct rproc
|
|
struct q6v5_wcss *wcss = rproc->priv;
|
|
int ret;
|
|
|
|
+ ret = clk_prepare_enable(wcss->prng_clk);
|
|
+ if (ret) {
|
|
+ dev_err(wcss->dev, "prng clock enable failed\n");
|
|
+ return ret;
|
|
+ }
|
|
+
|
|
qcom_q6v5_prepare(&wcss->q6v5);
|
|
|
|
/* Release Q6 and WCSS reset */
|
|
@@ -733,6 +742,7 @@ static int q6v5_wcss_stop(struct rproc *
|
|
return ret;
|
|
}
|
|
|
|
+ clk_disable_unprepare(wcss->prng_clk);
|
|
qcom_q6v5_unprepare(&wcss->q6v5);
|
|
|
|
return 0;
|
|
@@ -900,7 +910,21 @@ static int q6v5_alloc_memory_region(stru
|
|
return 0;
|
|
}
|
|
|
|
-static int q6v5_wcss_init_clock(struct q6v5_wcss *wcss)
|
|
+static int ipq8074_init_clock(struct q6v5_wcss *wcss)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ wcss->prng_clk = devm_clk_get(wcss->dev, "prng");
|
|
+ if (IS_ERR(wcss->prng_clk)) {
|
|
+ ret = PTR_ERR(wcss->prng_clk);
|
|
+ if (ret != -EPROBE_DEFER)
|
|
+ dev_err(wcss->dev, "Failed to get prng clock\n");
|
|
+ return ret;
|
|
+ }
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int qcs404_init_clock(struct q6v5_wcss *wcss)
|
|
{
|
|
int ret;
|
|
|
|
@@ -990,7 +1014,7 @@ static int q6v5_wcss_init_clock(struct q
|
|
return 0;
|
|
}
|
|
|
|
-static int q6v5_wcss_init_regulator(struct q6v5_wcss *wcss)
|
|
+static int qcs404_init_regulator(struct q6v5_wcss *wcss)
|
|
{
|
|
wcss->cx_supply = devm_regulator_get(wcss->dev, "cx");
|
|
if (IS_ERR(wcss->cx_supply))
|
|
@@ -1034,12 +1058,14 @@ static int q6v5_wcss_probe(struct platfo
|
|
if (ret)
|
|
goto free_rproc;
|
|
|
|
- if (wcss->version == WCSS_QCS404) {
|
|
- ret = q6v5_wcss_init_clock(wcss);
|
|
+ if (desc->init_clock) {
|
|
+ ret = desc->init_clock(wcss);
|
|
if (ret)
|
|
goto free_rproc;
|
|
+ }
|
|
|
|
- ret = q6v5_wcss_init_regulator(wcss);
|
|
+ if (desc->init_regulator) {
|
|
+ ret = desc->init_regulator(wcss);
|
|
if (ret)
|
|
goto free_rproc;
|
|
}
|
|
@@ -1087,6 +1113,7 @@ static int q6v5_wcss_remove(struct platf
|
|
}
|
|
|
|
static const struct wcss_data wcss_ipq8074_res_init = {
|
|
+ .init_clock = ipq8074_init_clock,
|
|
.firmware_name = "IPQ8074/q6_fw.mdt",
|
|
.crash_reason_smem = WCSS_CRASH_REASON,
|
|
.aon_reset_required = true,
|
|
@@ -1096,6 +1123,8 @@ static const struct wcss_data wcss_ipq80
|
|
};
|
|
|
|
static const struct wcss_data wcss_qcs404_res_init = {
|
|
+ .init_clock = qcs404_init_clock,
|
|
+ .init_regulator = qcs404_init_regulator,
|
|
.crash_reason_smem = WCSS_CRASH_REASON,
|
|
.firmware_name = "wcnss.mdt",
|
|
.version = WCSS_QCS404,
|