openwrt/target/linux/layerscape/patches-5.4/302-dts-0029-arm64-dts-lx2160-Add-all-pcs-mdio-definitions-accord.patch
Yangbo Lu cddd459140 layerscape: add patches-5.4
Add patches for linux-5.4. The patches are from NXP LSDK-20.04 release
which was tagged LSDK-20.04-V5.4.
https://source.codeaurora.org/external/qoriq/qoriq-components/linux/

For boards LS1021A-IOT, and Traverse-LS1043 which are not involved in
LSDK, port the dts patches from 4.14.

The patches are sorted into the following categories:
  301-arch-xxxx
  302-dts-xxxx
  303-core-xxxx
  701-net-xxxx
  801-audio-xxxx
  802-can-xxxx
  803-clock-xxxx
  804-crypto-xxxx
  805-display-xxxx
  806-dma-xxxx
  807-gpio-xxxx
  808-i2c-xxxx
  809-jailhouse-xxxx
  810-keys-xxxx
  811-kvm-xxxx
  812-pcie-xxxx
  813-pm-xxxx
  814-qe-xxxx
  815-sata-xxxx
  816-sdhc-xxxx
  817-spi-xxxx
  818-thermal-xxxx
  819-uart-xxxx
  820-usb-xxxx
  821-vfio-xxxx

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2020-05-07 12:53:06 +02:00

108 lines
2.5 KiB
Diff

From 39c8c9b6e4db9694935fe4a856ea66ff36ace7d0 Mon Sep 17 00:00:00 2001
From: Florinel Iordache <florinel.iordache@nxp.com>
Date: Tue, 30 Oct 2018 09:42:39 +0200
Subject: [PATCH] arm64: dts: lx2160: Add all pcs mdio definitions according to
RM
This change is required in preparation for adding 40GBase-KR support in DTS for LX2160
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
---
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 85 ++++++++++++++++++++++++++
1 file changed, 85 insertions(+)
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -500,6 +500,91 @@
#size-cells = <0>;
};
+ pcs_mdio1: mdio@0x8c07000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c07000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio2: mdio@0x8c0b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0b000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio3: mdio@0x8c0f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c0f000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio4: mdio@0x8c13000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c13000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio5: mdio@0x8c17000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c17000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio6: mdio@0x8c1b000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c1b000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio7: mdio@0x8c1f000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c1f000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ pcs_mdio8: mdio@0x8c23000 {
+ compatible = "fsl,fman-memac-mdio";
+ reg = <0x0 0x8c23000 0x0 0x1000>;
+ device_type = "mdio";
+ little-endian;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ serdes1: serdes@1ea0000 {
+ reg = <0x0 0x1ea0000 0 0x00002000>;
+ compatible = "fsl,serdes-28g";
+ };
+
i2c0: i2c@2000000 {
compatible = "fsl,vf610-i2c";
#address-cells = <1>;