mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 06:33:41 +00:00
e504fdae4e
Add pending patches from Alexander 'lynxis' Couzens which are required for RealTek NBase-T PHYs or SFP+ cages to work when connected to the SGMII interface provided by recent MediaTek SoCs [1]. The patches for MT753x fix link speed limitation on CPU ports observed by many users which is due to reset being carried out wrongly [2]. [1]: https://patchwork.kernel.org/project/netdevbpf/list/?series=669488&state=* [2]: https://patchwork.kernel.org/project/netdevbpf/list/?series=669486&state=* Signed-off-by: Daniel Golle <daniel@makrotopia.org>
68 lines
1.7 KiB
Diff
68 lines
1.7 KiB
Diff
From 9fec662b54fc956b776df15c704e996c61292850 Mon Sep 17 00:00:00 2001
|
|
From: Alexander Couzens <lynxis@fe80.eu>
|
|
Date: Sat, 13 Aug 2022 13:05:09 +0200
|
|
Subject: [PATCH 02/10] net: mt7531: only do PLL once after the reset
|
|
|
|
Move the PLL init of the switch out of the pad configuration of the port
|
|
6 (usally cpu port).
|
|
|
|
Fix a unidirectional 100 mbit limitation on 1 gbit or 2.5 gbit links for
|
|
outbound traffic on port 5 or port 6.
|
|
|
|
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
|
|
---
|
|
drivers/net/dsa/mt7530.c | 15 +++++++++------
|
|
1 file changed, 9 insertions(+), 6 deletions(-)
|
|
|
|
--- a/drivers/net/dsa/mt7530.c
|
|
+++ b/drivers/net/dsa/mt7530.c
|
|
@@ -506,14 +506,19 @@ static bool mt7531_dual_sgmii_supported(
|
|
static int
|
|
mt7531_pad_setup(struct dsa_switch *ds, phy_interface_t interface)
|
|
{
|
|
- struct mt7530_priv *priv = ds->priv;
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static void
|
|
+mt7531_pll_setup(struct mt7530_priv *priv)
|
|
+{
|
|
u32 top_sig;
|
|
u32 hwstrap;
|
|
u32 xtal;
|
|
u32 val;
|
|
|
|
if (mt7531_dual_sgmii_supported(priv))
|
|
- return 0;
|
|
+ return;
|
|
|
|
val = mt7530_read(priv, MT7531_CREV);
|
|
top_sig = mt7530_read(priv, MT7531_TOP_SIG_SR);
|
|
@@ -592,8 +597,6 @@ mt7531_pad_setup(struct dsa_switch *ds,
|
|
val |= EN_COREPLL;
|
|
mt7530_write(priv, MT7531_PLLGP_EN, val);
|
|
usleep_range(25, 35);
|
|
-
|
|
- return 0;
|
|
}
|
|
|
|
static void
|
|
@@ -2326,6 +2329,8 @@ mt7531_setup(struct dsa_switch *ds)
|
|
SYS_CTRL_PHY_RST | SYS_CTRL_SW_RST |
|
|
SYS_CTRL_REG_RST);
|
|
|
|
+ mt7531_pll_setup(priv);
|
|
+
|
|
if (mt7531_dual_sgmii_supported(priv)) {
|
|
priv->p5_intf_sel = P5_INTF_SEL_GMAC5_SGMII;
|
|
|
|
@@ -2882,8 +2887,6 @@ mt7531_cpu_port_config(struct dsa_switch
|
|
case 6:
|
|
interface = PHY_INTERFACE_MODE_2500BASEX;
|
|
|
|
- mt7531_pad_setup(ds, interface);
|
|
-
|
|
priv->p6_interface = interface;
|
|
break;
|
|
default:
|