mirror of
https://github.com/openwrt/openwrt.git
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59fc334ed0
Radxa ZERO 3E and 3W are light, compact and tiny SBC[1][2] using the Rockchip RK3566. Hardware -------- - Rockchip RK3566 SoC - Quad A55 CPU - Mali-G52-2EE GPU - 1 TOPS @ INT8 NPU - 1GB/2GB/4GB/8G LPDDR4 RAM - Optional 8GB/16GB/32GB/64GB eMMC (3E) - Micro SD Card slot - 1x Gigabit ethernet port (supports PoE with add-on PoE HAT) (3E) - WiFi6/BT5.4 (3W) (not supported yet on OpenWrt) - 1x USB 3.0 Type-C HOST port - 1x USB 2.0 Type-C OTG port - Optional 40 Pin GPIO header [1] https://radxa.com/products/zeros/zero3e [2] https://radxa.com/products/zeros/zero3w Installation ------------ Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://github.com/openwrt/openwrt/pull/16185 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
658 lines
14 KiB
Diff
658 lines
14 KiB
Diff
From 1a5c8d307c83c808a32686ed51afb4bac2092d39 Mon Sep 17 00:00:00 2001
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From: Jonas Karlman <jonas@kwiboo.se>
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Date: Tue, 21 May 2024 20:28:05 +0000
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Subject: [PATCH] arm64: dts: rockchip: Add Radxa ZERO 3W/3E
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The Radxa ZERO 3W/3E is an ultra-small, high-performance single board
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computer based on the Rockchip RK3566, with a compact form factor and
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rich interfaces.
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The ZERO 3W and ZERO 3E are basically the same size and model, but
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differ only in storage and network interfaces.
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- eMMC (3W)
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- SD-card (both)
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- Ethernet (3E)
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- WiFi/BT (3W)
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Add initial support for eMMC, SD-card, Ethernet, HDMI and USB.
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Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
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Link: https://lore.kernel.org/r/20240521202810.1225636-3-jonas@kwiboo.se
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 2 +
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.../dts/rockchip/rk3566-radxa-zero-3.dtsi | 463 ++++++++++++++++++
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.../dts/rockchip/rk3566-radxa-zero-3e.dts | 51 ++
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.../dts/rockchip/rk3566-radxa-zero-3w.dts | 91 ++++
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4 files changed, 607 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -80,6 +80,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pi
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-cm3-io.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-zero-3e.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-zero-3w.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-roc-pc.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-rock-3c.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-blade.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
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@@ -0,0 +1,463 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/soc/rockchip,vop2.h>
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+#include "rk3566.dtsi"
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+
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+/ {
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+ aliases {
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+ mmc0 = &sdmmc0;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ hdmi-con {
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+ compatible = "hdmi-connector";
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+ type = "d";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&user_led2>;
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+
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+ led-green {
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+ color = <LED_COLOR_ID_GREEN>;
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+ default-state = "on";
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+ function = LED_FUNCTION_HEARTBEAT;
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+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ };
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+ };
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+
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+ vcc_1v8: regulator-1v8-vcc {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_1v8_p>;
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+ };
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+
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+ vcca_1v8: regulator-1v8-vcca {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcca_1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_1v8_p>;
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+ };
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+
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+ vcca1v8_image: regulator-1v8-vcca-image {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcca1v8_image";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_1v8_p>;
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+ };
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+
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+ vcc_3v3: regulator-3v3-vcc {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_3v3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ vcc_sys: regulator-5v0-vcc-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+};
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+
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+&combphy1 {
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+ status = "okay";
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu_npu>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ avdd-0v9-supply = <&vdda_0v9>;
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+ avdd-1v8-supply = <&vcca1v8_image>;
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+ status = "okay";
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+};
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+
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+&hdmi_in {
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+ hdmi_in_vp0: endpoint {
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+ remote-endpoint = <&vp0_out_hdmi>;
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+ };
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+};
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+
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+&hdmi_out {
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+ hdmi_out_con: endpoint {
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+ remote-endpoint = <&hdmi_con_in>;
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+ };
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+};
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+
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+&hdmi_sound {
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+
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+ rk817: pmic@20 {
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+ compatible = "rockchip,rk817";
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+ reg = <0x20>;
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+ #clock-cells = <1>;
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+ clock-output-names = "rk817-clkout1", "rk817-clkout2";
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int_l>;
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+ system-power-controller;
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+ wakeup-source;
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+
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+ vcc1-supply = <&vcc_sys>;
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+ vcc2-supply = <&vcc_sys>;
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+ vcc3-supply = <&vcc_sys>;
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+ vcc4-supply = <&vcc_sys>;
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+ vcc5-supply = <&vcc_sys>;
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+ vcc6-supply = <&vcc_sys>;
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+ vcc7-supply = <&vcc_sys>;
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+ vcc8-supply = <&vcc_sys>;
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+ vcc9-supply = <&vcc5v_midu>;
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-name = "vdd_logic";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ regulator-suspend-microvolt = <900000>;
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+ };
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+ };
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+
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+ vdd_gpu_npu: DCDC_REG2 {
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+ regulator-name = "vdd_gpu_npu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vcc3v3_sys: DCDC_REG4 {
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcca1v8_pmu: LDO_REG1 {
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+ regulator-name = "vcca1v8_pmu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vdda_0v9: LDO_REG2 {
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+ regulator-name = "vdda_0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdda0v9_pmu: LDO_REG3 {
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+ regulator-name = "vdda0v9_pmu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <900000>;
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+ };
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+ };
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+
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+ vccio_acodec: LDO_REG4 {
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+ regulator-name = "vccio_acodec";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vccio_sd: LDO_REG5 {
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+ regulator-name = "vccio_sd";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc3v3_pmu: LDO_REG6 {
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+ regulator-name = "vcc3v3_pmu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcc_1v8_p: LDO_REG7 {
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+ regulator-name = "vcc_1v8_p";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc1v8_dvp: LDO_REG8 {
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+ regulator-name = "vcc1v8_dvp";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc2v8_dvp: LDO_REG9 {
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+ regulator-name = "vcc2v8_dvp";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <2800000>;
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+ regulator-max-microvolt = <2800000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc5v_midu: BOOST {
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+ regulator-name = "vcc5v_midu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vbus: OTG_SWITCH {
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+ regulator-name = "vbus";
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+ };
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+ };
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+
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+ vdd_cpu: regulator@40 {
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+ compatible = "rockchip,rk8600";
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+ reg = <0x40>;
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+ fcs,suspend-voltage-selector = <1>;
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+ regulator-name = "vdd_cpu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <712500>;
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+ regulator-max-microvolt = <1390000>;
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+ regulator-ramp-delay = <2300>;
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+ vin-supply = <&vcc_sys>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+};
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+
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+&i2s0_8ch {
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+ status = "okay";
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+};
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+
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+&pinctrl {
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+ leds {
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+ user_led2: user-led2 {
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+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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+
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+ pmic {
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+ pmic_int_l: pmic-int-l {
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+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+};
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+
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+&pmu_io_domains {
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+ pmuio1-supply = <&vcc3v3_pmu>;
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+ pmuio2-supply = <&vcca1v8_pmu>;
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+ vccio1-supply = <&vccio_acodec>;
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+ vccio2-supply = <&vcc_1v8>;
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+ vccio3-supply = <&vccio_sd>;
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+ vccio4-supply = <&vcc_1v8>;
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+ vccio5-supply = <&vcc_3v3>;
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+ vccio6-supply = <&vcc_3v3>;
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+ vccio7-supply = <&vcc_3v3>;
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+ status = "okay";
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+};
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+
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+&saradc {
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+ vref-supply = <&vcca_1v8>;
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+ status = "okay";
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+};
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+
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+&sdmmc0 {
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+ bus-width = <4>;
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+ cap-sd-highspeed;
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+ disable-wp;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
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+ vmmc-supply = <&vcc3v3_sys>;
|
|
+ vqmmc-supply = <&vccio_sd>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&tsadc {
|
|
+ rockchip,hw-tshut-mode = <1>;
|
|
+ rockchip,hw-tshut-polarity = <0>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart2 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host0_xhci {
|
|
+ dr_mode = "peripheral";
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb_host1_xhci {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0 {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0_host {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&usb2phy0_otg {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop {
|
|
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
|
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vop_mmu {
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&vp0 {
|
|
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
|
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
|
+ remote-endpoint = <&hdmi_in_vp0>;
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts
|
|
@@ -0,0 +1,51 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include "rk3566-radxa-zero-3.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "Radxa ZERO 3E";
|
|
+ compatible = "radxa,zero-3e", "rockchip,rk3566";
|
|
+
|
|
+ aliases {
|
|
+ ethernet0 = &gmac1;
|
|
+ };
|
|
+};
|
|
+
|
|
+&gmac1 {
|
|
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
|
|
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
|
|
+ clock_in_out = "input";
|
|
+ phy-handle = <&rgmii_phy1>;
|
|
+ phy-mode = "rgmii-id";
|
|
+ phy-supply = <&vcc_3v3>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gmac1m1_miim
|
|
+ &gmac1m1_tx_bus2
|
|
+ &gmac1m1_rx_bus2
|
|
+ &gmac1m1_rgmii_clk
|
|
+ &gmac1m1_rgmii_bus
|
|
+ &gmac1m1_clkinout>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&mdio1 {
|
|
+ rgmii_phy1: ethernet-phy@1 {
|
|
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
+ reg = <1>;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&gmac1_rstn>;
|
|
+ reset-assert-us = <20000>;
|
|
+ reset-deassert-us = <50000>;
|
|
+ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ gmac1 {
|
|
+ gmac1_rstn: gmac1-rstn {
|
|
+ rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts
|
|
@@ -0,0 +1,91 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
+
|
|
+/dts-v1/;
|
|
+
|
|
+#include "rk3566-radxa-zero-3.dtsi"
|
|
+
|
|
+/ {
|
|
+ model = "Radxa ZERO 3W";
|
|
+ compatible = "radxa,zero-3w", "rockchip,rk3566";
|
|
+
|
|
+ aliases {
|
|
+ mmc1 = &sdhci;
|
|
+ mmc2 = &sdmmc1;
|
|
+ };
|
|
+
|
|
+ sdio_pwrseq: sdio-pwrseq {
|
|
+ compatible = "mmc-pwrseq-simple";
|
|
+ clocks = <&rk817 1>;
|
|
+ clock-names = "ext_clock";
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&wifi_reg_on_h>;
|
|
+ post-power-on-delay-ms = <100>;
|
|
+ power-off-delay-us = <5000000>;
|
|
+ reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&pinctrl {
|
|
+ bluetooth {
|
|
+ bt_reg_on_h: bt-reg-on-h {
|
|
+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ bt_wake_host_h: bt-wake-host-h {
|
|
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ host_wake_bt_h: host-wake-bt-h {
|
|
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ wifi {
|
|
+ wifi_reg_on_h: wifi-reg-on-h {
|
|
+ rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+
|
|
+ wifi_wake_host_h: wifi-wake-host-h {
|
|
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
+ };
|
|
+ };
|
|
+};
|
|
+
|
|
+&sdhci {
|
|
+ bus-width = <8>;
|
|
+ cap-mmc-highspeed;
|
|
+ max-frequency = <200000000>;
|
|
+ mmc-hs200-1_8v;
|
|
+ no-sd;
|
|
+ no-sdio;
|
|
+ non-removable;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
|
+ vmmc-supply = <&vcc_3v3>;
|
|
+ vqmmc-supply = <&vcc_1v8>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&sdmmc1 {
|
|
+ bus-width = <4>;
|
|
+ cap-sd-highspeed;
|
|
+ cap-sdio-irq;
|
|
+ keep-power-in-suspend;
|
|
+ mmc-pwrseq = <&sdio_pwrseq>;
|
|
+ no-mmc;
|
|
+ no-sd;
|
|
+ non-removable;
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>;
|
|
+ sd-uhs-sdr104;
|
|
+ vmmc-supply = <&vcc_3v3>;
|
|
+ vqmmc-supply = <&vcc_1v8>;
|
|
+ status = "okay";
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ pinctrl-names = "default";
|
|
+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
|
|
+ uart-has-rtscts;
|
|
+ status = "okay";
|
|
+};
|