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rockchip: add support for Radxa ZERO 3E and 3W
Radxa ZERO 3E and 3W are light, compact and tiny SBC[1][2] using the Rockchip RK3566. Hardware -------- - Rockchip RK3566 SoC - Quad A55 CPU - Mali-G52-2EE GPU - 1 TOPS @ INT8 NPU - 1GB/2GB/4GB/8G LPDDR4 RAM - Optional 8GB/16GB/32GB/64GB eMMC (3E) - Micro SD Card slot - 1x Gigabit ethernet port (supports PoE with add-on PoE HAT) (3E) - WiFi6/BT5.4 (3W) (not supported yet on OpenWrt) - 1x USB 3.0 Type-C HOST port - 1x USB 2.0 Type-C OTG port - Optional 40 Pin GPIO header [1] https://radxa.com/products/zeros/zero3e [2] https://radxa.com/products/zeros/zero3w Installation ------------ Uncompress the OpenWrt sysupgrade and write it to a micro SD card or internal eMMC using dd. Signed-off-by: FUKAUMI Naoki <naoki@radxa.com> Link: https://github.com/openwrt/openwrt/pull/16185 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This commit is contained in:
FUKAUMI Naoki
Hauke Mehrtens
parent
8384c6d796
commit
59fc334ed0
@ -167,6 +167,14 @@ define U-Boot/radxa-cm3-io-rk3566
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radxa_cm3-io
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endef
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define U-Boot/radxa-zero-3-rk3566
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$(U-Boot/rk3566/Default)
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NAME:=ZERO 3E/3W
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BUILD_DEVICES:= \
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radxa_zero-3e \
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radxa_zero-3w
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endef
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define U-Boot/rock-3c-rk3566
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$(U-Boot/rk3566/Default)
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NAME:=ROCK 3C
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@ -277,6 +285,7 @@ UBOOT_TARGETS := \
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rock-pi-e-rk3328 \
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rock-pi-e-v3-rk3328 \
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radxa-cm3-io-rk3566 \
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radxa-zero-3-rk3566 \
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rock-3c-rk3566 \
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bpi-r2-pro-rk3568 \
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nanopi-r5c-rk3568 \
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@ -1494,3 +1494,687 @@
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+ remote-endpoint = <&hdmi_in_vp0>;
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+ };
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+};
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--- /dev/null
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+++ b/dts/upstream/src/arm64/rockchip/rk3566-radxa-zero-3.dtsi
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@@ -0,0 +1,531 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/leds/common.h>
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+#include <dt-bindings/soc/rockchip,vop2.h>
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+#include "rk3566.dtsi"
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+
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+/ {
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+ chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ hdmi-con {
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+ compatible = "hdmi-connector";
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+ type = "d";
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+
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+ port {
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+ hdmi_con_in: endpoint {
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+ remote-endpoint = <&hdmi_out_con>;
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+ };
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+ };
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&user_led2>;
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+
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+ led-green {
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+ color = <LED_COLOR_ID_GREEN>;
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+ default-state = "on";
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+ function = LED_FUNCTION_HEARTBEAT;
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+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "heartbeat";
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+ };
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+ };
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+
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+ vcc_1v8: regulator-1v8-vcc {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_1v8_p>;
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+ };
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+
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+ vcca_1v8: regulator-1v8-vcca {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcca_1v8";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_1v8_p>;
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+ };
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+
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+ vcca1v8_image: regulator-1v8-vcca-image {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcca1v8_image";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ vin-supply = <&vcc_1v8_p>;
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+ };
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+
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+ vcc_3v3: regulator-3v3-vcc {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_3v3";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ vin-supply = <&vcc3v3_sys>;
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+ };
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+
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+ vcc_sys: regulator-5v0-vcc-sys {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <5000000>;
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+ regulator-max-microvolt = <5000000>;
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+ };
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+};
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+
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+&combphy1 {
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+ status = "okay";
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+};
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+
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+&cpu0 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu1 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu2 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&cpu3 {
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+ cpu-supply = <&vdd_cpu>;
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+};
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+
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+&gpio0 {
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+ gpio-line-names =
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+ /* GPIO0_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO0_B0 - B7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO0_C0 - C7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO0_D0 - D7 */
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+ "pin-10 [GPIO0_D0]", "pin-08 [GPIO0_D1]", "",
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+ "", "", "", "", "";
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+};
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+
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+&gpio1 {
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+ gpio-line-names =
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+ /* GPIO1_A0 - A7 */
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+ "pin-03 [GPIO1_A0]", "pin-05 [GPIO1_A1]", "",
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+ "", "pin-37 [GPIO1_A4]", "",
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+ "", "",
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+ /* GPIO1_B0 - B7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO1_C0 - C7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO1_D0 - D7 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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+&gpio2 {
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+ gpio-line-names =
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+ /* GPIO2_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO2_B0 - B7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO2_C0 - C7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO2_D0 - D7 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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+&gpio3 {
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+ gpio-line-names =
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+ /* GPIO3_A0 - A7 */
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+ "", "pin-11 [GPIO3_A1]", "pin-13 [GPIO3_A2]",
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+ "pin-12 [GPIO3_A3]", "pin-35 [GPIO3_A4]", "pin-40 [GPIO3_A5]",
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+ "pin-38 [GPIO3_A6]", "pin-36 [GPIO3_A7]",
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+ /* GPIO3_B0 - B7 */
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+ "pin-15 [GPIO3_B0]", "pin-16 [GPIO3_B1]", "pin-18 [GPIO3_B2]",
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+ "pin-29 [GPIO3_B3]", "pin-31 [GPIO3_B4]", "",
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+ "", "",
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+ /* GPIO3_C0 - C7 */
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+ "", "pin-22 [GPIO3_C1]", "pin-32 [GPIO3_C2]",
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+ "pin-33 [GPIO3_C3]", "pin-07 [GPIO3_C4]", "",
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+ "", "",
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+ /* GPIO3_D0 - D7 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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+&gpio4 {
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+ gpio-line-names =
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+ /* GPIO4_A0 - A7 */
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+ "", "", "", "", "", "", "", "",
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+ /* GPIO4_B0 - B7 */
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+ "", "", "pin-27 [GPIO4_B2]",
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+ "pin-28 [GPIO4_B3]", "", "", "", "",
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+ /* GPIO4_C0 - C7 */
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+ "", "", "pin-23 [GPIO4_C2]",
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+ "pin-19 [GPIO4_C3]", "", "pin-21 [GPIO4_C5]",
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+ "pin-24 [GPIO4_C6]", "",
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+ /* GPIO4_D0 - D7 */
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+ "", "", "", "", "", "", "", "";
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+};
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+
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+&gpu {
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+ mali-supply = <&vdd_gpu_npu>;
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+ status = "okay";
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+};
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+
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+&hdmi {
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+ avdd-0v9-supply = <&vdda_0v9>;
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+ avdd-1v8-supply = <&vcca1v8_image>;
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+ status = "okay";
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+};
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+
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+&hdmi_in {
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+ hdmi_in_vp0: endpoint {
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+ remote-endpoint = <&vp0_out_hdmi>;
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+ };
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+};
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+
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+&hdmi_out {
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+ hdmi_out_con: endpoint {
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+ remote-endpoint = <&hdmi_con_in>;
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+ };
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+};
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+
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+&hdmi_sound {
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+ status = "okay";
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+};
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+
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+&i2c0 {
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+ status = "okay";
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+
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+ rk817: pmic@20 {
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+ compatible = "rockchip,rk817";
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+ reg = <0x20>;
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+ #clock-cells = <1>;
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+ clock-output-names = "rk817-clkout1", "rk817-clkout2";
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+ interrupt-parent = <&gpio0>;
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+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pmic_int_l>;
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+ system-power-controller;
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+ wakeup-source;
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+
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+ vcc1-supply = <&vcc_sys>;
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+ vcc2-supply = <&vcc_sys>;
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+ vcc3-supply = <&vcc_sys>;
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+ vcc4-supply = <&vcc_sys>;
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+ vcc5-supply = <&vcc_sys>;
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+ vcc6-supply = <&vcc_sys>;
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+ vcc7-supply = <&vcc_sys>;
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+ vcc8-supply = <&vcc_sys>;
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+ vcc9-supply = <&vcc5v_midu>;
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+
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+ regulators {
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+ vdd_logic: DCDC_REG1 {
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+ regulator-name = "vdd_logic";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ regulator-suspend-microvolt = <900000>;
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+ };
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+ };
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+
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+ vdd_gpu_npu: DCDC_REG2 {
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+ regulator-name = "vdd_gpu_npu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <500000>;
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+ regulator-max-microvolt = <1350000>;
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+ regulator-ramp-delay = <6001>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc_ddr: DCDC_REG3 {
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+ regulator-name = "vcc_ddr";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ };
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+ };
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+
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+ vcc3v3_sys: DCDC_REG4 {
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+ regulator-name = "vcc3v3_sys";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-initial-mode = <0x2>;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcca1v8_pmu: LDO_REG1 {
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+ regulator-name = "vcca1v8_pmu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <1800000>;
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+ };
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+ };
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+
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+ vdda_0v9: LDO_REG2 {
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+ regulator-name = "vdda_0v9";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vdda0v9_pmu: LDO_REG3 {
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+ regulator-name = "vdda0v9_pmu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <900000>;
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+ regulator-max-microvolt = <900000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <900000>;
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+ };
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+ };
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+
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+ vccio_acodec: LDO_REG4 {
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+ regulator-name = "vccio_acodec";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vccio_sd: LDO_REG5 {
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+ regulator-name = "vccio_sd";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc3v3_pmu: LDO_REG6 {
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+ regulator-name = "vcc3v3_pmu";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+
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+ regulator-state-mem {
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+ regulator-on-in-suspend;
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+ regulator-suspend-microvolt = <3300000>;
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+ };
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+ };
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+
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+ vcc_1v8_p: LDO_REG7 {
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+ regulator-name = "vcc_1v8_p";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
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+ };
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+
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+ vcc1v8_dvp: LDO_REG8 {
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+ regulator-name = "vcc1v8_dvp";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <1800000>;
|
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+ regulator-max-microvolt = <1800000>;
|
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+
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+ regulator-state-mem {
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+ regulator-off-in-suspend;
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+ };
|
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+ };
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+
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+ vcc2v8_dvp: LDO_REG9 {
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+ regulator-name = "vcc2v8_dvp";
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+ regulator-always-on;
|
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+ regulator-boot-on;
|
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+ regulator-min-microvolt = <2800000>;
|
||||
+ regulator-max-microvolt = <2800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc5v_midu: BOOST {
|
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+ regulator-name = "vcc5v_midu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
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+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
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+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vbus: OTG_SWITCH {
|
||||
+ regulator-name = "vbus";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_cpu: regulator@40 {
|
||||
+ compatible = "rockchip,rk8600";
|
||||
+ reg = <0x40>;
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ regulator-name = "vdd_cpu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1390000>;
|
||||
+ regulator-ramp-delay = <2300>;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2s0_8ch {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ leds {
|
||||
+ user_led2: user-led2 {
|
||||
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int_l: pmic-int-l {
|
||||
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pmu_io_domains {
|
||||
+ pmuio1-supply = <&vcc3v3_pmu>;
|
||||
+ pmuio2-supply = <&vcca1v8_pmu>;
|
||||
+ vccio1-supply = <&vccio_acodec>;
|
||||
+ vccio2-supply = <&vcc_1v8>;
|
||||
+ vccio3-supply = <&vccio_sd>;
|
||||
+ vccio4-supply = <&vcc_1v8>;
|
||||
+ vccio5-supply = <&vcc_3v3>;
|
||||
+ vccio6-supply = <&vcc_3v3>;
|
||||
+ vccio7-supply = <&vcc_3v3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ vref-supply = <&vcca_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc0 {
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
+ vmmc-supply = <&vcc3v3_sys>;
|
||||
+ vqmmc-supply = <&vccio_sd>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <1>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_xhci {
|
||||
+ dr_mode = "peripheral";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_xhci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_host {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_otg {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop {
|
||||
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vp0 {
|
||||
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||||
+ remote-endpoint = <&hdmi_in_vp0>;
|
||||
+ };
|
||||
+};
|
||||
--- /dev/null
|
||||
+++ b/dts/upstream/src/arm64/rockchip/rk3566-radxa-zero-3e.dts
|
||||
@@ -0,0 +1,52 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "rk3566-radxa-zero-3.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Radxa ZERO 3E";
|
||||
+ compatible = "radxa,zero-3e", "rockchip,rk3566";
|
||||
+
|
||||
+ aliases {
|
||||
+ ethernet0 = &gmac1;
|
||||
+ mmc0 = &sdmmc0;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&gmac1 {
|
||||
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
|
||||
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
|
||||
+ clock_in_out = "input";
|
||||
+ phy-handle = <&rgmii_phy1>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ phy-supply = <&vcc_3v3>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&gmac1m1_miim
|
||||
+ &gmac1m1_tx_bus2
|
||||
+ &gmac1m1_rx_bus2
|
||||
+ &gmac1m1_rgmii_clk
|
||||
+ &gmac1m1_rgmii_bus
|
||||
+ &gmac1m1_clkinout>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mdio1 {
|
||||
+ rgmii_phy1: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&gmac1_rstn>;
|
||||
+ reset-assert-us = <20000>;
|
||||
+ reset-deassert-us = <50000>;
|
||||
+ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ gmac1 {
|
||||
+ gmac1_rstn: gmac1-rstn {
|
||||
+ rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
--- /dev/null
|
||||
+++ b/dts/upstream/src/arm64/rockchip/rk3566-radxa-zero-3w.dts
|
||||
@@ -0,0 +1,92 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "rk3566-radxa-zero-3.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Radxa ZERO 3W";
|
||||
+ compatible = "radxa,zero-3w", "rockchip,rk3566";
|
||||
+
|
||||
+ aliases {
|
||||
+ mmc0 = &sdhci;
|
||||
+ mmc1 = &sdmmc0;
|
||||
+ mmc2 = &sdmmc1;
|
||||
+ };
|
||||
+
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ clocks = <&rk817 1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&wifi_reg_on_h>;
|
||||
+ post-power-on-delay-ms = <100>;
|
||||
+ power-off-delay-us = <5000000>;
|
||||
+ reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ bluetooth {
|
||||
+ bt_reg_on_h: bt-reg-on-h {
|
||||
+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ bt_wake_host_h: bt-wake-host-h {
|
||||
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ host_wake_bt_h: host-wake-bt-h {
|
||||
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wifi {
|
||||
+ wifi_reg_on_h: wifi-reg-on-h {
|
||||
+ rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ wifi_wake_host_h: wifi-wake-host-h {
|
||||
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ max-frequency = <200000000>;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ no-sd;
|
||||
+ no-sdio;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&vcc_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc1 {
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cap-sdio-irq;
|
||||
+ keep-power-in-suspend;
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+ no-mmc;
|
||||
+ no-sd;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>;
|
||||
+ sd-uhs-sdr104;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&vcc_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
|
||||
+ uart-has-rtscts;
|
||||
+ status = "okay";
|
||||
+};
|
||||
|
||||
@ -0,0 +1,67 @@
|
||||
From 232af1e58a977f3857074d3aba3709c860bd8058 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Fri, 2 Aug 2024 22:12:22 +0000
|
||||
Subject: [PATCH] dm: adc: Add SPL_ADC Kconfig symbol for use of ADC in SPL
|
||||
|
||||
What model of Radxa ZERO 3W/3E board can be identified using ADC at
|
||||
runtime, add a Kconfig symbol to allow use of ADC in SPL.
|
||||
|
||||
This will be used to identify board model in SPL to allow loading
|
||||
correct FIT configuration and FDT for U-Boot proper at SPL phase.
|
||||
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
|
||||
---
|
||||
drivers/Makefile | 2 +-
|
||||
drivers/adc/Kconfig | 5 +++++
|
||||
drivers/adc/Makefile | 2 +-
|
||||
3 files changed, 7 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/Makefile
|
||||
+++ b/drivers/Makefile
|
||||
@@ -1,5 +1,6 @@
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
+obj-$(CONFIG_$(SPL_TPL_)ADC) += adc/
|
||||
obj-$(CONFIG_$(SPL_TPL_)BIOSEMU) += bios_emulator/
|
||||
obj-$(CONFIG_$(SPL_TPL_)BLK) += block/
|
||||
obj-$(CONFIG_$(SPL_TPL_)BOOTCOUNT_LIMIT) += bootcount/
|
||||
@@ -81,7 +82,6 @@ endif
|
||||
|
||||
ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
|
||||
|
||||
-obj-y += adc/
|
||||
obj-y += ata/
|
||||
obj-$(CONFIG_DM_DEMO) += demo/
|
||||
obj-y += block/
|
||||
--- a/drivers/adc/Kconfig
|
||||
+++ b/drivers/adc/Kconfig
|
||||
@@ -1,5 +1,6 @@
|
||||
config ADC
|
||||
bool "Enable ADC drivers using Driver Model"
|
||||
+ depends on DM
|
||||
help
|
||||
This enables ADC API for drivers, which allows driving ADC features
|
||||
by single and multi-channel methods for:
|
||||
@@ -11,6 +12,10 @@ config ADC
|
||||
- support supply's phandle with auto-enable
|
||||
- supply polarity setting in fdt
|
||||
|
||||
+config SPL_ADC
|
||||
+ bool "Enable ADC drivers using Driver Model in SPL"
|
||||
+ depends on SPL_DM
|
||||
+
|
||||
config ADC_EXYNOS
|
||||
bool "Enable Exynos 54xx ADC driver"
|
||||
depends on ADC
|
||||
--- a/drivers/adc/Makefile
|
||||
+++ b/drivers/adc/Makefile
|
||||
@@ -4,7 +4,7 @@
|
||||
# Przemyslaw Marczak <p.marczak@samsung.com>
|
||||
#
|
||||
|
||||
-obj-$(CONFIG_ADC) += adc-uclass.o
|
||||
+obj-$(CONFIG_$(SPL_TPL_)ADC) += adc-uclass.o
|
||||
obj-$(CONFIG_ADC_EXYNOS) += exynos-adc.o
|
||||
obj-$(CONFIG_ADC_SANDBOX) += sandbox.o
|
||||
obj-$(CONFIG_SARADC_ROCKCHIP) += rockchip-saradc.o
|
||||
@ -0,0 +1,295 @@
|
||||
From 5d199ad9a6bb43dbf43efe45ec37002c4ae305a0 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Fri, 2 Aug 2024 22:12:23 +0000
|
||||
Subject: [PATCH] board: rockchip: Add Radxa ZERO 3W/3E
|
||||
|
||||
The Radxa ZERO 3W/3E is an ultra-small, high-performance single board
|
||||
computer based on the Rockchip RK3566, with a compact form factor and
|
||||
rich interfaces.
|
||||
|
||||
Implement rk_board_late_init() to set correct fdtfile env var and
|
||||
board_fit_config_name_match() to load correct FIT config based on what
|
||||
board is detected at runtime so a single board target can be used for
|
||||
both board models.
|
||||
|
||||
Features tested on a ZERO 3W 8GB v1.11:
|
||||
- SD-card boot
|
||||
- eMMC boot
|
||||
- USB gadget
|
||||
- USB host
|
||||
|
||||
Features tested on a ZERO 3E 4GB v1.2:
|
||||
- SD-card boot
|
||||
- Ethernet
|
||||
- USB gadget
|
||||
- USB host
|
||||
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
Tested-by: FUKAUMI Naoki <naoki@radxa.com>
|
||||
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
|
||||
---
|
||||
arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi | 15 ++++
|
||||
arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi | 15 ++++
|
||||
arch/arm/mach-rockchip/rk3568/Kconfig | 6 ++
|
||||
board/radxa/zero3-rk3566/Kconfig | 12 +++
|
||||
board/radxa/zero3-rk3566/MAINTAINERS | 6 ++
|
||||
board/radxa/zero3-rk3566/Makefile | 3 +
|
||||
board/radxa/zero3-rk3566/zero3-rk3566.c | 59 +++++++++++++
|
||||
configs/radxa-zero-3-rk3566_defconfig | 85 +++++++++++++++++++
|
||||
doc/board/rockchip/rockchip.rst | 1 +
|
||||
9 files changed, 202 insertions(+)
|
||||
create mode 100644 arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi
|
||||
create mode 100644 arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi
|
||||
create mode 100644 board/radxa/zero3-rk3566/Kconfig
|
||||
create mode 100644 board/radxa/zero3-rk3566/MAINTAINERS
|
||||
create mode 100644 board/radxa/zero3-rk3566/Makefile
|
||||
create mode 100644 board/radxa/zero3-rk3566/zero3-rk3566.c
|
||||
create mode 100644 configs/radxa-zero-3-rk3566_defconfig
|
||||
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/rk3566-radxa-zero-3e-u-boot.dtsi
|
||||
@@ -0,0 +1,15 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+#include "rk356x-u-boot.dtsi"
|
||||
+
|
||||
+&saradc {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
+
|
||||
+&usb_host0_xhci {
|
||||
+ dr_mode = "otg";
|
||||
+};
|
||||
+
|
||||
+&vcca_1v8 {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
--- /dev/null
|
||||
+++ b/arch/arm/dts/rk3566-radxa-zero-3w-u-boot.dtsi
|
||||
@@ -0,0 +1,15 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+#include "rk356x-u-boot.dtsi"
|
||||
+
|
||||
+&saradc {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
+
|
||||
+&usb_host0_xhci {
|
||||
+ dr_mode = "otg";
|
||||
+};
|
||||
+
|
||||
+&vcca_1v8 {
|
||||
+ bootph-pre-ram;
|
||||
+};
|
||||
--- a/arch/arm/mach-rockchip/rk3568/Kconfig
|
||||
+++ b/arch/arm/mach-rockchip/rk3568/Kconfig
|
||||
@@ -32,6 +32,11 @@ config TARGET_QUARTZ64_RK3566
|
||||
help
|
||||
Pine64 Quartz64 single board computer with a RK3566 SoC.
|
||||
|
||||
+config TARGET_RADXA_ZERO_3_RK3566
|
||||
+ bool "Radxa ZERO 3W/3E"
|
||||
+ help
|
||||
+ Radxa ZERO 3W/3E single board computers with a RK3566 SoC.
|
||||
+
|
||||
endchoice
|
||||
|
||||
config ROCKCHIP_BOOT_MODE_REG
|
||||
@@ -54,5 +59,6 @@ source "board/anbernic/rgxx3_rk3566/Kcon
|
||||
source "board/hardkernel/odroid_m1/Kconfig"
|
||||
source "board/pine64/quartz64_rk3566/Kconfig"
|
||||
source "board/powkiddy/x55/Kconfig"
|
||||
+source "board/radxa/zero3-rk3566/Kconfig"
|
||||
|
||||
endif
|
||||
--- /dev/null
|
||||
+++ b/board/radxa/zero3-rk3566/Kconfig
|
||||
@@ -0,0 +1,12 @@
|
||||
+if TARGET_RADXA_ZERO_3_RK3566
|
||||
+
|
||||
+config SYS_BOARD
|
||||
+ default "zero3-rk3566"
|
||||
+
|
||||
+config SYS_VENDOR
|
||||
+ default "radxa"
|
||||
+
|
||||
+config SYS_CONFIG_NAME
|
||||
+ default "evb_rk3568"
|
||||
+
|
||||
+endif
|
||||
--- /dev/null
|
||||
+++ b/board/radxa/zero3-rk3566/MAINTAINERS
|
||||
@@ -0,0 +1,6 @@
|
||||
+RADXA-ZERO-3-RK3566
|
||||
+M: Jonas Karlman <jonas@kwiboo.se>
|
||||
+S: Maintained
|
||||
+F: board/radxa/zero3-rk3566
|
||||
+F: configs/radxa-zero-3-rk3566_defconfig
|
||||
+F: arch/arm/dts/rk3566-radxa-zero-3*
|
||||
--- /dev/null
|
||||
+++ b/board/radxa/zero3-rk3566/Makefile
|
||||
@@ -0,0 +1,3 @@
|
||||
+# SPDX-License-Identifier: GPL-2.0+
|
||||
+
|
||||
+obj-y += zero3-rk3566.o
|
||||
--- /dev/null
|
||||
+++ b/board/radxa/zero3-rk3566/zero3-rk3566.c
|
||||
@@ -0,0 +1,59 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0+
|
||||
+
|
||||
+#include <linux/errno.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <adc.h>
|
||||
+#include <env.h>
|
||||
+
|
||||
+#define HW_ID_CHANNEL 1
|
||||
+
|
||||
+struct board_model {
|
||||
+ unsigned int low;
|
||||
+ unsigned int high;
|
||||
+ const char *fdtfile;
|
||||
+};
|
||||
+
|
||||
+static const struct board_model board_models[] = {
|
||||
+ { 230, 270, "rockchip/rk3566-radxa-zero-3w.dtb" },
|
||||
+ { 400, 450, "rockchip/rk3566-radxa-zero-3e.dtb" },
|
||||
+};
|
||||
+
|
||||
+static const struct board_model *get_board_model(void)
|
||||
+{
|
||||
+ unsigned int val;
|
||||
+ int i, ret;
|
||||
+
|
||||
+ ret = adc_channel_single_shot("saradc@fe720000", HW_ID_CHANNEL, &val);
|
||||
+ if (ret)
|
||||
+ return NULL;
|
||||
+
|
||||
+ for (i = 0; i < ARRAY_SIZE(board_models); i++) {
|
||||
+ unsigned int min = board_models[i].low;
|
||||
+ unsigned int max = board_models[i].high;
|
||||
+
|
||||
+ if (min <= val && val <= max)
|
||||
+ return &board_models[i];
|
||||
+ }
|
||||
+
|
||||
+ return NULL;
|
||||
+}
|
||||
+
|
||||
+int rk_board_late_init(void)
|
||||
+{
|
||||
+ const struct board_model *model = get_board_model();
|
||||
+
|
||||
+ if (model)
|
||||
+ env_set("fdtfile", model->fdtfile);
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+int board_fit_config_name_match(const char *name)
|
||||
+{
|
||||
+ const struct board_model *model = get_board_model();
|
||||
+
|
||||
+ if (model && !strcmp(name, model->fdtfile))
|
||||
+ return 0;
|
||||
+
|
||||
+ return -EINVAL;
|
||||
+}
|
||||
--- /dev/null
|
||||
+++ b/configs/radxa-zero-3-rk3566_defconfig
|
||||
@@ -0,0 +1,85 @@
|
||||
+CONFIG_ARM=y
|
||||
+CONFIG_SKIP_LOWLEVEL_INIT=y
|
||||
+CONFIG_COUNTER_FREQUENCY=24000000
|
||||
+CONFIG_ARCH_ROCKCHIP=y
|
||||
+CONFIG_SPL_GPIO=y
|
||||
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-radxa-zero-3w"
|
||||
+CONFIG_ROCKCHIP_RK3568=y
|
||||
+CONFIG_SPL_SERIAL=y
|
||||
+CONFIG_TARGET_RADXA_ZERO_3_RK3566=y
|
||||
+CONFIG_DEBUG_UART_BASE=0xFE660000
|
||||
+CONFIG_DEBUG_UART_CLOCK=24000000
|
||||
+CONFIG_SYS_LOAD_ADDR=0xc00800
|
||||
+CONFIG_DEBUG_UART=y
|
||||
+CONFIG_FIT=y
|
||||
+CONFIG_FIT_VERBOSE=y
|
||||
+CONFIG_SPL_FIT_SIGNATURE=y
|
||||
+CONFIG_SPL_LOAD_FIT=y
|
||||
+CONFIG_LEGACY_IMAGE_FORMAT=y
|
||||
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-radxa-zero-3w.dtb"
|
||||
+# CONFIG_DISPLAY_CPUINFO is not set
|
||||
+CONFIG_DISPLAY_BOARDINFO_LATE=y
|
||||
+CONFIG_SPL_MAX_SIZE=0x40000
|
||||
+CONFIG_SPL_PAD_TO=0x7f8000
|
||||
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
|
||||
+CONFIG_SPL_POWER=y
|
||||
+CONFIG_SPL_ATF=y
|
||||
+CONFIG_CMD_GPIO=y
|
||||
+CONFIG_CMD_GPT=y
|
||||
+CONFIG_CMD_I2C=y
|
||||
+CONFIG_CMD_MMC=y
|
||||
+CONFIG_CMD_USB=y
|
||||
+CONFIG_CMD_ROCKUSB=y
|
||||
+CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
+# CONFIG_CMD_SETEXPR is not set
|
||||
+CONFIG_CMD_PMIC=y
|
||||
+CONFIG_CMD_REGULATOR=y
|
||||
+# CONFIG_SPL_DOS_PARTITION is not set
|
||||
+CONFIG_SPL_OF_CONTROL=y
|
||||
+CONFIG_OF_LIVE=y
|
||||
+CONFIG_OF_LIST="rockchip/rk3566-radxa-zero-3w rockchip/rk3566-radxa-zero-3e"
|
||||
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
|
||||
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
+CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
+CONFIG_SPL_REGMAP=y
|
||||
+CONFIG_SPL_SYSCON=y
|
||||
+CONFIG_SPL_ADC=y
|
||||
+CONFIG_SPL_CLK=y
|
||||
+# CONFIG_USB_FUNCTION_FASTBOOT is not set
|
||||
+CONFIG_ROCKCHIP_GPIO=y
|
||||
+CONFIG_SYS_I2C_ROCKCHIP=y
|
||||
+CONFIG_LED=y
|
||||
+CONFIG_LED_GPIO=y
|
||||
+CONFIG_MISC=y
|
||||
+CONFIG_SUPPORT_EMMC_RPMB=y
|
||||
+CONFIG_MMC_DW=y
|
||||
+CONFIG_MMC_DW_ROCKCHIP=y
|
||||
+CONFIG_MMC_SDHCI=y
|
||||
+CONFIG_MMC_SDHCI_SDMA=y
|
||||
+CONFIG_MMC_SDHCI_ROCKCHIP=y
|
||||
+CONFIG_PHY_REALTEK=y
|
||||
+CONFIG_DWC_ETH_QOS=y
|
||||
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
|
||||
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
|
||||
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
|
||||
+CONFIG_SPL_PINCTRL=y
|
||||
+CONFIG_DM_PMIC=y
|
||||
+CONFIG_DM_PMIC_FAN53555=y
|
||||
+CONFIG_PMIC_RK8XX=y
|
||||
+CONFIG_SPL_DM_REGULATOR=y
|
||||
+CONFIG_SPL_DM_REGULATOR_FIXED=y
|
||||
+CONFIG_REGULATOR_RK8XX=y
|
||||
+CONFIG_SPL_RAM=y
|
||||
+CONFIG_BAUDRATE=1500000
|
||||
+CONFIG_DEBUG_UART_SHIFT=2
|
||||
+CONFIG_SYS_NS16550_MEM32=y
|
||||
+CONFIG_SYSRESET=y
|
||||
+CONFIG_SYSRESET_PSCI=y
|
||||
+CONFIG_USB=y
|
||||
+CONFIG_USB_XHCI_HCD=y
|
||||
+CONFIG_USB_DWC3=y
|
||||
+CONFIG_USB_DWC3_GENERIC=y
|
||||
+CONFIG_USB_GADGET=y
|
||||
+CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
+CONFIG_USB_FUNCTION_ROCKUSB=y
|
||||
+CONFIG_ERRNO_STR=y
|
||||
--- a/doc/board/rockchip/rockchip.rst
|
||||
+++ b/doc/board/rockchip/rockchip.rst
|
||||
@@ -107,6 +107,7 @@ List of mainline supported Rockchip boar
|
||||
- Powkiddy X55 (powkiddy-x55-rk3566)
|
||||
- Radxa CM3 IO Board (radxa-cm3-io-rk3566)
|
||||
- Radxa ROCK 3C (rock-3c-rk3566)
|
||||
+ - Radxa ZERO 3W/3E (radxa-zero-3-rk3566)
|
||||
|
||||
* rk3568
|
||||
- Rockchip Evb-RK3568 (evb-rk3568)
|
||||
@ -201,6 +201,26 @@ define Device/radxa_rock-pi-s
|
||||
endef
|
||||
TARGET_DEVICES += radxa_rock-pi-s
|
||||
|
||||
define Device/radxa_zero-3e
|
||||
DEVICE_VENDOR := Radxa
|
||||
DEVICE_MODEL := ZERO 3E
|
||||
SOC := rk3566
|
||||
DEVICE_DTS := rockchip/rk3566-radxa-zero-3e
|
||||
UBOOT_DEVICE_NAME := radxa-zero-3-rk3566
|
||||
DEVICE_PACKAGES := kmod-usb-net-cdc-ncm kmod-usb-net-rndis
|
||||
endef
|
||||
TARGET_DEVICES += radxa_zero-3e
|
||||
|
||||
define Device/radxa_zero-3w
|
||||
DEVICE_VENDOR := Radxa
|
||||
DEVICE_MODEL := ZERO 3W
|
||||
SOC := rk3566
|
||||
DEVICE_DTS := rockchip/rk3566-radxa-zero-3w
|
||||
UBOOT_DEVICE_NAME := radxa-zero-3-rk3566
|
||||
DEVICE_PACKAGES := kmod-usb-net-cdc-ncm kmod-usb-net-rndis
|
||||
endef
|
||||
TARGET_DEVICES += radxa_zero-3w
|
||||
|
||||
define Device/sinovoip_bpi-r2-pro
|
||||
DEVICE_VENDOR := Sinovoip
|
||||
DEVICE_MODEL := Bananapi-R2 Pro
|
||||
|
||||
@ -0,0 +1,657 @@
|
||||
From 1a5c8d307c83c808a32686ed51afb4bac2092d39 Mon Sep 17 00:00:00 2001
|
||||
From: Jonas Karlman <jonas@kwiboo.se>
|
||||
Date: Tue, 21 May 2024 20:28:05 +0000
|
||||
Subject: [PATCH] arm64: dts: rockchip: Add Radxa ZERO 3W/3E
|
||||
|
||||
The Radxa ZERO 3W/3E is an ultra-small, high-performance single board
|
||||
computer based on the Rockchip RK3566, with a compact form factor and
|
||||
rich interfaces.
|
||||
|
||||
The ZERO 3W and ZERO 3E are basically the same size and model, but
|
||||
differ only in storage and network interfaces.
|
||||
|
||||
- eMMC (3W)
|
||||
- SD-card (both)
|
||||
- Ethernet (3E)
|
||||
- WiFi/BT (3W)
|
||||
|
||||
Add initial support for eMMC, SD-card, Ethernet, HDMI and USB.
|
||||
|
||||
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
|
||||
Link: https://lore.kernel.org/r/20240521202810.1225636-3-jonas@kwiboo.se
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/Makefile | 2 +
|
||||
.../dts/rockchip/rk3566-radxa-zero-3.dtsi | 463 ++++++++++++++++++
|
||||
.../dts/rockchip/rk3566-radxa-zero-3e.dts | 51 ++
|
||||
.../dts/rockchip/rk3566-radxa-zero-3w.dts | 91 ++++
|
||||
4 files changed, 607 insertions(+)
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts
|
||||
create mode 100644 arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -80,6 +80,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pi
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-cm3-io.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-zero-3e.dtb
|
||||
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-zero-3w.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-roc-pc.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-rock-3c.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-blade.dtb
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
|
||||
@@ -0,0 +1,463 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+#include <dt-bindings/gpio/gpio.h>
|
||||
+#include <dt-bindings/leds/common.h>
|
||||
+#include <dt-bindings/soc/rockchip,vop2.h>
|
||||
+#include "rk3566.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ aliases {
|
||||
+ mmc0 = &sdmmc0;
|
||||
+ };
|
||||
+
|
||||
+ chosen {
|
||||
+ stdout-path = "serial2:1500000n8";
|
||||
+ };
|
||||
+
|
||||
+ hdmi-con {
|
||||
+ compatible = "hdmi-connector";
|
||||
+ type = "d";
|
||||
+
|
||||
+ port {
|
||||
+ hdmi_con_in: endpoint {
|
||||
+ remote-endpoint = <&hdmi_out_con>;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ leds {
|
||||
+ compatible = "gpio-leds";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&user_led2>;
|
||||
+
|
||||
+ led-green {
|
||||
+ color = <LED_COLOR_ID_GREEN>;
|
||||
+ default-state = "on";
|
||||
+ function = LED_FUNCTION_HEARTBEAT;
|
||||
+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
|
||||
+ linux,default-trigger = "heartbeat";
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8: regulator-1v8-vcc {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vcc_1v8_p>;
|
||||
+ };
|
||||
+
|
||||
+ vcca_1v8: regulator-1v8-vcca {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcca_1v8";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vcc_1v8_p>;
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_image: regulator-1v8-vcca-image {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcca1v8_image";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+ vin-supply = <&vcc_1v8_p>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_3v3: regulator-3v3-vcc {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_3v3";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+ vin-supply = <&vcc3v3_sys>;
|
||||
+ };
|
||||
+
|
||||
+ vcc_sys: regulator-5v0-vcc-sys {
|
||||
+ compatible = "regulator-fixed";
|
||||
+ regulator-name = "vcc_sys";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&combphy1 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&cpu0 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu1 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu2 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&cpu3 {
|
||||
+ cpu-supply = <&vdd_cpu>;
|
||||
+};
|
||||
+
|
||||
+&gpu {
|
||||
+ mali-supply = <&vdd_gpu_npu>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi {
|
||||
+ avdd-0v9-supply = <&vdda_0v9>;
|
||||
+ avdd-1v8-supply = <&vcca1v8_image>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&hdmi_in {
|
||||
+ hdmi_in_vp0: endpoint {
|
||||
+ remote-endpoint = <&vp0_out_hdmi>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi_out {
|
||||
+ hdmi_out_con: endpoint {
|
||||
+ remote-endpoint = <&hdmi_con_in>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&hdmi_sound {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&i2c0 {
|
||||
+ status = "okay";
|
||||
+
|
||||
+ rk817: pmic@20 {
|
||||
+ compatible = "rockchip,rk817";
|
||||
+ reg = <0x20>;
|
||||
+ #clock-cells = <1>;
|
||||
+ clock-output-names = "rk817-clkout1", "rk817-clkout2";
|
||||
+ interrupt-parent = <&gpio0>;
|
||||
+ interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&pmic_int_l>;
|
||||
+ system-power-controller;
|
||||
+ wakeup-source;
|
||||
+
|
||||
+ vcc1-supply = <&vcc_sys>;
|
||||
+ vcc2-supply = <&vcc_sys>;
|
||||
+ vcc3-supply = <&vcc_sys>;
|
||||
+ vcc4-supply = <&vcc_sys>;
|
||||
+ vcc5-supply = <&vcc_sys>;
|
||||
+ vcc6-supply = <&vcc_sys>;
|
||||
+ vcc7-supply = <&vcc_sys>;
|
||||
+ vcc8-supply = <&vcc_sys>;
|
||||
+ vcc9-supply = <&vcc5v_midu>;
|
||||
+
|
||||
+ regulators {
|
||||
+ vdd_logic: DCDC_REG1 {
|
||||
+ regulator-name = "vdd_logic";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ regulator-suspend-microvolt = <900000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_gpu_npu: DCDC_REG2 {
|
||||
+ regulator-name = "vdd_gpu_npu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <500000>;
|
||||
+ regulator-max-microvolt = <1350000>;
|
||||
+ regulator-ramp-delay = <6001>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_ddr: DCDC_REG3 {
|
||||
+ regulator-name = "vcc_ddr";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_sys: DCDC_REG4 {
|
||||
+ regulator-name = "vcc3v3_sys";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-initial-mode = <0x2>;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcca1v8_pmu: LDO_REG1 {
|
||||
+ regulator-name = "vcca1v8_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <1800000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda_0v9: LDO_REG2 {
|
||||
+ regulator-name = "vdda_0v9";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdda0v9_pmu: LDO_REG3 {
|
||||
+ regulator-name = "vdda0v9_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <900000>;
|
||||
+ regulator-max-microvolt = <900000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <900000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_acodec: LDO_REG4 {
|
||||
+ regulator-name = "vccio_acodec";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vccio_sd: LDO_REG5 {
|
||||
+ regulator-name = "vccio_sd";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc3v3_pmu: LDO_REG6 {
|
||||
+ regulator-name = "vcc3v3_pmu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <3300000>;
|
||||
+ regulator-max-microvolt = <3300000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-on-in-suspend;
|
||||
+ regulator-suspend-microvolt = <3300000>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc_1v8_p: LDO_REG7 {
|
||||
+ regulator-name = "vcc_1v8_p";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc1v8_dvp: LDO_REG8 {
|
||||
+ regulator-name = "vcc1v8_dvp";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <1800000>;
|
||||
+ regulator-max-microvolt = <1800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc2v8_dvp: LDO_REG9 {
|
||||
+ regulator-name = "vcc2v8_dvp";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <2800000>;
|
||||
+ regulator-max-microvolt = <2800000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vcc5v_midu: BOOST {
|
||||
+ regulator-name = "vcc5v_midu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <5000000>;
|
||||
+ regulator-max-microvolt = <5000000>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vbus: OTG_SWITCH {
|
||||
+ regulator-name = "vbus";
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ vdd_cpu: regulator@40 {
|
||||
+ compatible = "rockchip,rk8600";
|
||||
+ reg = <0x40>;
|
||||
+ fcs,suspend-voltage-selector = <1>;
|
||||
+ regulator-name = "vdd_cpu";
|
||||
+ regulator-always-on;
|
||||
+ regulator-boot-on;
|
||||
+ regulator-min-microvolt = <712500>;
|
||||
+ regulator-max-microvolt = <1390000>;
|
||||
+ regulator-ramp-delay = <2300>;
|
||||
+ vin-supply = <&vcc_sys>;
|
||||
+
|
||||
+ regulator-state-mem {
|
||||
+ regulator-off-in-suspend;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&i2s0_8ch {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ leds {
|
||||
+ user_led2: user-led2 {
|
||||
+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ pmic {
|
||||
+ pmic_int_l: pmic-int-l {
|
||||
+ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pmu_io_domains {
|
||||
+ pmuio1-supply = <&vcc3v3_pmu>;
|
||||
+ pmuio2-supply = <&vcca1v8_pmu>;
|
||||
+ vccio1-supply = <&vccio_acodec>;
|
||||
+ vccio2-supply = <&vcc_1v8>;
|
||||
+ vccio3-supply = <&vccio_sd>;
|
||||
+ vccio4-supply = <&vcc_1v8>;
|
||||
+ vccio5-supply = <&vcc_3v3>;
|
||||
+ vccio6-supply = <&vcc_3v3>;
|
||||
+ vccio7-supply = <&vcc_3v3>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&saradc {
|
||||
+ vref-supply = <&vcca_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc0 {
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ disable-wp;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
+ vmmc-supply = <&vcc3v3_sys>;
|
||||
+ vqmmc-supply = <&vccio_sd>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&tsadc {
|
||||
+ rockchip,hw-tshut-mode = <1>;
|
||||
+ rockchip,hw-tshut-polarity = <0>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart2 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host0_xhci {
|
||||
+ dr_mode = "peripheral";
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb_host1_xhci {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0 {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_host {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&usb2phy0_otg {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop {
|
||||
+ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
+ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vop_mmu {
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&vp0 {
|
||||
+ vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
|
||||
+ reg = <ROCKCHIP_VOP2_EP_HDMI0>;
|
||||
+ remote-endpoint = <&hdmi_in_vp0>;
|
||||
+ };
|
||||
+};
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts
|
||||
@@ -0,0 +1,51 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "rk3566-radxa-zero-3.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Radxa ZERO 3E";
|
||||
+ compatible = "radxa,zero-3e", "rockchip,rk3566";
|
||||
+
|
||||
+ aliases {
|
||||
+ ethernet0 = &gmac1;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&gmac1 {
|
||||
+ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
|
||||
+ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
|
||||
+ clock_in_out = "input";
|
||||
+ phy-handle = <&rgmii_phy1>;
|
||||
+ phy-mode = "rgmii-id";
|
||||
+ phy-supply = <&vcc_3v3>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&gmac1m1_miim
|
||||
+ &gmac1m1_tx_bus2
|
||||
+ &gmac1m1_rx_bus2
|
||||
+ &gmac1m1_rgmii_clk
|
||||
+ &gmac1m1_rgmii_bus
|
||||
+ &gmac1m1_clkinout>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&mdio1 {
|
||||
+ rgmii_phy1: ethernet-phy@1 {
|
||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
||||
+ reg = <1>;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&gmac1_rstn>;
|
||||
+ reset-assert-us = <20000>;
|
||||
+ reset-deassert-us = <50000>;
|
||||
+ reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ gmac1 {
|
||||
+ gmac1_rstn: gmac1-rstn {
|
||||
+ rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
--- /dev/null
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts
|
||||
@@ -0,0 +1,91 @@
|
||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
+
|
||||
+/dts-v1/;
|
||||
+
|
||||
+#include "rk3566-radxa-zero-3.dtsi"
|
||||
+
|
||||
+/ {
|
||||
+ model = "Radxa ZERO 3W";
|
||||
+ compatible = "radxa,zero-3w", "rockchip,rk3566";
|
||||
+
|
||||
+ aliases {
|
||||
+ mmc1 = &sdhci;
|
||||
+ mmc2 = &sdmmc1;
|
||||
+ };
|
||||
+
|
||||
+ sdio_pwrseq: sdio-pwrseq {
|
||||
+ compatible = "mmc-pwrseq-simple";
|
||||
+ clocks = <&rk817 1>;
|
||||
+ clock-names = "ext_clock";
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&wifi_reg_on_h>;
|
||||
+ post-power-on-delay-ms = <100>;
|
||||
+ power-off-delay-us = <5000000>;
|
||||
+ reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>;
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&pinctrl {
|
||||
+ bluetooth {
|
||||
+ bt_reg_on_h: bt-reg-on-h {
|
||||
+ rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ bt_wake_host_h: bt-wake-host-h {
|
||||
+ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ host_wake_bt_h: host-wake-bt-h {
|
||||
+ rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+
|
||||
+ wifi {
|
||||
+ wifi_reg_on_h: wifi-reg-on-h {
|
||||
+ rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+
|
||||
+ wifi_wake_host_h: wifi-wake-host-h {
|
||||
+ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
+ };
|
||||
+ };
|
||||
+};
|
||||
+
|
||||
+&sdhci {
|
||||
+ bus-width = <8>;
|
||||
+ cap-mmc-highspeed;
|
||||
+ max-frequency = <200000000>;
|
||||
+ mmc-hs200-1_8v;
|
||||
+ no-sd;
|
||||
+ no-sdio;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&vcc_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&sdmmc1 {
|
||||
+ bus-width = <4>;
|
||||
+ cap-sd-highspeed;
|
||||
+ cap-sdio-irq;
|
||||
+ keep-power-in-suspend;
|
||||
+ mmc-pwrseq = <&sdio_pwrseq>;
|
||||
+ no-mmc;
|
||||
+ no-sd;
|
||||
+ non-removable;
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_clk &sdmmc1_cmd>;
|
||||
+ sd-uhs-sdr104;
|
||||
+ vmmc-supply = <&vcc_3v3>;
|
||||
+ vqmmc-supply = <&vcc_1v8>;
|
||||
+ status = "okay";
|
||||
+};
|
||||
+
|
||||
+&uart1 {
|
||||
+ pinctrl-names = "default";
|
||||
+ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>;
|
||||
+ uart-has-rtscts;
|
||||
+ status = "okay";
|
||||
+};
|
||||
@ -0,0 +1,64 @@
|
||||
From 060c1950037e4c54ca4d8186a8f46269e35db901 Mon Sep 17 00:00:00 2001
|
||||
From: FUKAUMI Naoki <naoki@radxa.com>
|
||||
Date: Fri, 21 Jun 2024 07:44:35 +0900
|
||||
Subject: [PATCH] arm64: dts: rockchip: fix mmc aliases for Radxa ZERO 3E/3W
|
||||
|
||||
align with other Radxa products.
|
||||
|
||||
- mmc0 is eMMC
|
||||
- mmc1 is microSD
|
||||
|
||||
for ZERO 3E, there is no eMMC, but aliases should start at 0, so mmc0
|
||||
is microSD as exception.
|
||||
|
||||
Fixes: 1a5c8d307c83 ("arm64: dts: rockchip: Add Radxa ZERO 3W/3E")
|
||||
Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
|
||||
|
||||
Changes in v3:
|
||||
- fix syntax error in rk3566-radxa-zero-3e.dts
|
||||
Changes in v2:
|
||||
- microSD is mmc0 instead of mmc1 for ZERO 3E
|
||||
|
||||
Link: https://lore.kernel.org/r/20240620224435.2752-1-naoki@radxa.com
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi | 4 ----
|
||||
arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts | 1 +
|
||||
arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts | 3 ++-
|
||||
3 files changed, 3 insertions(+), 5 deletions(-)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
|
||||
@@ -6,10 +6,6 @@
|
||||
#include "rk3566.dtsi"
|
||||
|
||||
/ {
|
||||
- aliases {
|
||||
- mmc0 = &sdmmc0;
|
||||
- };
|
||||
-
|
||||
chosen {
|
||||
stdout-path = "serial2:1500000n8";
|
||||
};
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3e.dts
|
||||
@@ -10,6 +10,7 @@
|
||||
|
||||
aliases {
|
||||
ethernet0 = &gmac1;
|
||||
+ mmc0 = &sdmmc0;
|
||||
};
|
||||
};
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3w.dts
|
||||
@@ -9,7 +9,8 @@
|
||||
compatible = "radxa,zero-3w", "rockchip,rk3566";
|
||||
|
||||
aliases {
|
||||
- mmc1 = &sdhci;
|
||||
+ mmc0 = &sdhci;
|
||||
+ mmc1 = &sdmmc0;
|
||||
mmc2 = &sdmmc1;
|
||||
};
|
||||
|
||||
@ -0,0 +1,101 @@
|
||||
From f7c742cbe664ebdedc075945e75443683d1175f7 Mon Sep 17 00:00:00 2001
|
||||
From: Trevor Woerner <twoerner@gmail.com>
|
||||
Date: Wed, 19 Jun 2024 21:32:49 -0400
|
||||
Subject: [PATCH] arm64: dts: rockchip: add gpio-line-names to radxa-zero-3
|
||||
|
||||
Add names to the pins of the general-purpose expansion header as given
|
||||
in the Radxa documentation[1] following the conventions in the kernel[2]
|
||||
to make it easier for users to correlate pins with functions when using
|
||||
utilities such as 'gpioinfo'.
|
||||
|
||||
[1] https://docs.radxa.com/en/zero/zero3/hardware-design/hardware-interface
|
||||
[2] https://www.kernel.org/doc/Documentation/devicetree/bindings/gpio/gpio.txt
|
||||
|
||||
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
|
||||
Link: https://lore.kernel.org/r/20240620013301.33653-1-twoerner@gmail.com
|
||||
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
---
|
||||
.../dts/rockchip/rk3566-radxa-zero-3.dtsi | 72 +++++++++++++++++++
|
||||
1 file changed, 72 insertions(+)
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
|
||||
@@ -105,6 +105,78 @@
|
||||
cpu-supply = <&vdd_cpu>;
|
||||
};
|
||||
|
||||
+&gpio0 {
|
||||
+ gpio-line-names =
|
||||
+ /* GPIO0_A0 - A7 */
|
||||
+ "", "", "", "", "", "", "", "",
|
||||
+ /* GPIO0_B0 - B7 */
|
||||
+ "", "", "", "", "", "", "", "",
|
||||
+ /* GPIO0_C0 - C7 */
|
||||
+ "", "", "", "", "", "", "", "",
|
||||
+ /* GPIO0_D0 - D7 */
|
||||
+ "pin-10 [GPIO0_D0]", "pin-08 [GPIO0_D1]", "",
|
||||
+ "", "", "", "", "";
|
||||
+};
|
||||
+
|
||||
+&gpio1 {
|
||||
+ gpio-line-names =
|
||||
+ /* GPIO1_A0 - A7 */
|
||||
+ "pin-03 [GPIO1_A0]", "pin-05 [GPIO1_A1]", "",
|
||||
+ "", "pin-37 [GPIO1_A4]", "",
|
||||
+ "", "",
|
||||
+ /* GPIO1_B0 - B7 */
|
||||
+ "", "", "", "", "", "", "", "",
|
||||
+ /* GPIO1_C0 - C7 */
|
||||
+ "", "", "", "", "", "", "", "",
|
||||
+ /* GPIO1_D0 - D7 */
|
||||
+ "", "", "", "", "", "", "", "";
|
||||
+};
|
||||
+
|
||||
+&gpio2 {
|
||||
+ gpio-line-names =
|
||||
+ /* GPIO2_A0 - A7 */
|
||||
+ "", "", "", "", "", "", "", "",
|
||||
+ /* GPIO2_B0 - B7 */
|
||||
+ "", "", "", "", "", "", "", "",
|
||||
+ /* GPIO2_C0 - C7 */
|
||||
+ "", "", "", "", "", "", "", "",
|
||||
+ /* GPIO2_D0 - D7 */
|
||||
+ "", "", "", "", "", "", "", "";
|
||||
+};
|
||||
+
|
||||
+&gpio3 {
|
||||
+ gpio-line-names =
|
||||
+ /* GPIO3_A0 - A7 */
|
||||
+ "", "pin-11 [GPIO3_A1]", "pin-13 [GPIO3_A2]",
|
||||
+ "pin-12 [GPIO3_A3]", "pin-35 [GPIO3_A4]", "pin-40 [GPIO3_A5]",
|
||||
+ "pin-38 [GPIO3_A6]", "pin-36 [GPIO3_A7]",
|
||||
+ /* GPIO3_B0 - B7 */
|
||||
+ "pin-15 [GPIO3_B0]", "pin-16 [GPIO3_B1]", "pin-18 [GPIO3_B2]",
|
||||
+ "pin-29 [GPIO3_B3]", "pin-31 [GPIO3_B4]", "",
|
||||
+ "", "",
|
||||
+ /* GPIO3_C0 - C7 */
|
||||
+ "", "pin-22 [GPIO3_C1]", "pin-32 [GPIO3_C2]",
|
||||
+ "pin-33 [GPIO3_C3]", "pin-07 [GPIO3_C4]", "",
|
||||
+ "", "",
|
||||
+ /* GPIO3_D0 - D7 */
|
||||
+ "", "", "", "", "", "", "", "";
|
||||
+};
|
||||
+
|
||||
+&gpio4 {
|
||||
+ gpio-line-names =
|
||||
+ /* GPIO4_A0 - A7 */
|
||||
+ "", "", "", "", "", "", "", "",
|
||||
+ /* GPIO4_B0 - B7 */
|
||||
+ "", "", "pin-27 [GPIO4_B2]",
|
||||
+ "pin-28 [GPIO4_B3]", "", "", "", "",
|
||||
+ /* GPIO4_C0 - C7 */
|
||||
+ "", "", "pin-23 [GPIO4_C2]",
|
||||
+ "pin-19 [GPIO4_C3]", "", "pin-21 [GPIO4_C5]",
|
||||
+ "pin-24 [GPIO4_C6]", "",
|
||||
+ /* GPIO4_D0 - D7 */
|
||||
+ "", "", "", "", "", "", "", "";
|
||||
+};
|
||||
+
|
||||
&gpu {
|
||||
mali-supply = <&vdd_gpu_npu>;
|
||||
status = "okay";
|
||||
@ -17,7 +17,7 @@ Signed-off-by: Heiko Stuebner <heiko@sntech.de>
|
||||
|
||||
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
||||
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
||||
@@ -105,4 +105,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-na
|
||||
@@ -107,4 +107,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-na
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5b.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-indiedroid-nova.dtb
|
||||
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-khadas-edge2.dtb
|
||||
|
||||
@ -0,0 +1,30 @@
|
||||
--- a/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
|
||||
+++ b/arch/arm64/boot/dts/rockchip/rk3566-radxa-zero-3.dtsi
|
||||
@@ -6,6 +6,13 @@
|
||||
#include "rk3566.dtsi"
|
||||
|
||||
/ {
|
||||
+ aliases {
|
||||
+ led-boot = &led_green;
|
||||
+ led-failsafe = &led_green;
|
||||
+ led-running = &led_green;
|
||||
+ led-upgrade = &led_green;
|
||||
+ };
|
||||
+
|
||||
chosen {
|
||||
stdout-path = "serial2:1500000n8";
|
||||
};
|
||||
@@ -26,12 +33,11 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&user_led2>;
|
||||
|
||||
- led-green {
|
||||
+ led_green: led-green {
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
default-state = "on";
|
||||
function = LED_FUNCTION_HEARTBEAT;
|
||||
gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
|
||||
- linux,default-trigger = "heartbeat";
|
||||
};
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user