Daniel González Cabanelas 26a5aea9bc mvebu: LS421DE: improve pin configuration ... The CLK125 output pin at the ethernet PHY is connected via capacitor to GND and nowhere else. Disable it. Also tune the LED masks. The MPP56 and MPP60 pins at the SoC are conected to the μPD720202 USB3.0 chip: - MPP56: wired to PCIe CLKREQ# (out) - MPP60: wired to PCIe RESET# (in) Configure the pcie pinmux for these pins. Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>		2021-05-01 00:37:15 +02:00
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imagebuilder	build,ib: add STRIP_ABI option for manifest	2021-03-16 11:00:08 -10:00
linux	mvebu: LS421DE: improve pin configuration	2021-05-01 00:37:15 +02:00
sdk	sdk: expose binary strip settings	2021-02-20 01:29:36 +01:00
toolchain	target: fix copying of licenses for SDK/toolchain	2021-02-14 21:56:29 +01:00
Config.in	include/image*: add support for device-tree overlays	2021-03-17 17:45:34 +00:00
Makefile	build: make <subdir>/install opt-in, use it for target/ only	2017-02-09 13:51:35 +01:00